1/* Definitions of target machine for GNU compiler for Intel X86
2 (386, 486, Pentium).
| 1/* Definitions of target machine for GNU compiler for Intel X86
2 (386, 486, Pentium).
|
3 Copyright (C) 1988, 1992, 1994, 1995 Free Software Foundation, Inc.
| 3 Copyright (C) 1988, 92, 94, 95, 96, 97, 1998 Free Software Foundation, Inc.
|
4
5This file is part of GNU CC.
6
7GNU CC is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2, or (at your option)
10any later version.
11
12GNU CC is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with GNU CC; see the file COPYING. If not, write to
19the Free Software Foundation, 59 Temple Place - Suite 330,
| 4
5This file is part of GNU CC.
6
7GNU CC is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2, or (at your option)
10any later version.
11
12GNU CC is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with GNU CC; see the file COPYING. If not, write to
19the Free Software Foundation, 59 Temple Place - Suite 330,
|
20Boston, MA 02111-1307, USA. */
| 20Boston, MA 02111-1307, USA. */
|
21
| 21
|
22
| |
23/* The purpose of this file is to define the characteristics of the i386,
24 independent of assembler syntax or operating system.
25
26 Three other files build on this one to describe a specific assembler syntax:
27 bsd386.h, att386.h, and sun386.h.
28
29 The actual tm.h file for a particular system should include
30 this file, and then the file for the appropriate assembler syntax.
31
32 Many macros that specify assembler syntax are omitted entirely from
33 this file because they really belong in the files for particular
34 assemblers. These include AS1, AS2, AS3, RP, IP, LPREFIX, L_SIZE,
35 PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE,
36 PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. */
37
38/* Names to predefine in the preprocessor for this target machine. */
39
40#define I386 1
41
42/* Stubs for half-pic support if not OSF/1 reference platform. */
43
44#ifndef HALF_PIC_P
45#define HALF_PIC_P() 0
46#define HALF_PIC_NUMBER_PTRS 0
47#define HALF_PIC_NUMBER_REFS 0
48#define HALF_PIC_ENCODE(DECL)
49#define HALF_PIC_DECLARE(NAME)
50#define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
51#define HALF_PIC_ADDRESS_P(X) 0
52#define HALF_PIC_PTR(X) X
53#define HALF_PIC_FINISH(STREAM)
54#endif
55
| 22/* The purpose of this file is to define the characteristics of the i386,
23 independent of assembler syntax or operating system.
24
25 Three other files build on this one to describe a specific assembler syntax:
26 bsd386.h, att386.h, and sun386.h.
27
28 The actual tm.h file for a particular system should include
29 this file, and then the file for the appropriate assembler syntax.
30
31 Many macros that specify assembler syntax are omitted entirely from
32 this file because they really belong in the files for particular
33 assemblers. These include AS1, AS2, AS3, RP, IP, LPREFIX, L_SIZE,
34 PUT_OP_SIZE, USE_STAR, ADDR_BEG, ADDR_END, PRINT_IREG, PRINT_SCALE,
35 PRINT_B_I_S, and many that start with ASM_ or end in ASM_OP. */
36
37/* Names to predefine in the preprocessor for this target machine. */
38
39#define I386 1
40
41/* Stubs for half-pic support if not OSF/1 reference platform. */
42
43#ifndef HALF_PIC_P
44#define HALF_PIC_P() 0
45#define HALF_PIC_NUMBER_PTRS 0
46#define HALF_PIC_NUMBER_REFS 0
47#define HALF_PIC_ENCODE(DECL)
48#define HALF_PIC_DECLARE(NAME)
49#define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
50#define HALF_PIC_ADDRESS_P(X) 0
51#define HALF_PIC_PTR(X) X
52#define HALF_PIC_FINISH(STREAM)
53#endif
54
|
| 55/* Define the specific costs for a given cpu */
56
57struct processor_costs {
58 int add; /* cost of an add instruction */
59 int lea; /* cost of a lea instruction */
60 int shift_var; /* variable shift costs */
61 int shift_const; /* constant shift costs */
62 int mult_init; /* cost of starting a multiply */
63 int mult_bit; /* cost of multiply per each bit set */
64 int divide; /* cost of a divide/mod */
65};
66
67extern struct processor_costs *ix86_cost;
68
|
56/* Run-time compilation parameters selecting different hardware subsets. */
57
58extern int target_flags;
59
60/* Macros used in the machine description to test the flags. */
61
62/* configure can arrange to make this 2, to force a 486. */
63#ifndef TARGET_CPU_DEFAULT
64#define TARGET_CPU_DEFAULT 0
65#endif
66
67/* Masks for the -m switches */
68#define MASK_80387 000000000001 /* Hardware floating point */
| 69/* Run-time compilation parameters selecting different hardware subsets. */
70
71extern int target_flags;
72
73/* Macros used in the machine description to test the flags. */
74
75/* configure can arrange to make this 2, to force a 486. */
76#ifndef TARGET_CPU_DEFAULT
77#define TARGET_CPU_DEFAULT 0
78#endif
79
80/* Masks for the -m switches */
81#define MASK_80387 000000000001 /* Hardware floating point */
|
69#define MASK_486 000000000002 /* 80486 specific */
70#define MASK_NOTUSED1 000000000004 /* bit not currently used */
| 82#define MASK_NOTUSED1 000000000002 /* bit not currently used */
83#define MASK_NOTUSED2 000000000004 /* bit not currently used */
|
71#define MASK_RTD 000000000010 /* Use ret that pops args */
72#define MASK_ALIGN_DOUBLE 000000000020 /* align doubles to 2 word boundary */
73#define MASK_SVR3_SHLIB 000000000040 /* Uninit locals into bss */
74#define MASK_IEEE_FP 000000000100 /* IEEE fp comparisons */
75#define MASK_FLOAT_RETURNS 000000000200 /* Return float in st(0) */
76#define MASK_NO_FANCY_MATH_387 000000000400 /* Disable sin, cos, sqrt */
| 84#define MASK_RTD 000000000010 /* Use ret that pops args */
85#define MASK_ALIGN_DOUBLE 000000000020 /* align doubles to 2 word boundary */
86#define MASK_SVR3_SHLIB 000000000040 /* Uninit locals into bss */
87#define MASK_IEEE_FP 000000000100 /* IEEE fp comparisons */
88#define MASK_FLOAT_RETURNS 000000000200 /* Return float in st(0) */
89#define MASK_NO_FANCY_MATH_387 000000000400 /* Disable sin, cos, sqrt */
|
77
| 90#define MASK_OMIT_LEAF_FRAME_POINTER 0x00000800 /* omit leaf frame pointers */
|
78 /* Temporary codegen switches */
79#define MASK_DEBUG_ADDR 000001000000 /* Debug GO_IF_LEGITIMATE_ADDRESS */
80#define MASK_NO_WIDE_MULTIPLY 000002000000 /* Disable 32x32->64 multiplies */
81#define MASK_NO_MOVE 000004000000 /* Don't generate mem->mem */
| 91 /* Temporary codegen switches */
92#define MASK_DEBUG_ADDR 000001000000 /* Debug GO_IF_LEGITIMATE_ADDRESS */
93#define MASK_NO_WIDE_MULTIPLY 000002000000 /* Disable 32x32->64 multiplies */
94#define MASK_NO_MOVE 000004000000 /* Don't generate mem->mem */
|
82#define MASK_DEBUG_ARG 000010000000 /* Debug function_arg */
| 95#define MASK_NO_PSEUDO 000010000000 /* Move op's args -> pseudos */
96#define MASK_DEBUG_ARG 000020000000 /* Debug function_arg */
97#define MASK_SCHEDULE_PROLOGUE 000040000000 /* Emit prologue as rtl */
98#define MASK_STACK_PROBE 000100000000 /* Enable stack probing */
|
83
84/* Use the floating point instructions */
85#define TARGET_80387 (target_flags & MASK_80387)
86
87/* Compile using ret insn that pops args.
88 This will not work unless you use prototypes at least
89 for all functions that can take varying numbers of args. */
90#define TARGET_RTD (target_flags & MASK_RTD)
91
92/* Align doubles to a two word boundary. This breaks compatibility with
93 the published ABI's for structures containing doubles, but produces
94 faster code on the pentium. */
95#define TARGET_ALIGN_DOUBLE (target_flags & MASK_ALIGN_DOUBLE)
96
97/* Put uninitialized locals into bss, not data.
98 Meaningful only on svr3. */
99#define TARGET_SVR3_SHLIB (target_flags & MASK_SVR3_SHLIB)
100
101/* Use IEEE floating point comparisons. These handle correctly the cases
102 where the result of a comparison is unordered. Normally SIGFPE is
103 generated in such cases, in which case this isn't needed. */
104#define TARGET_IEEE_FP (target_flags & MASK_IEEE_FP)
105
106/* Functions that return a floating point value may return that value
107 in the 387 FPU or in 386 integer registers. If set, this flag causes
108 the 387 to be used, which is compatible with most calling conventions. */
109#define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & MASK_FLOAT_RETURNS)
110
111/* Disable generation of FP sin, cos and sqrt operations for 387.
112 This is because FreeBSD lacks these in the math-emulator-code */
113#define TARGET_NO_FANCY_MATH_387 (target_flags & MASK_NO_FANCY_MATH_387)
114
| 99
100/* Use the floating point instructions */
101#define TARGET_80387 (target_flags & MASK_80387)
102
103/* Compile using ret insn that pops args.
104 This will not work unless you use prototypes at least
105 for all functions that can take varying numbers of args. */
106#define TARGET_RTD (target_flags & MASK_RTD)
107
108/* Align doubles to a two word boundary. This breaks compatibility with
109 the published ABI's for structures containing doubles, but produces
110 faster code on the pentium. */
111#define TARGET_ALIGN_DOUBLE (target_flags & MASK_ALIGN_DOUBLE)
112
113/* Put uninitialized locals into bss, not data.
114 Meaningful only on svr3. */
115#define TARGET_SVR3_SHLIB (target_flags & MASK_SVR3_SHLIB)
116
117/* Use IEEE floating point comparisons. These handle correctly the cases
118 where the result of a comparison is unordered. Normally SIGFPE is
119 generated in such cases, in which case this isn't needed. */
120#define TARGET_IEEE_FP (target_flags & MASK_IEEE_FP)
121
122/* Functions that return a floating point value may return that value
123 in the 387 FPU or in 386 integer registers. If set, this flag causes
124 the 387 to be used, which is compatible with most calling conventions. */
125#define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & MASK_FLOAT_RETURNS)
126
127/* Disable generation of FP sin, cos and sqrt operations for 387.
128 This is because FreeBSD lacks these in the math-emulator-code */
129#define TARGET_NO_FANCY_MATH_387 (target_flags & MASK_NO_FANCY_MATH_387)
130
|
| 131/* Don't create frame pointers for leaf functions */
132#define TARGET_OMIT_LEAF_FRAME_POINTER (target_flags & MASK_OMIT_LEAF_FRAME_POINTER)
133
|
115/* Temporary switches for tuning code generation */
116
117/* Disable 32x32->64 bit multiplies that are used for long long multiplies
118 and division by constants, but sometimes cause reload problems. */
119#define TARGET_NO_WIDE_MULTIPLY (target_flags & MASK_NO_WIDE_MULTIPLY)
120#define TARGET_WIDE_MULTIPLY (!TARGET_NO_WIDE_MULTIPLY)
121
| 134/* Temporary switches for tuning code generation */
135
136/* Disable 32x32->64 bit multiplies that are used for long long multiplies
137 and division by constants, but sometimes cause reload problems. */
138#define TARGET_NO_WIDE_MULTIPLY (target_flags & MASK_NO_WIDE_MULTIPLY)
139#define TARGET_WIDE_MULTIPLY (!TARGET_NO_WIDE_MULTIPLY)
140
|
| 141/* Emit/Don't emit prologue as rtl */
142#define TARGET_SCHEDULE_PROLOGUE (target_flags & MASK_SCHEDULE_PROLOGUE)
143
|
122/* Debug GO_IF_LEGITIMATE_ADDRESS */
123#define TARGET_DEBUG_ADDR (target_flags & MASK_DEBUG_ADDR)
124
125/* Debug FUNCTION_ARG macros */
126#define TARGET_DEBUG_ARG (target_flags & MASK_DEBUG_ARG)
127
128/* Hack macros for tuning code generation */
129#define TARGET_MOVE ((target_flags & MASK_NO_MOVE) == 0) /* Don't generate memory->memory */
| 144/* Debug GO_IF_LEGITIMATE_ADDRESS */
145#define TARGET_DEBUG_ADDR (target_flags & MASK_DEBUG_ADDR)
146
147/* Debug FUNCTION_ARG macros */
148#define TARGET_DEBUG_ARG (target_flags & MASK_DEBUG_ARG)
149
150/* Hack macros for tuning code generation */
151#define TARGET_MOVE ((target_flags & MASK_NO_MOVE) == 0) /* Don't generate memory->memory */
|
| 152#define TARGET_PSEUDO ((target_flags & MASK_NO_PSEUDO) == 0) /* Move op's args into pseudos */
|
130
| 153
|
131/* Specific hardware switches */
132#define TARGET_486 (target_flags & MASK_486) /* 80486DX, 80486SX, 80486DX[24] */
133#define TARGET_386 (!TARGET_486) /* 80386 */
| 154#define TARGET_386 (ix86_cpu == PROCESSOR_I386)
155#define TARGET_486 (ix86_cpu == PROCESSOR_I486)
156#define TARGET_PENTIUM (ix86_cpu == PROCESSOR_PENTIUM)
157#define TARGET_PENTIUMPRO (ix86_cpu == PROCESSOR_PENTIUMPRO)
158#define TARGET_USE_LEAVE (ix86_cpu == PROCESSOR_I386)
159#define TARGET_PUSH_MEMORY (ix86_cpu == PROCESSOR_I386)
160#define TARGET_ZERO_EXTEND_WITH_AND (ix86_cpu != PROCESSOR_I386 \
161 && ix86_cpu != PROCESSOR_PENTIUMPRO)
162#define TARGET_DOUBLE_WITH_ADD (ix86_cpu != PROCESSOR_I386)
163#define TARGET_USE_BIT_TEST (ix86_cpu == PROCESSOR_I386)
164#define TARGET_UNROLL_STRLEN (ix86_cpu != PROCESSOR_I386)
165#define TARGET_USE_Q_REG (ix86_cpu == PROCESSOR_PENTIUM \
166 || ix86_cpu == PROCESSOR_PENTIUMPRO)
167#define TARGET_USE_ANY_REG (ix86_cpu == PROCESSOR_I486)
168#define TARGET_CMOVE (ix86_arch == PROCESSOR_PENTIUMPRO)
169#define TARGET_DEEP_BRANCH_PREDICTION (ix86_cpu == PROCESSOR_PENTIUMPRO)
170#define TARGET_STACK_PROBE (target_flags & MASK_STACK_PROBE)
|
134
135#define TARGET_SWITCHES \
136{ { "80387", MASK_80387 }, \
137 { "no-80387", -MASK_80387 }, \
138 { "hard-float", MASK_80387 }, \
139 { "soft-float", -MASK_80387 }, \
140 { "no-soft-float", MASK_80387 }, \
| 171
172#define TARGET_SWITCHES \
173{ { "80387", MASK_80387 }, \
174 { "no-80387", -MASK_80387 }, \
175 { "hard-float", MASK_80387 }, \
176 { "soft-float", -MASK_80387 }, \
177 { "no-soft-float", MASK_80387 }, \
|
141 { "386", -MASK_486 }, \
142 { "no-386", MASK_486 }, \
143 { "486", MASK_486 }, \
144 { "no-486", -MASK_486 }, \
| 178 { "386", 0 }, \
179 { "no-386", 0 }, \
180 { "486", 0 }, \
181 { "no-486", 0 }, \
182 { "pentium", 0 }, \
183 { "pentiumpro", 0 }, \
|
145 { "rtd", MASK_RTD }, \
146 { "no-rtd", -MASK_RTD }, \
147 { "align-double", MASK_ALIGN_DOUBLE }, \
148 { "no-align-double", -MASK_ALIGN_DOUBLE }, \
149 { "svr3-shlib", MASK_SVR3_SHLIB }, \
150 { "no-svr3-shlib", -MASK_SVR3_SHLIB }, \
151 { "ieee-fp", MASK_IEEE_FP }, \
152 { "no-ieee-fp", -MASK_IEEE_FP }, \
153 { "fp-ret-in-387", MASK_FLOAT_RETURNS }, \
154 { "no-fp-ret-in-387", -MASK_FLOAT_RETURNS }, \
155 { "no-fancy-math-387", MASK_NO_FANCY_MATH_387 }, \
156 { "fancy-math-387", -MASK_NO_FANCY_MATH_387 }, \
| 184 { "rtd", MASK_RTD }, \
185 { "no-rtd", -MASK_RTD }, \
186 { "align-double", MASK_ALIGN_DOUBLE }, \
187 { "no-align-double", -MASK_ALIGN_DOUBLE }, \
188 { "svr3-shlib", MASK_SVR3_SHLIB }, \
189 { "no-svr3-shlib", -MASK_SVR3_SHLIB }, \
190 { "ieee-fp", MASK_IEEE_FP }, \
191 { "no-ieee-fp", -MASK_IEEE_FP }, \
192 { "fp-ret-in-387", MASK_FLOAT_RETURNS }, \
193 { "no-fp-ret-in-387", -MASK_FLOAT_RETURNS }, \
194 { "no-fancy-math-387", MASK_NO_FANCY_MATH_387 }, \
195 { "fancy-math-387", -MASK_NO_FANCY_MATH_387 }, \
|
| 196 { "omit-leaf-frame-pointer", MASK_OMIT_LEAF_FRAME_POINTER }, \
197 { "no-omit-leaf-frame-pointer",-MASK_OMIT_LEAF_FRAME_POINTER }, \
|
157 { "no-wide-multiply", MASK_NO_WIDE_MULTIPLY }, \
158 { "wide-multiply", -MASK_NO_WIDE_MULTIPLY }, \
| 198 { "no-wide-multiply", MASK_NO_WIDE_MULTIPLY }, \
199 { "wide-multiply", -MASK_NO_WIDE_MULTIPLY }, \
|
| 200 { "schedule-prologue", MASK_SCHEDULE_PROLOGUE }, \
201 { "no-schedule-prologue", -MASK_SCHEDULE_PROLOGUE }, \
|
159 { "debug-addr", MASK_DEBUG_ADDR }, \
160 { "no-debug-addr", -MASK_DEBUG_ADDR }, \
161 { "move", -MASK_NO_MOVE }, \
162 { "no-move", MASK_NO_MOVE }, \
163 { "debug-arg", MASK_DEBUG_ARG }, \
164 { "no-debug-arg", -MASK_DEBUG_ARG }, \
| 202 { "debug-addr", MASK_DEBUG_ADDR }, \
203 { "no-debug-addr", -MASK_DEBUG_ADDR }, \
204 { "move", -MASK_NO_MOVE }, \
205 { "no-move", MASK_NO_MOVE }, \
206 { "debug-arg", MASK_DEBUG_ARG }, \
207 { "no-debug-arg", -MASK_DEBUG_ARG }, \
|
| 208 { "stack-arg-probe", MASK_STACK_PROBE }, \
209 { "no-stack-arg-probe", -MASK_STACK_PROBE }, \
210 { "windows", 0 }, \
211 { "dll", 0 }, \
|
165 SUBTARGET_SWITCHES \
| 212 SUBTARGET_SWITCHES \
|
166 { "", TARGET_DEFAULT | TARGET_CPU_DEFAULT}}
| 213 { "", MASK_SCHEDULE_PROLOGUE | TARGET_DEFAULT}}
|
167
| 214
|
| 215/* Which processor to schedule for. The cpu attribute defines a list that
216 mirrors this list, so changes to i386.md must be made at the same time. */
217
218enum processor_type
219 {PROCESSOR_I386, /* 80386 */
220 PROCESSOR_I486, /* 80486DX, 80486SX, 80486DX[24] */
221 PROCESSOR_PENTIUM,
222 PROCESSOR_PENTIUMPRO};
223
224#define PROCESSOR_I386_STRING "i386"
225#define PROCESSOR_I486_STRING "i486"
226#define PROCESSOR_I586_STRING "i586"
227#define PROCESSOR_PENTIUM_STRING "pentium"
228#define PROCESSOR_I686_STRING "i686"
229#define PROCESSOR_PENTIUMPRO_STRING "pentiumpro"
230
231extern enum processor_type ix86_cpu;
232
233extern int ix86_arch;
234
235/* Define the default processor. This is overridden by other tm.h files. */
236#define PROCESSOR_DEFAULT \
237 ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_I486) \
238 ? PROCESSOR_I486 \
239 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUM) \
240 ? PROCESSOR_PENTIUM \
241 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUMPRO) \
242 ? PROCESSOR_PENTIUMPRO \
243 : PROCESSOR_I386
244#define PROCESSOR_DEFAULT_STRING \
245 ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_I486) \
246 ? PROCESSOR_I486_STRING \
247 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUM) \
248 ? PROCESSOR_PENTIUM_STRING \
249 : ((enum processor_type) TARGET_CPU_DEFAULT == PROCESSOR_PENTIUMPRO) \
250 ? PROCESSOR_PENTIUMPRO_STRING \
251 : PROCESSOR_I386_STRING
252
|
168/* This macro is similar to `TARGET_SWITCHES' but defines names of
169 command options that have values. Its definition is an
170 initializer with a subgrouping for each command option.
171
172 Each subgrouping contains a string constant, that defines the
173 fixed part of the option name, and the address of a variable. The
174 variable, type `char *', is set to the variable part of the given
175 option if the fixed part matches. The actual option name is made
176 by appending `-m' to the specified name. */
177#define TARGET_OPTIONS \
| 253/* This macro is similar to `TARGET_SWITCHES' but defines names of
254 command options that have values. Its definition is an
255 initializer with a subgrouping for each command option.
256
257 Each subgrouping contains a string constant, that defines the
258 fixed part of the option name, and the address of a variable. The
259 variable, type `char *', is set to the variable part of the given
260 option if the fixed part matches. The actual option name is made
261 by appending `-m' to the specified name. */
262#define TARGET_OPTIONS \
|
178{ { "reg-alloc=", &i386_reg_alloc_order }, \
| 263{ { "cpu=", &ix86_cpu_string}, \
264 { "arch=", &ix86_arch_string}, \
265 { "reg-alloc=", &i386_reg_alloc_order }, \
|
179 { "regparm=", &i386_regparm_string }, \
180 { "align-loops=", &i386_align_loops_string }, \
181 { "align-jumps=", &i386_align_jumps_string }, \
182 { "align-functions=", &i386_align_funcs_string }, \
| 266 { "regparm=", &i386_regparm_string }, \
267 { "align-loops=", &i386_align_loops_string }, \
268 { "align-jumps=", &i386_align_jumps_string }, \
269 { "align-functions=", &i386_align_funcs_string }, \
|
| 270 { "branch-cost=", &i386_branch_cost_string }, \
|
183 SUBTARGET_OPTIONS \
184}
185
186/* Sometimes certain combinations of command options do not make
187 sense on a particular target machine. You can define a macro
188 `OVERRIDE_OPTIONS' to take account of this. This macro, if
189 defined, is executed once just after all the command options have
190 been parsed.
191
192 Don't use this macro to turn on various extra optimizations for
193 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
194
195#define OVERRIDE_OPTIONS override_options ()
196
197/* These are meant to be redefined in the host dependent files */
198#define SUBTARGET_SWITCHES
199#define SUBTARGET_OPTIONS
200
| 271 SUBTARGET_OPTIONS \
272}
273
274/* Sometimes certain combinations of command options do not make
275 sense on a particular target machine. You can define a macro
276 `OVERRIDE_OPTIONS' to take account of this. This macro, if
277 defined, is executed once just after all the command options have
278 been parsed.
279
280 Don't use this macro to turn on various extra optimizations for
281 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
282
283#define OVERRIDE_OPTIONS override_options ()
284
285/* These are meant to be redefined in the host dependent files */
286#define SUBTARGET_SWITCHES
287#define SUBTARGET_OPTIONS
288
|
| 289/* Define this to change the optimizations performed by default. */
290#define OPTIMIZATION_OPTIONS(LEVEL,SIZE) optimization_options(LEVEL,SIZE)
291
292/* Specs for the compiler proper */
293
294#ifndef CC1_CPU_SPEC
295#define CC1_CPU_SPEC "\
296%{!mcpu*: \
297%{m386:-mcpu=i386 -march=i386} \
298%{mno-486:-mcpu=i386 -march=i386} \
299%{m486:-mcpu=i486 -march=i486} \
300%{mno-386:-mcpu=i486 -march=i486} \
301%{mno-pentium:-mcpu=i486 -march=i486} \
302%{mpentium:-mcpu=pentium} \
303%{mno-pentiumpro:-mcpu=pentium} \
304%{mpentiumpro:-mcpu=pentiumpro}}"
305#endif
|
201
| 306
|
| 307#define CPP_486_SPEC "%{!ansi:-Di486} -D__i486 -D__i486__"
308#define CPP_586_SPEC "%{!ansi:-Di586 -Dpentium} \
309 -D__i586 -D__i586__ -D__pentium -D__pentium__"
310#define CPP_686_SPEC "%{!ansi:-Di686 -Dpentiumpro} \
311 -D__i686 -D__i686__ -D__pentiumpro -D__pentiumpro__"
312
313#ifndef CPP_CPU_DEFAULT_SPEC
314#if TARGET_CPU_DEFAULT == 1
315#define CPP_CPU_DEFAULT_SPEC "%(cpp_486)"
316#else
317#if TARGET_CPU_DEFAULT == 2
318#define CPP_CPU_DEFAULT_SPEC "%(cpp_586)"
319#else
320#if TARGET_CPU_DEFAULT == 3
321#define CPP_CPU_DEFAULT_SPEC "%(cpp_686)"
322#else
323#define CPP_CPU_DEFAULT_SPEC ""
324#endif
325#endif
326#endif
327#endif /* CPP_CPU_DEFAULT_SPEC */
328
329#ifndef CPP_CPU_SPEC
330#define CPP_CPU_SPEC "\
331-Asystem(unix) -Acpu(i386) -Amachine(i386) \
332%{!ansi:-Di386} -D__i386 -D__i386__ \
333%{mcpu=i486:%(cpp_486)} %{m486:%(cpp_486)} \
334%{mpentium:%(cpp_586)} %{mcpu=pentium:%(cpp_586)} \
335%{mpentiumpro:%(cpp_686)} %{mcpu=pentiumpro:%(cpp_686)} \
336%{!mcpu*:%{!m486:%{!mpentium*:%(cpp_cpu_default)}}}"
337#endif
338
339#ifndef CC1_SPEC
340#define CC1_SPEC "%(cc1_spec) "
341#endif
342
343/* This macro defines names of additional specifications to put in the
344 specs that can be used in various specifications like CC1_SPEC. Its
345 definition is an initializer with a subgrouping for each command option.
346
347 Each subgrouping contains a string constant, that defines the
348 specification name, and a string constant that used by the GNU CC driver
349 program.
350
351 Do not define this macro if it does not need to do anything. */
352
353#ifndef SUBTARGET_EXTRA_SPECS
354#define SUBTARGET_EXTRA_SPECS
355#endif
356
357#define EXTRA_SPECS \
358 { "cpp_486", CPP_486_SPEC}, \
359 { "cpp_586", CPP_586_SPEC}, \
360 { "cpp_686", CPP_686_SPEC}, \
361 { "cpp_cpu_default", CPP_CPU_DEFAULT_SPEC }, \
362 { "cpp_cpu", CPP_CPU_SPEC }, \
363 { "cc1_cpu", CC1_CPU_SPEC }, \
364 SUBTARGET_EXTRA_SPECS
365
|
202/* target machine storage layout */
203
204/* Define for XFmode extended real floating point support.
205 This will automatically cause REAL_ARITHMETIC to be defined. */
206#define LONG_DOUBLE_TYPE_SIZE 96
207
208/* Define if you don't want extended real, but do want to use the
209 software floating point emulator for REAL_ARITHMETIC and
210 decimal <-> binary conversion. */
211/* #define REAL_ARITHMETIC */
212
213/* Define this if most significant byte of a word is the lowest numbered. */
214/* That is true on the 80386. */
215
216#define BITS_BIG_ENDIAN 0
217
218/* Define this if most significant byte of a word is the lowest numbered. */
219/* That is not true on the 80386. */
220#define BYTES_BIG_ENDIAN 0
221
222/* Define this if most significant word of a multiword number is the lowest
223 numbered. */
224/* Not true for 80386 */
225#define WORDS_BIG_ENDIAN 0
226
227/* number of bits in an addressable storage unit */
228#define BITS_PER_UNIT 8
229
230/* Width in bits of a "word", which is the contents of a machine register.
231 Note that this is not necessarily the width of data type `int';
232 if using 16-bit ints on a 80386, this would still be 32.
233 But on a machine with 16-bit registers, this would be 16. */
234#define BITS_PER_WORD 32
235
236/* Width of a word, in units (bytes). */
237#define UNITS_PER_WORD 4
238
239/* Width in bits of a pointer.
240 See also the macro `Pmode' defined below. */
241#define POINTER_SIZE 32
242
243/* Allocation boundary (in *bits*) for storing arguments in argument list. */
244#define PARM_BOUNDARY 32
245
246/* Boundary (in *bits*) on which stack pointer should be aligned. */
247#define STACK_BOUNDARY 32
248
249/* Allocation boundary (in *bits*) for the code of a function.
250 For i486, we get better performance by aligning to a cache
251 line (i.e. 16 byte) boundary. */
252#define FUNCTION_BOUNDARY (1 << (i386_align_funcs + 3))
253
254/* Alignment of field after `int : 0' in a structure. */
255
256#define EMPTY_FIELD_BOUNDARY 32
257
258/* Minimum size in bits of the largest boundary to which any
259 and all fundamental data types supported by the hardware
260 might need to be aligned. No data type wants to be aligned
261 rounder than this. The i386 supports 64-bit floating point
262 quantities, but these can be aligned on any 32-bit boundary.
263 The published ABIs say that doubles should be aligned on word
264 boundaries, but the Pentium gets better performance with them
265 aligned on 64 bit boundaries. */
266#define BIGGEST_ALIGNMENT (TARGET_ALIGN_DOUBLE ? 64 : 32)
267
| 366/* target machine storage layout */
367
368/* Define for XFmode extended real floating point support.
369 This will automatically cause REAL_ARITHMETIC to be defined. */
370#define LONG_DOUBLE_TYPE_SIZE 96
371
372/* Define if you don't want extended real, but do want to use the
373 software floating point emulator for REAL_ARITHMETIC and
374 decimal <-> binary conversion. */
375/* #define REAL_ARITHMETIC */
376
377/* Define this if most significant byte of a word is the lowest numbered. */
378/* That is true on the 80386. */
379
380#define BITS_BIG_ENDIAN 0
381
382/* Define this if most significant byte of a word is the lowest numbered. */
383/* That is not true on the 80386. */
384#define BYTES_BIG_ENDIAN 0
385
386/* Define this if most significant word of a multiword number is the lowest
387 numbered. */
388/* Not true for 80386 */
389#define WORDS_BIG_ENDIAN 0
390
391/* number of bits in an addressable storage unit */
392#define BITS_PER_UNIT 8
393
394/* Width in bits of a "word", which is the contents of a machine register.
395 Note that this is not necessarily the width of data type `int';
396 if using 16-bit ints on a 80386, this would still be 32.
397 But on a machine with 16-bit registers, this would be 16. */
398#define BITS_PER_WORD 32
399
400/* Width of a word, in units (bytes). */
401#define UNITS_PER_WORD 4
402
403/* Width in bits of a pointer.
404 See also the macro `Pmode' defined below. */
405#define POINTER_SIZE 32
406
407/* Allocation boundary (in *bits*) for storing arguments in argument list. */
408#define PARM_BOUNDARY 32
409
410/* Boundary (in *bits*) on which stack pointer should be aligned. */
411#define STACK_BOUNDARY 32
412
413/* Allocation boundary (in *bits*) for the code of a function.
414 For i486, we get better performance by aligning to a cache
415 line (i.e. 16 byte) boundary. */
416#define FUNCTION_BOUNDARY (1 << (i386_align_funcs + 3))
417
418/* Alignment of field after `int : 0' in a structure. */
419
420#define EMPTY_FIELD_BOUNDARY 32
421
422/* Minimum size in bits of the largest boundary to which any
423 and all fundamental data types supported by the hardware
424 might need to be aligned. No data type wants to be aligned
425 rounder than this. The i386 supports 64-bit floating point
426 quantities, but these can be aligned on any 32-bit boundary.
427 The published ABIs say that doubles should be aligned on word
428 boundaries, but the Pentium gets better performance with them
429 aligned on 64 bit boundaries. */
430#define BIGGEST_ALIGNMENT (TARGET_ALIGN_DOUBLE ? 64 : 32)
431
|
| 432/* If defined, a C expression to compute the alignment given to a
433 constant that is being placed in memory. CONSTANT is the constant
434 and ALIGN is the alignment that the object would ordinarily have.
435 The value of this macro is used instead of that alignment to align
436 the object.
437
438 If this macro is not defined, then ALIGN is used.
439
440 The typical use of this macro is to increase alignment for string
441 constants to be word aligned so that `strcpy' calls that copy
442 constants can be done inline. */
443
444#define CONSTANT_ALIGNMENT(EXP, ALIGN) \
445 (TREE_CODE (EXP) == REAL_CST \
446 ? ((TYPE_MODE (TREE_TYPE (EXP)) == DFmode && (ALIGN) < 64) \
447 ? 64 \
448 : (TYPE_MODE (TREE_TYPE (EXP)) == XFmode && (ALIGN) < 128) \
449 ? 128 \
450 : (ALIGN)) \
451 : TREE_CODE (EXP) == STRING_CST \
452 ? ((TREE_STRING_LENGTH (EXP) >= 31 && (ALIGN) < 256) \
453 ? 256 \
454 : (ALIGN)) \
455 : (ALIGN))
456
457/* If defined, a C expression to compute the alignment for a static
458 variable. TYPE is the data type, and ALIGN is the alignment that
459 the object would ordinarily have. The value of this macro is used
460 instead of that alignment to align the object.
461
462 If this macro is not defined, then ALIGN is used.
463
464 One use of this macro is to increase alignment of medium-size
465 data to make it all fit in fewer cache lines. Another is to
466 cause character arrays to be word-aligned so that `strcpy' calls
467 that copy constants to character arrays can be done inline. */
468
469#define DATA_ALIGNMENT(TYPE, ALIGN) \
470 ((AGGREGATE_TYPE_P (TYPE) \
471 && TYPE_SIZE (TYPE) \
472 && TREE_CODE (TYPE_SIZE (TYPE)) == INTEGER_CST \
473 && (TREE_INT_CST_LOW (TYPE_SIZE (TYPE)) >= 256 \
474 || TREE_INT_CST_HIGH (TYPE_SIZE (TYPE))) && (ALIGN) < 256) \
475 ? 256 \
476 : TREE_CODE (TYPE) == ARRAY_TYPE \
477 ? ((TYPE_MODE (TREE_TYPE (TYPE)) == DFmode && (ALIGN) < 64) \
478 ? 64 \
479 : (TYPE_MODE (TREE_TYPE (TYPE)) == XFmode && (ALIGN) < 128) \
480 ? 128 \
481 : (ALIGN)) \
482 : TREE_CODE (TYPE) == COMPLEX_TYPE \
483 ? ((TYPE_MODE (TYPE) == DCmode && (ALIGN) < 64) \
484 ? 64 \
485 : (TYPE_MODE (TYPE) == XCmode && (ALIGN) < 128) \
486 ? 128 \
487 : (ALIGN)) \
488 : ((TREE_CODE (TYPE) == RECORD_TYPE \
489 || TREE_CODE (TYPE) == UNION_TYPE \
490 || TREE_CODE (TYPE) == QUAL_UNION_TYPE) \
491 && TYPE_FIELDS (TYPE)) \
492 ? ((DECL_MODE (TYPE_FIELDS (TYPE)) == DFmode && (ALIGN) < 64) \
493 ? 64 \
494 : (DECL_MODE (TYPE_FIELDS (TYPE)) == XFmode && (ALIGN) < 128) \
495 ? 128 \
496 : (ALIGN)) \
497 : TREE_CODE (TYPE) == REAL_TYPE \
498 ? ((TYPE_MODE (TYPE) == DFmode && (ALIGN) < 64) \
499 ? 64 \
500 : (TYPE_MODE (TYPE) == XFmode && (ALIGN) < 128) \
501 ? 128 \
502 : (ALIGN)) \
503 : (ALIGN))
504
|
268/* Set this non-zero if move instructions will actually fail to work
269 when given unaligned data. */
270#define STRICT_ALIGNMENT 0
271
272/* If bit field type is int, don't let it cross an int,
273 and give entire struct the alignment of an int. */
274/* Required on the 386 since it doesn't have bitfield insns. */
275#define PCC_BITFIELD_TYPE_MATTERS 1
276
277/* Maximum power of 2 that code can be aligned to. */
278#define MAX_CODE_ALIGN 6 /* 64 byte alignment */
279
280/* Align loop starts for optimal branching. */
| 505/* Set this non-zero if move instructions will actually fail to work
506 when given unaligned data. */
507#define STRICT_ALIGNMENT 0
508
509/* If bit field type is int, don't let it cross an int,
510 and give entire struct the alignment of an int. */
511/* Required on the 386 since it doesn't have bitfield insns. */
512#define PCC_BITFIELD_TYPE_MATTERS 1
513
514/* Maximum power of 2 that code can be aligned to. */
515#define MAX_CODE_ALIGN 6 /* 64 byte alignment */
516
517/* Align loop starts for optimal branching. */
|
281#define ASM_OUTPUT_LOOP_ALIGN(FILE) ASM_OUTPUT_ALIGN (FILE, i386_align_loops)
| 518#define LOOP_ALIGN(LABEL) (i386_align_loops)
519#define LOOP_ALIGN_MAX_SKIP (i386_align_loops_string ? 0 : 7)
|
282
283/* This is how to align an instruction for optimal branching.
284 On i486 we'll get better performance by aligning on a
285 cache line (i.e. 16 byte) boundary. */
| 520
521/* This is how to align an instruction for optimal branching.
522 On i486 we'll get better performance by aligning on a
523 cache line (i.e. 16 byte) boundary. */
|
286#define ASM_OUTPUT_ALIGN_CODE(FILE) ASM_OUTPUT_ALIGN ((FILE), i386_align_jumps)
| 524#define LABEL_ALIGN_AFTER_BARRIER(LABEL) (i386_align_jumps)
525#define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP (i386_align_jumps_string ? 0 : 7)
|
287
288
289/* Standard register usage. */
290
291/* This processor has special stack-like registers. See reg-stack.c
292 for details. */
293
294#define STACK_REGS
| 526
527
528/* Standard register usage. */
529
530/* This processor has special stack-like registers. See reg-stack.c
531 for details. */
532
533#define STACK_REGS
|
| 534#define IS_STACK_MODE(mode) (mode==DFmode || mode==SFmode || mode==XFmode)
|
295
296/* Number of actual hardware registers.
297 The hardware registers are assigned numbers for the compiler
298 from 0 to just below FIRST_PSEUDO_REGISTER.
299 All registers that the compiler knows about must be given numbers,
300 even those that are not normally considered general registers.
301
302 In the 80386 we give the 8 general purpose registers the numbers 0-7.
303 We number the floating point registers 8-15.
304 Note that registers 0-7 can be accessed as a short or int,
305 while only 0-3 may be used with byte `mov' instructions.
306
307 Reg 16 does not correspond to any hardware register, but instead
308 appears in the RTL as an argument pointer prior to reload, and is
309 eliminated during reloading in favor of either the stack or frame
310 pointer. */
311
312#define FIRST_PSEUDO_REGISTER 17
313
314/* 1 for registers that have pervasive standard uses
315 and are not available for the register allocator.
316 On the 80386, the stack pointer is such, as is the arg pointer. */
317#define FIXED_REGISTERS \
318/*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
319{ 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
320
321/* 1 for registers not available across function calls.
322 These must include the FIXED_REGISTERS and also any
323 registers that can be used without being saved.
324 The latter must include the registers where values are returned
325 and the register where structure-value addresses are passed.
326 Aside from that, you can include as many other registers as you like. */
327
328#define CALL_USED_REGISTERS \
329/*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
330{ 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
331
332/* Order in which to allocate registers. Each register must be
333 listed once, even those in FIXED_REGISTERS. List frame pointer
334 late and fixed registers last. Note that, in general, we prefer
335 registers listed in CALL_USED_REGISTERS, keeping the others
336 available for storage of persistent values.
337
338 Three different versions of REG_ALLOC_ORDER have been tried:
339
340 If the order is edx, ecx, eax, ... it produces a slightly faster compiler,
341 but slower code on simple functions returning values in eax.
342
343 If the order is eax, ecx, edx, ... it causes reload to abort when compiling
344 perl 4.036 due to not being able to create a DImode register (to hold a 2
345 word union).
346
347 If the order is eax, edx, ecx, ... it produces better code for simple
348 functions, and a slightly slower compiler. Users complained about the code
349 generated by allocating edx first, so restore the 'natural' order of things. */
350
351#define REG_ALLOC_ORDER \
352/*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
353{ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16 }
354
355/* A C statement (sans semicolon) to choose the order in which to
356 allocate hard registers for pseudo-registers local to a basic
357 block.
358
359 Store the desired register order in the array `reg_alloc_order'.
360 Element 0 should be the register to allocate first; element 1, the
361 next register; and so on.
362
363 The macro body should not assume anything about the contents of
364 `reg_alloc_order' before execution of the macro.
365
366 On most machines, it is not necessary to define this macro. */
367
368#define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
369
370/* Macro to conditionally modify fixed_regs/call_used_regs. */
371#define CONDITIONAL_REGISTER_USAGE \
372 { \
373 if (flag_pic) \
374 { \
375 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
376 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
377 } \
378 if (! TARGET_80387 && ! TARGET_FLOAT_RETURNS_IN_80387) \
379 { \
380 int i; \
381 HARD_REG_SET x; \
382 COPY_HARD_REG_SET (x, reg_class_contents[(int)FLOAT_REGS]); \
383 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
384 if (TEST_HARD_REG_BIT (x, i)) \
385 fixed_regs[i] = call_used_regs[i] = 1; \
386 } \
387 }
388
389/* Return number of consecutive hard regs needed starting at reg REGNO
390 to hold something of mode MODE.
391 This is ordinarily the length in words of a value of mode MODE
392 but can be less for certain modes in special long registers.
393
394 Actually there are no two word move instructions for consecutive
395 registers. And only registers 0-3 may have mov byte instructions
396 applied to them.
397 */
398
399#define HARD_REGNO_NREGS(REGNO, MODE) \
400 (FP_REGNO_P (REGNO) ? 1 \
401 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
402
403/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
404 On the 80386, the first 4 cpu registers can hold any mode
405 while the floating point registers may hold only floating point.
406 Make it clear that the fp regs could not hold a 16-byte float. */
407
408/* The casts to int placate a compiler on a microvax,
409 for cross-compiler testing. */
410
411#define HARD_REGNO_MODE_OK(REGNO, MODE) \
| 535
536/* Number of actual hardware registers.
537 The hardware registers are assigned numbers for the compiler
538 from 0 to just below FIRST_PSEUDO_REGISTER.
539 All registers that the compiler knows about must be given numbers,
540 even those that are not normally considered general registers.
541
542 In the 80386 we give the 8 general purpose registers the numbers 0-7.
543 We number the floating point registers 8-15.
544 Note that registers 0-7 can be accessed as a short or int,
545 while only 0-3 may be used with byte `mov' instructions.
546
547 Reg 16 does not correspond to any hardware register, but instead
548 appears in the RTL as an argument pointer prior to reload, and is
549 eliminated during reloading in favor of either the stack or frame
550 pointer. */
551
552#define FIRST_PSEUDO_REGISTER 17
553
554/* 1 for registers that have pervasive standard uses
555 and are not available for the register allocator.
556 On the 80386, the stack pointer is such, as is the arg pointer. */
557#define FIXED_REGISTERS \
558/*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
559{ 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1 }
560
561/* 1 for registers not available across function calls.
562 These must include the FIXED_REGISTERS and also any
563 registers that can be used without being saved.
564 The latter must include the registers where values are returned
565 and the register where structure-value addresses are passed.
566 Aside from that, you can include as many other registers as you like. */
567
568#define CALL_USED_REGISTERS \
569/*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
570{ 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 }
571
572/* Order in which to allocate registers. Each register must be
573 listed once, even those in FIXED_REGISTERS. List frame pointer
574 late and fixed registers last. Note that, in general, we prefer
575 registers listed in CALL_USED_REGISTERS, keeping the others
576 available for storage of persistent values.
577
578 Three different versions of REG_ALLOC_ORDER have been tried:
579
580 If the order is edx, ecx, eax, ... it produces a slightly faster compiler,
581 but slower code on simple functions returning values in eax.
582
583 If the order is eax, ecx, edx, ... it causes reload to abort when compiling
584 perl 4.036 due to not being able to create a DImode register (to hold a 2
585 word union).
586
587 If the order is eax, edx, ecx, ... it produces better code for simple
588 functions, and a slightly slower compiler. Users complained about the code
589 generated by allocating edx first, so restore the 'natural' order of things. */
590
591#define REG_ALLOC_ORDER \
592/*ax,dx,cx,bx,si,di,bp,sp,st,st1,st2,st3,st4,st5,st6,st7,arg*/ \
593{ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16 }
594
595/* A C statement (sans semicolon) to choose the order in which to
596 allocate hard registers for pseudo-registers local to a basic
597 block.
598
599 Store the desired register order in the array `reg_alloc_order'.
600 Element 0 should be the register to allocate first; element 1, the
601 next register; and so on.
602
603 The macro body should not assume anything about the contents of
604 `reg_alloc_order' before execution of the macro.
605
606 On most machines, it is not necessary to define this macro. */
607
608#define ORDER_REGS_FOR_LOCAL_ALLOC order_regs_for_local_alloc ()
609
610/* Macro to conditionally modify fixed_regs/call_used_regs. */
611#define CONDITIONAL_REGISTER_USAGE \
612 { \
613 if (flag_pic) \
614 { \
615 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
616 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
617 } \
618 if (! TARGET_80387 && ! TARGET_FLOAT_RETURNS_IN_80387) \
619 { \
620 int i; \
621 HARD_REG_SET x; \
622 COPY_HARD_REG_SET (x, reg_class_contents[(int)FLOAT_REGS]); \
623 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++ ) \
624 if (TEST_HARD_REG_BIT (x, i)) \
625 fixed_regs[i] = call_used_regs[i] = 1; \
626 } \
627 }
628
629/* Return number of consecutive hard regs needed starting at reg REGNO
630 to hold something of mode MODE.
631 This is ordinarily the length in words of a value of mode MODE
632 but can be less for certain modes in special long registers.
633
634 Actually there are no two word move instructions for consecutive
635 registers. And only registers 0-3 may have mov byte instructions
636 applied to them.
637 */
638
639#define HARD_REGNO_NREGS(REGNO, MODE) \
640 (FP_REGNO_P (REGNO) ? 1 \
641 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
642
643/* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
644 On the 80386, the first 4 cpu registers can hold any mode
645 while the floating point registers may hold only floating point.
646 Make it clear that the fp regs could not hold a 16-byte float. */
647
648/* The casts to int placate a compiler on a microvax,
649 for cross-compiler testing. */
650
651#define HARD_REGNO_MODE_OK(REGNO, MODE) \
|
412 ((REGNO) < 2 ? 1 \
413 : (REGNO) < 4 ? 1 \
| 652 ((REGNO) < 4 ? 1 \
|
414 : FP_REGNO_P (REGNO) \
415 ? (((int) GET_MODE_CLASS (MODE) == (int) MODE_FLOAT \
416 || (int) GET_MODE_CLASS (MODE) == (int) MODE_COMPLEX_FLOAT) \
| 653 : FP_REGNO_P (REGNO) \
654 ? (((int) GET_MODE_CLASS (MODE) == (int) MODE_FLOAT \
655 || (int) GET_MODE_CLASS (MODE) == (int) MODE_COMPLEX_FLOAT) \
|
417 && GET_MODE_UNIT_SIZE (MODE) <= 12) \
418 : (int) (MODE) != (int) QImode)
| 656 && GET_MODE_UNIT_SIZE (MODE) <= (LONG_DOUBLE_TYPE_SIZE == 96 ? 12 : 8))\
657 : (int) (MODE) != (int) QImode ? 1 \
658 : (reload_in_progress | reload_completed) == 1)
|
419
420/* Value is 1 if it is a good idea to tie two pseudo registers
421 when one has mode MODE1 and one has mode MODE2.
422 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
423 for any hard reg, then this must be 0 for correct output. */
424
| 659
660/* Value is 1 if it is a good idea to tie two pseudo registers
661 when one has mode MODE1 and one has mode MODE2.
662 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
663 for any hard reg, then this must be 0 for correct output. */
664
|
425#define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
| 665#define MODES_TIEABLE_P(MODE1, MODE2) \
666 ((MODE1) == (MODE2) \
667 || ((MODE1) == SImode && (MODE2) == HImode \
668 || (MODE1) == HImode && (MODE2) == SImode))
|
426
| 669
|
427/* A C expression returning the cost of moving data from a register of class
428 CLASS1 to one of CLASS2.
429
430 On the i386, copying between floating-point and fixed-point
431 registers is expensive. */
432
433#define REGISTER_MOVE_COST(CLASS1, CLASS2) \
434 (((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
435 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2))) ? 10 \
436 : 2)
437
| |
438/* Specify the registers used for certain standard purposes.
439 The values of these macros are register numbers. */
440
441/* on the 386 the pc register is %eip, and is not usable as a general
442 register. The ordinary mov instructions won't work */
443/* #define PC_REGNUM */
444
445/* Register to use for pushing function arguments. */
446#define STACK_POINTER_REGNUM 7
447
448/* Base register for access to local variables of the function. */
449#define FRAME_POINTER_REGNUM 6
450
451/* First floating point reg */
452#define FIRST_FLOAT_REG 8
453
454/* First & last stack-like regs */
455#define FIRST_STACK_REG FIRST_FLOAT_REG
456#define LAST_STACK_REG (FIRST_FLOAT_REG + 7)
457
458/* Value should be nonzero if functions must have frame pointers.
459 Zero means the frame pointer need not be set up (and parms
460 may be accessed via the stack pointer) in functions that seem suitable.
461 This is computed in `reload', in reload1.c. */
| 670/* Specify the registers used for certain standard purposes.
671 The values of these macros are register numbers. */
672
673/* on the 386 the pc register is %eip, and is not usable as a general
674 register. The ordinary mov instructions won't work */
675/* #define PC_REGNUM */
676
677/* Register to use for pushing function arguments. */
678#define STACK_POINTER_REGNUM 7
679
680/* Base register for access to local variables of the function. */
681#define FRAME_POINTER_REGNUM 6
682
683/* First floating point reg */
684#define FIRST_FLOAT_REG 8
685
686/* First & last stack-like regs */
687#define FIRST_STACK_REG FIRST_FLOAT_REG
688#define LAST_STACK_REG (FIRST_FLOAT_REG + 7)
689
690/* Value should be nonzero if functions must have frame pointers.
691 Zero means the frame pointer need not be set up (and parms
692 may be accessed via the stack pointer) in functions that seem suitable.
693 This is computed in `reload', in reload1.c. */
|
462#define FRAME_POINTER_REQUIRED 0
| 694#define FRAME_POINTER_REQUIRED (TARGET_OMIT_LEAF_FRAME_POINTER && !leaf_function_p ())
|
463
464/* Base register for access to arguments of the function. */
465#define ARG_POINTER_REGNUM 16
466
467/* Register in which static-chain is passed to a function. */
468#define STATIC_CHAIN_REGNUM 2
469
470/* Register to hold the addressing base for position independent
471 code access to data items. */
472#define PIC_OFFSET_TABLE_REGNUM 3
473
474/* Register in which address to store a structure value
475 arrives in the function. On the 386, the prologue
476 copies this from the stack to register %eax. */
477#define STRUCT_VALUE_INCOMING 0
478
479/* Place in which caller passes the structure value address.
480 0 means push the value on the stack like an argument. */
481#define STRUCT_VALUE 0
482
483/* A C expression which can inhibit the returning of certain function
484 values in registers, based on the type of value. A nonzero value
485 says to return the function value in memory, just as large
486 structures are always returned. Here TYPE will be a C expression
487 of type `tree', representing the data type of the value.
488
489 Note that values of mode `BLKmode' must be explicitly handled by
490 this macro. Also, the option `-fpcc-struct-return' takes effect
491 regardless of this macro. On most systems, it is possible to
492 leave the macro undefined; this causes a default definition to be
493 used, whose value is the constant 1 for `BLKmode' values, and 0
494 otherwise.
495
496 Do not use this macro to indicate that structures and unions
497 should always be returned in memory. You should instead use
498 `DEFAULT_PCC_STRUCT_RETURN' to indicate this. */
499
500#define RETURN_IN_MEMORY(TYPE) \
501 ((TYPE_MODE (TYPE) == BLKmode) || int_size_in_bytes (TYPE) > 12)
502
503
504/* Define the classes of registers for register constraints in the
505 machine description. Also define ranges of constants.
506
507 One of the classes must always be named ALL_REGS and include all hard regs.
508 If there is more than one class, another class must be named NO_REGS
509 and contain no registers.
510
511 The name GENERAL_REGS must be the name of a class (or an alias for
512 another name such as ALL_REGS). This is the class of registers
513 that is allowed by "g" or "r" in a register constraint.
514 Also, registers outside this class are allocated only when
515 instructions express preferences for them.
516
517 The classes must be numbered in nondecreasing order; that is,
518 a larger-numbered class must never be contained completely
519 in a smaller-numbered class.
520
521 For any two classes, it is very desirable that there be another
522 class that represents their union.
523
524 It might seem that class BREG is unnecessary, since no useful 386
525 opcode needs reg %ebx. But some systems pass args to the OS in ebx,
526 and the "b" register constraint is useful in asms for syscalls. */
527
528enum reg_class
529{
530 NO_REGS,
531 AREG, DREG, CREG, BREG,
532 AD_REGS, /* %eax/%edx for DImode */
533 Q_REGS, /* %eax %ebx %ecx %edx */
534 SIREG, DIREG,
535 INDEX_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp */
536 GENERAL_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */
537 FP_TOP_REG, FP_SECOND_REG, /* %st(0) %st(1) */
538 FLOAT_REGS,
539 ALL_REGS, LIM_REG_CLASSES
540};
541
542#define N_REG_CLASSES (int) LIM_REG_CLASSES
543
544#define FLOAT_CLASS_P(CLASS) (reg_class_subset_p (CLASS, FLOAT_REGS))
545
546/* Give names of register classes as strings for dump file. */
547
548#define REG_CLASS_NAMES \
549{ "NO_REGS", \
550 "AREG", "DREG", "CREG", "BREG", \
551 "AD_REGS", \
552 "Q_REGS", \
553 "SIREG", "DIREG", \
554 "INDEX_REGS", \
555 "GENERAL_REGS", \
556 "FP_TOP_REG", "FP_SECOND_REG", \
557 "FLOAT_REGS", \
558 "ALL_REGS" }
559
560/* Define which registers fit in which classes.
561 This is an initializer for a vector of HARD_REG_SET
562 of length N_REG_CLASSES. */
563
564#define REG_CLASS_CONTENTS \
| 695
696/* Base register for access to arguments of the function. */
697#define ARG_POINTER_REGNUM 16
698
699/* Register in which static-chain is passed to a function. */
700#define STATIC_CHAIN_REGNUM 2
701
702/* Register to hold the addressing base for position independent
703 code access to data items. */
704#define PIC_OFFSET_TABLE_REGNUM 3
705
706/* Register in which address to store a structure value
707 arrives in the function. On the 386, the prologue
708 copies this from the stack to register %eax. */
709#define STRUCT_VALUE_INCOMING 0
710
711/* Place in which caller passes the structure value address.
712 0 means push the value on the stack like an argument. */
713#define STRUCT_VALUE 0
714
715/* A C expression which can inhibit the returning of certain function
716 values in registers, based on the type of value. A nonzero value
717 says to return the function value in memory, just as large
718 structures are always returned. Here TYPE will be a C expression
719 of type `tree', representing the data type of the value.
720
721 Note that values of mode `BLKmode' must be explicitly handled by
722 this macro. Also, the option `-fpcc-struct-return' takes effect
723 regardless of this macro. On most systems, it is possible to
724 leave the macro undefined; this causes a default definition to be
725 used, whose value is the constant 1 for `BLKmode' values, and 0
726 otherwise.
727
728 Do not use this macro to indicate that structures and unions
729 should always be returned in memory. You should instead use
730 `DEFAULT_PCC_STRUCT_RETURN' to indicate this. */
731
732#define RETURN_IN_MEMORY(TYPE) \
733 ((TYPE_MODE (TYPE) == BLKmode) || int_size_in_bytes (TYPE) > 12)
734
735
736/* Define the classes of registers for register constraints in the
737 machine description. Also define ranges of constants.
738
739 One of the classes must always be named ALL_REGS and include all hard regs.
740 If there is more than one class, another class must be named NO_REGS
741 and contain no registers.
742
743 The name GENERAL_REGS must be the name of a class (or an alias for
744 another name such as ALL_REGS). This is the class of registers
745 that is allowed by "g" or "r" in a register constraint.
746 Also, registers outside this class are allocated only when
747 instructions express preferences for them.
748
749 The classes must be numbered in nondecreasing order; that is,
750 a larger-numbered class must never be contained completely
751 in a smaller-numbered class.
752
753 For any two classes, it is very desirable that there be another
754 class that represents their union.
755
756 It might seem that class BREG is unnecessary, since no useful 386
757 opcode needs reg %ebx. But some systems pass args to the OS in ebx,
758 and the "b" register constraint is useful in asms for syscalls. */
759
760enum reg_class
761{
762 NO_REGS,
763 AREG, DREG, CREG, BREG,
764 AD_REGS, /* %eax/%edx for DImode */
765 Q_REGS, /* %eax %ebx %ecx %edx */
766 SIREG, DIREG,
767 INDEX_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp */
768 GENERAL_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */
769 FP_TOP_REG, FP_SECOND_REG, /* %st(0) %st(1) */
770 FLOAT_REGS,
771 ALL_REGS, LIM_REG_CLASSES
772};
773
774#define N_REG_CLASSES (int) LIM_REG_CLASSES
775
776#define FLOAT_CLASS_P(CLASS) (reg_class_subset_p (CLASS, FLOAT_REGS))
777
778/* Give names of register classes as strings for dump file. */
779
780#define REG_CLASS_NAMES \
781{ "NO_REGS", \
782 "AREG", "DREG", "CREG", "BREG", \
783 "AD_REGS", \
784 "Q_REGS", \
785 "SIREG", "DIREG", \
786 "INDEX_REGS", \
787 "GENERAL_REGS", \
788 "FP_TOP_REG", "FP_SECOND_REG", \
789 "FLOAT_REGS", \
790 "ALL_REGS" }
791
792/* Define which registers fit in which classes.
793 This is an initializer for a vector of HARD_REG_SET
794 of length N_REG_CLASSES. */
795
796#define REG_CLASS_CONTENTS \
|
565{ 0, \
566 0x1, 0x2, 0x4, 0x8, /* AREG, DREG, CREG, BREG */ \
567 0x3, /* AD_REGS */ \
568 0xf, /* Q_REGS */ \
569 0x10, 0x20, /* SIREG, DIREG */ \
570 0x07f, /* INDEX_REGS */ \
571 0x100ff, /* GENERAL_REGS */ \
572 0x0100, 0x0200, /* FP_TOP_REG, FP_SECOND_REG */ \
573 0xff00, /* FLOAT_REGS */ \
574 0x1ffff }
| 797{ {0}, \
798 {0x1}, {0x2}, {0x4}, {0x8}, /* AREG, DREG, CREG, BREG */ \
799 {0x3}, /* AD_REGS */ \
800 {0xf}, /* Q_REGS */ \
801 {0x10}, {0x20}, /* SIREG, DIREG */ \
802 {0x7f}, /* INDEX_REGS */ \
803 {0x100ff}, /* GENERAL_REGS */ \
804 {0x0100}, {0x0200}, /* FP_TOP_REG, FP_SECOND_REG */ \
805 {0xff00}, /* FLOAT_REGS */ \
806 {0x1ffff}}
|
575
576/* The same information, inverted:
577 Return the class number of the smallest class containing
578 reg number REGNO. This could be a conditional expression
579 or could index an array. */
580
581#define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
582
583/* When defined, the compiler allows registers explicitly used in the
584 rtl to be used as spill registers but prevents the compiler from
585 extending the lifetime of these registers. */
586
| 807
808/* The same information, inverted:
809 Return the class number of the smallest class containing
810 reg number REGNO. This could be a conditional expression
811 or could index an array. */
812
813#define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
814
815/* When defined, the compiler allows registers explicitly used in the
816 rtl to be used as spill registers but prevents the compiler from
817 extending the lifetime of these registers. */
818
|
587#define SMALL_REGISTER_CLASSES
| 819#define SMALL_REGISTER_CLASSES 1
|
588
589#define QI_REG_P(X) \
590 (REG_P (X) && REGNO (X) < 4)
591#define NON_QI_REG_P(X) \
592 (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
593
594#define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
595#define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG)
596
597#define STACK_REG_P(xop) (REG_P (xop) && \
598 REGNO (xop) >= FIRST_STACK_REG && \
599 REGNO (xop) <= LAST_STACK_REG)
600
601#define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop))
602
603#define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG)
604
605/* Try to maintain the accuracy of the death notes for regs satisfying the
606 following. Important for stack like regs, to know when to pop. */
607
608/* #define PRESERVE_DEATH_INFO_REGNO_P(x) FP_REGNO_P(x) */
609
610/* 1 if register REGNO can magically overlap other regs.
611 Note that nonzero values work only in very special circumstances. */
612
613/* #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO) */
614
615/* The class value for index registers, and the one for base regs. */
616
617#define INDEX_REG_CLASS INDEX_REGS
618#define BASE_REG_CLASS GENERAL_REGS
619
620/* Get reg_class from a letter such as appears in the machine description. */
621
622#define REG_CLASS_FROM_LETTER(C) \
623 ((C) == 'r' ? GENERAL_REGS : \
624 (C) == 'q' ? Q_REGS : \
625 (C) == 'f' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
626 ? FLOAT_REGS \
627 : NO_REGS) : \
628 (C) == 't' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
629 ? FP_TOP_REG \
630 : NO_REGS) : \
631 (C) == 'u' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
632 ? FP_SECOND_REG \
633 : NO_REGS) : \
634 (C) == 'a' ? AREG : \
635 (C) == 'b' ? BREG : \
636 (C) == 'c' ? CREG : \
637 (C) == 'd' ? DREG : \
638 (C) == 'A' ? AD_REGS : \
639 (C) == 'D' ? DIREG : \
640 (C) == 'S' ? SIREG : NO_REGS)
641
642/* The letters I, J, K, L and M in a register constraint string
643 can be used to stand for particular ranges of immediate operands.
644 This macro defines what the ranges are.
645 C is the letter, and VALUE is a constant value.
646 Return 1 if VALUE is in the range specified by C.
647
648 I is for non-DImode shifts.
649 J is for DImode shifts.
650 K and L are for an `andsi' optimization.
651 M is for shifts that can be executed by the "lea" opcode.
652 */
653
654#define CONST_OK_FOR_LETTER_P(VALUE, C) \
655 ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 : \
656 (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \
657 (C) == 'K' ? (VALUE) == 0xff : \
658 (C) == 'L' ? (VALUE) == 0xffff : \
659 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \
660 (C) == 'N' ? (VALUE) >= 0 && (VALUE) <= 255 :\
| 820
821#define QI_REG_P(X) \
822 (REG_P (X) && REGNO (X) < 4)
823#define NON_QI_REG_P(X) \
824 (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
825
826#define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
827#define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG)
828
829#define STACK_REG_P(xop) (REG_P (xop) && \
830 REGNO (xop) >= FIRST_STACK_REG && \
831 REGNO (xop) <= LAST_STACK_REG)
832
833#define NON_STACK_REG_P(xop) (REG_P (xop) && ! STACK_REG_P (xop))
834
835#define STACK_TOP_P(xop) (REG_P (xop) && REGNO (xop) == FIRST_STACK_REG)
836
837/* Try to maintain the accuracy of the death notes for regs satisfying the
838 following. Important for stack like regs, to know when to pop. */
839
840/* #define PRESERVE_DEATH_INFO_REGNO_P(x) FP_REGNO_P(x) */
841
842/* 1 if register REGNO can magically overlap other regs.
843 Note that nonzero values work only in very special circumstances. */
844
845/* #define OVERLAPPING_REGNO_P(REGNO) FP_REGNO_P (REGNO) */
846
847/* The class value for index registers, and the one for base regs. */
848
849#define INDEX_REG_CLASS INDEX_REGS
850#define BASE_REG_CLASS GENERAL_REGS
851
852/* Get reg_class from a letter such as appears in the machine description. */
853
854#define REG_CLASS_FROM_LETTER(C) \
855 ((C) == 'r' ? GENERAL_REGS : \
856 (C) == 'q' ? Q_REGS : \
857 (C) == 'f' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
858 ? FLOAT_REGS \
859 : NO_REGS) : \
860 (C) == 't' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
861 ? FP_TOP_REG \
862 : NO_REGS) : \
863 (C) == 'u' ? (TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 \
864 ? FP_SECOND_REG \
865 : NO_REGS) : \
866 (C) == 'a' ? AREG : \
867 (C) == 'b' ? BREG : \
868 (C) == 'c' ? CREG : \
869 (C) == 'd' ? DREG : \
870 (C) == 'A' ? AD_REGS : \
871 (C) == 'D' ? DIREG : \
872 (C) == 'S' ? SIREG : NO_REGS)
873
874/* The letters I, J, K, L and M in a register constraint string
875 can be used to stand for particular ranges of immediate operands.
876 This macro defines what the ranges are.
877 C is the letter, and VALUE is a constant value.
878 Return 1 if VALUE is in the range specified by C.
879
880 I is for non-DImode shifts.
881 J is for DImode shifts.
882 K and L are for an `andsi' optimization.
883 M is for shifts that can be executed by the "lea" opcode.
884 */
885
886#define CONST_OK_FOR_LETTER_P(VALUE, C) \
887 ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 : \
888 (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \
889 (C) == 'K' ? (VALUE) == 0xff : \
890 (C) == 'L' ? (VALUE) == 0xffff : \
891 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \
892 (C) == 'N' ? (VALUE) >= 0 && (VALUE) <= 255 :\
|
| 893 (C) == 'O' ? (VALUE) >= 0 && (VALUE) <= 32 : \
|
661 0)
662
663/* Similar, but for floating constants, and defining letters G and H.
664 Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if
665 TARGET_387 isn't set, because the stack register converter may need to
| 894 0)
895
896/* Similar, but for floating constants, and defining letters G and H.
897 Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if
898 TARGET_387 isn't set, because the stack register converter may need to
|
666 load 0.0 into the function value register. */
| 899 load 0.0 into the function value register.
|
667
| 900
|
| 901 We disallow these constants when -fomit-frame-pointer and compiling
902 PIC code since reload might need to force the constant to memory.
903 Forcing the constant to memory changes the elimination offsets after
904 the point where they must stay constant.
905
906 However, we must allow them after reload as completed as reg-stack.c
907 will create insns which use these constants. */
908
|
668#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
| 909#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
|
669 ((C) == 'G' ? standard_80387_constant_p (VALUE) : 0)
| 910 (((reload_completed || !flag_pic || !flag_omit_frame_pointer) && (C) == 'G') \
911 ? standard_80387_constant_p (VALUE) : 0)
|
670
671/* Place additional restrictions on the register class to use when it
672 is necessary to be able to hold a value of mode MODE in a reload
673 register for which class CLASS would ordinarily be used. */
674
675#define LIMIT_RELOAD_CLASS(MODE, CLASS) \
676 ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \
677 ? Q_REGS : (CLASS))
678
679/* Given an rtx X being reloaded into a reg required to be
680 in class CLASS, return the class of reg to actually use.
681 In general this is just CLASS; but on some machines
682 in some cases it is preferable to use a more restrictive class.
683 On the 80386 series, we prevent floating constants from being
684 reloaded into floating registers (since no move-insn can do that)
685 and we ensure that QImodes aren't reloaded into the esi or edi reg. */
686
687/* Put float CONST_DOUBLE in the constant pool instead of fp regs.
688 QImode must go into class Q_REGS.
689 Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and
690 movdf to do mem-to-mem moves through integer regs. */
691
692#define PREFERRED_RELOAD_CLASS(X,CLASS) \
693 (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != VOIDmode ? NO_REGS \
694 : GET_MODE (X) == QImode && ! reg_class_subset_p (CLASS, Q_REGS) ? Q_REGS \
695 : ((CLASS) == ALL_REGS \
696 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) ? GENERAL_REGS \
697 : (CLASS))
698
699/* If we are copying between general and FP registers, we need a memory
700 location. */
701
702#define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
703 ((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
704 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2)))
705
706/* Return the maximum number of consecutive registers
707 needed to represent mode MODE in a register of class CLASS. */
708/* On the 80386, this is the size of MODE in words,
709 except in the FP regs, where a single reg is always enough. */
710#define CLASS_MAX_NREGS(CLASS, MODE) \
711 (FLOAT_CLASS_P (CLASS) ? 1 : \
712 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
713
714/* A C expression whose value is nonzero if pseudos that have been
715 assigned to registers of class CLASS would likely be spilled
716 because registers of CLASS are needed for spill registers.
717
718 The default value of this macro returns 1 if CLASS has exactly one
719 register and zero otherwise. On most machines, this default
720 should be used. Only define this macro to some other expression
721 if pseudo allocated by `local-alloc.c' end up in memory because
722 their hard registers were needed for spill registers. If this
723 macro returns nonzero for those classes, those pseudos will only
724 be allocated by `global.c', which knows how to reallocate the
725 pseudo to another register. If there would not be another
726 register available for reallocation, you should not change the
727 definition of this macro since the only effect of such a
728 definition would be to slow down register allocation. */
729
730#define CLASS_LIKELY_SPILLED_P(CLASS) \
731 (((CLASS) == AREG) \
732 || ((CLASS) == DREG) \
733 || ((CLASS) == CREG) \
734 || ((CLASS) == BREG) \
735 || ((CLASS) == AD_REGS) \
736 || ((CLASS) == SIREG) \
737 || ((CLASS) == DIREG))
738
739
740/* Stack layout; function entry, exit and calling. */
741
742/* Define this if pushing a word on the stack
743 makes the stack pointer a smaller address. */
744#define STACK_GROWS_DOWNWARD
745
746/* Define this if the nominal address of the stack frame
747 is at the high-address end of the local variables;
748 that is, each additional local variable allocated
749 goes at a more negative offset in the frame. */
750#define FRAME_GROWS_DOWNWARD
751
752/* Offset within stack frame to start allocating local variables at.
753 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
754 first local allocated. Otherwise, it is the offset to the BEGINNING
755 of the first local allocated. */
756#define STARTING_FRAME_OFFSET 0
757
758/* If we generate an insn to push BYTES bytes,
759 this says how many the stack pointer really advances by.
760 On 386 pushw decrements by exactly 2 no matter what the position was.
761 On the 386 there is no pushb; we use pushw instead, and this
762 has the effect of rounding up to 2. */
763
764#define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2))
765
766/* Offset of first parameter from the argument pointer register value. */
767#define FIRST_PARM_OFFSET(FNDECL) 0
768
769/* Value is the number of bytes of arguments automatically
770 popped when returning from a subroutine call.
771 FUNDECL is the declaration node of the function (as a tree),
772 FUNTYPE is the data type of the function (as a tree),
773 or for a library call it is an identifier node for the subroutine name.
774 SIZE is the number of bytes of arguments passed on the stack.
775
776 On the 80386, the RTD insn may be used to pop them if the number
777 of args is fixed, but if the number is variable then the caller
778 must pop them all. RTD can't be used for library calls now
779 because the library is compiled with the Unix compiler.
780 Use of RTD is a selectable option, since it is incompatible with
781 standard Unix calling sequences. If the option is not selected,
782 the caller must always pop the args.
783
784 The attribute stdcall is equivalent to RTD on a per module basis. */
785
786#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
787 (i386_return_pops_args (FUNDECL, FUNTYPE, SIZE))
788
789/* Define how to find the value returned by a function.
790 VALTYPE is the data type of the value (as a tree).
791 If the precise function being called is known, FUNC is its FUNCTION_DECL;
792 otherwise, FUNC is 0. */
793#define FUNCTION_VALUE(VALTYPE, FUNC) \
| 912
913/* Place additional restrictions on the register class to use when it
914 is necessary to be able to hold a value of mode MODE in a reload
915 register for which class CLASS would ordinarily be used. */
916
917#define LIMIT_RELOAD_CLASS(MODE, CLASS) \
918 ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \
919 ? Q_REGS : (CLASS))
920
921/* Given an rtx X being reloaded into a reg required to be
922 in class CLASS, return the class of reg to actually use.
923 In general this is just CLASS; but on some machines
924 in some cases it is preferable to use a more restrictive class.
925 On the 80386 series, we prevent floating constants from being
926 reloaded into floating registers (since no move-insn can do that)
927 and we ensure that QImodes aren't reloaded into the esi or edi reg. */
928
929/* Put float CONST_DOUBLE in the constant pool instead of fp regs.
930 QImode must go into class Q_REGS.
931 Narrow ALL_REGS to GENERAL_REGS. This supports allowing movsf and
932 movdf to do mem-to-mem moves through integer regs. */
933
934#define PREFERRED_RELOAD_CLASS(X,CLASS) \
935 (GET_CODE (X) == CONST_DOUBLE && GET_MODE (X) != VOIDmode ? NO_REGS \
936 : GET_MODE (X) == QImode && ! reg_class_subset_p (CLASS, Q_REGS) ? Q_REGS \
937 : ((CLASS) == ALL_REGS \
938 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) ? GENERAL_REGS \
939 : (CLASS))
940
941/* If we are copying between general and FP registers, we need a memory
942 location. */
943
944#define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
945 ((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
946 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2)))
947
948/* Return the maximum number of consecutive registers
949 needed to represent mode MODE in a register of class CLASS. */
950/* On the 80386, this is the size of MODE in words,
951 except in the FP regs, where a single reg is always enough. */
952#define CLASS_MAX_NREGS(CLASS, MODE) \
953 (FLOAT_CLASS_P (CLASS) ? 1 : \
954 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
955
956/* A C expression whose value is nonzero if pseudos that have been
957 assigned to registers of class CLASS would likely be spilled
958 because registers of CLASS are needed for spill registers.
959
960 The default value of this macro returns 1 if CLASS has exactly one
961 register and zero otherwise. On most machines, this default
962 should be used. Only define this macro to some other expression
963 if pseudo allocated by `local-alloc.c' end up in memory because
964 their hard registers were needed for spill registers. If this
965 macro returns nonzero for those classes, those pseudos will only
966 be allocated by `global.c', which knows how to reallocate the
967 pseudo to another register. If there would not be another
968 register available for reallocation, you should not change the
969 definition of this macro since the only effect of such a
970 definition would be to slow down register allocation. */
971
972#define CLASS_LIKELY_SPILLED_P(CLASS) \
973 (((CLASS) == AREG) \
974 || ((CLASS) == DREG) \
975 || ((CLASS) == CREG) \
976 || ((CLASS) == BREG) \
977 || ((CLASS) == AD_REGS) \
978 || ((CLASS) == SIREG) \
979 || ((CLASS) == DIREG))
980
981
982/* Stack layout; function entry, exit and calling. */
983
984/* Define this if pushing a word on the stack
985 makes the stack pointer a smaller address. */
986#define STACK_GROWS_DOWNWARD
987
988/* Define this if the nominal address of the stack frame
989 is at the high-address end of the local variables;
990 that is, each additional local variable allocated
991 goes at a more negative offset in the frame. */
992#define FRAME_GROWS_DOWNWARD
993
994/* Offset within stack frame to start allocating local variables at.
995 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
996 first local allocated. Otherwise, it is the offset to the BEGINNING
997 of the first local allocated. */
998#define STARTING_FRAME_OFFSET 0
999
1000/* If we generate an insn to push BYTES bytes,
1001 this says how many the stack pointer really advances by.
1002 On 386 pushw decrements by exactly 2 no matter what the position was.
1003 On the 386 there is no pushb; we use pushw instead, and this
1004 has the effect of rounding up to 2. */
1005
1006#define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & (-2))
1007
1008/* Offset of first parameter from the argument pointer register value. */
1009#define FIRST_PARM_OFFSET(FNDECL) 0
1010
1011/* Value is the number of bytes of arguments automatically
1012 popped when returning from a subroutine call.
1013 FUNDECL is the declaration node of the function (as a tree),
1014 FUNTYPE is the data type of the function (as a tree),
1015 or for a library call it is an identifier node for the subroutine name.
1016 SIZE is the number of bytes of arguments passed on the stack.
1017
1018 On the 80386, the RTD insn may be used to pop them if the number
1019 of args is fixed, but if the number is variable then the caller
1020 must pop them all. RTD can't be used for library calls now
1021 because the library is compiled with the Unix compiler.
1022 Use of RTD is a selectable option, since it is incompatible with
1023 standard Unix calling sequences. If the option is not selected,
1024 the caller must always pop the args.
1025
1026 The attribute stdcall is equivalent to RTD on a per module basis. */
1027
1028#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
1029 (i386_return_pops_args (FUNDECL, FUNTYPE, SIZE))
1030
1031/* Define how to find the value returned by a function.
1032 VALTYPE is the data type of the value (as a tree).
1033 If the precise function being called is known, FUNC is its FUNCTION_DECL;
1034 otherwise, FUNC is 0. */
1035#define FUNCTION_VALUE(VALTYPE, FUNC) \
|
794 gen_rtx (REG, TYPE_MODE (VALTYPE), \
| 1036 gen_rtx_REG (TYPE_MODE (VALTYPE), \
|
795 VALUE_REGNO (TYPE_MODE (VALTYPE)))
796
797/* Define how to find the value returned by a library function
798 assuming the value has mode MODE. */
799
800#define LIBCALL_VALUE(MODE) \
| 1037 VALUE_REGNO (TYPE_MODE (VALTYPE)))
1038
1039/* Define how to find the value returned by a library function
1040 assuming the value has mode MODE. */
1041
1042#define LIBCALL_VALUE(MODE) \
|
801 gen_rtx (REG, MODE, VALUE_REGNO (MODE))
| 1043 gen_rtx_REG (MODE, VALUE_REGNO (MODE))
|
802
803/* Define the size of the result block used for communication between
804 untyped_call and untyped_return. The block contains a DImode value
805 followed by the block used by fnsave and frstor. */
806
807#define APPLY_RESULT_SIZE (8+108)
808
809/* 1 if N is a possible register number for function argument passing. */
810#define FUNCTION_ARG_REGNO_P(N) ((N) >= 0 && (N) < REGPARM_MAX)
811
812/* Define a data type for recording info about an argument list
813 during the scan of that argument list. This data type should
814 hold all necessary information about the function itself
815 and about the args processed so far, enough to enable macros
816 such as FUNCTION_ARG to determine where the next arg should go. */
817
818typedef struct i386_args {
819 int words; /* # words passed so far */
820 int nregs; /* # registers available for passing */
821 int regno; /* next available register number */
822} CUMULATIVE_ARGS;
823
824/* Initialize a variable CUM of type CUMULATIVE_ARGS
825 for a call to a function whose data type is FNTYPE.
826 For a library call, FNTYPE is 0. */
827
| 1044
1045/* Define the size of the result block used for communication between
1046 untyped_call and untyped_return. The block contains a DImode value
1047 followed by the block used by fnsave and frstor. */
1048
1049#define APPLY_RESULT_SIZE (8+108)
1050
1051/* 1 if N is a possible register number for function argument passing. */
1052#define FUNCTION_ARG_REGNO_P(N) ((N) >= 0 && (N) < REGPARM_MAX)
1053
1054/* Define a data type for recording info about an argument list
1055 during the scan of that argument list. This data type should
1056 hold all necessary information about the function itself
1057 and about the args processed so far, enough to enable macros
1058 such as FUNCTION_ARG to determine where the next arg should go. */
1059
1060typedef struct i386_args {
1061 int words; /* # words passed so far */
1062 int nregs; /* # registers available for passing */
1063 int regno; /* next available register number */
1064} CUMULATIVE_ARGS;
1065
1066/* Initialize a variable CUM of type CUMULATIVE_ARGS
1067 for a call to a function whose data type is FNTYPE.
1068 For a library call, FNTYPE is 0. */
1069
|
828#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
| 1070#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
|
829 (init_cumulative_args (&CUM, FNTYPE, LIBNAME))
830
831/* Update the data in CUM to advance over an argument
832 of mode MODE and data type TYPE.
833 (TYPE is null for libcalls where that information may not be available.) */
834
835#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
836 (function_arg_advance (&CUM, MODE, TYPE, NAMED))
837
838/* Define where to put the arguments to a function.
839 Value is zero to push the argument on the stack,
840 or a hard register in which to store the argument.
841
842 MODE is the argument's machine mode.
843 TYPE is the data type of the argument (as a tree).
844 This is null for libcalls where that information may
845 not be available.
846 CUM is a variable of type CUMULATIVE_ARGS which gives info about
847 the preceding args and about the function being called.
848 NAMED is nonzero if this argument is a named parameter
849 (otherwise it is an extra parameter matching an ellipsis). */
850
851#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
852 (function_arg (&CUM, MODE, TYPE, NAMED))
853
854/* For an arg passed partly in registers and partly in memory,
855 this is the number of registers used.
856 For args passed entirely in registers or entirely in memory, zero. */
857
858#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
859 (function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED))
860
| 1071 (init_cumulative_args (&CUM, FNTYPE, LIBNAME))
1072
1073/* Update the data in CUM to advance over an argument
1074 of mode MODE and data type TYPE.
1075 (TYPE is null for libcalls where that information may not be available.) */
1076
1077#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1078 (function_arg_advance (&CUM, MODE, TYPE, NAMED))
1079
1080/* Define where to put the arguments to a function.
1081 Value is zero to push the argument on the stack,
1082 or a hard register in which to store the argument.
1083
1084 MODE is the argument's machine mode.
1085 TYPE is the data type of the argument (as a tree).
1086 This is null for libcalls where that information may
1087 not be available.
1088 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1089 the preceding args and about the function being called.
1090 NAMED is nonzero if this argument is a named parameter
1091 (otherwise it is an extra parameter matching an ellipsis). */
1092
1093#define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1094 (function_arg (&CUM, MODE, TYPE, NAMED))
1095
1096/* For an arg passed partly in registers and partly in memory,
1097 this is the number of registers used.
1098 For args passed entirely in registers or entirely in memory, zero. */
1099
1100#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
1101 (function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED))
1102
|
| 1103/* This macro is invoked just before the start of a function.
1104 It is used here to output code for -fpic that will load the
1105 return address into %ebx. */
1106
1107#undef ASM_OUTPUT_FUNCTION_PREFIX
1108#define ASM_OUTPUT_FUNCTION_PREFIX(FILE, FNNAME) \
1109 asm_output_function_prefix (FILE, FNNAME)
1110
|
861/* This macro generates the assembly code for function entry.
862 FILE is a stdio stream to output the code to.
863 SIZE is an int: how many units of temporary storage to allocate.
864 Refer to the array `regs_ever_live' to determine which registers
865 to save; `regs_ever_live[I]' is nonzero if register number I
866 is ever used in the function. This macro is responsible for
867 knowing which registers should not be saved even if used. */
868
869#define FUNCTION_PROLOGUE(FILE, SIZE) \
870 function_prologue (FILE, SIZE)
871
872/* Output assembler code to FILE to increment profiler label # LABELNO
873 for profiling a function entry. */
874
875#define FUNCTION_PROFILER(FILE, LABELNO) \
876{ \
877 if (flag_pic) \
878 { \
879 fprintf (FILE, "\tleal %sP%d@GOTOFF(%%ebx),%%edx\n", \
880 LPREFIX, (LABELNO)); \
881 fprintf (FILE, "\tcall *_mcount@GOT(%%ebx)\n"); \
882 } \
883 else \
884 { \
885 fprintf (FILE, "\tmovl $%sP%d,%%edx\n", LPREFIX, (LABELNO)); \
886 fprintf (FILE, "\tcall _mcount\n"); \
887 } \
888}
889
| 1111/* This macro generates the assembly code for function entry.
1112 FILE is a stdio stream to output the code to.
1113 SIZE is an int: how many units of temporary storage to allocate.
1114 Refer to the array `regs_ever_live' to determine which registers
1115 to save; `regs_ever_live[I]' is nonzero if register number I
1116 is ever used in the function. This macro is responsible for
1117 knowing which registers should not be saved even if used. */
1118
1119#define FUNCTION_PROLOGUE(FILE, SIZE) \
1120 function_prologue (FILE, SIZE)
1121
1122/* Output assembler code to FILE to increment profiler label # LABELNO
1123 for profiling a function entry. */
1124
1125#define FUNCTION_PROFILER(FILE, LABELNO) \
1126{ \
1127 if (flag_pic) \
1128 { \
1129 fprintf (FILE, "\tleal %sP%d@GOTOFF(%%ebx),%%edx\n", \
1130 LPREFIX, (LABELNO)); \
1131 fprintf (FILE, "\tcall *_mcount@GOT(%%ebx)\n"); \
1132 } \
1133 else \
1134 { \
1135 fprintf (FILE, "\tmovl $%sP%d,%%edx\n", LPREFIX, (LABELNO)); \
1136 fprintf (FILE, "\tcall _mcount\n"); \
1137 } \
1138}
1139
|
890/* A C statement or compound statement to output to FILE some
891 assembler code to initialize basic-block profiling for the current
892 object module. This code should call the subroutine
893 `__bb_init_func' once per object module, passing it as its sole
894 argument the address of a block allocated in the object module.
| |
895
| 1140
|
896 The name of the block is a local symbol made with this statement:
| 1141/* There are three profiling modes for basic blocks available.
1142 The modes are selected at compile time by using the options
1143 -a or -ax of the gnu compiler.
1144 The variable `profile_block_flag' will be set according to the
1145 selected option.
|
897
| 1146
|
898 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
| 1147 profile_block_flag == 0, no option used:
|
899
| 1148
|
900 Of course, since you are writing the definition of
901 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
902 can take a short cut in the definition of this macro and use the
903 name that you know will result.
| 1149 No profiling done.
|
904
| 1150
|
905 The first word of this block is a flag which will be nonzero if the
906 object module has already been initialized. So test this word
907 first, and do not call `__bb_init_func' if the flag is nonzero. */
| 1151 profile_block_flag == 1, -a option used.
|
908
| 1152
|
| 1153 Count frequency of execution of every basic block.
1154
1155 profile_block_flag == 2, -ax option used.
1156
1157 Generate code to allow several different profiling modes at run time.
1158 Available modes are:
1159 Produce a trace of all basic blocks.
1160 Count frequency of jump instructions executed.
1161 In every mode it is possible to start profiling upon entering
1162 certain functions and to disable profiling of some other functions.
1163
1164 The result of basic-block profiling will be written to a file `bb.out'.
1165 If the -ax option is used parameters for the profiling will be read
1166 from file `bb.in'.
1167
1168*/
1169
1170/* The following macro shall output assembler code to FILE
1171 to initialize basic-block profiling.
1172
1173 If profile_block_flag == 2
1174
1175 Output code to call the subroutine `__bb_init_trace_func'
1176 and pass two parameters to it. The first parameter is
1177 the address of a block allocated in the object module.
1178 The second parameter is the number of the first basic block
1179 of the function.
1180
1181 The name of the block is a local symbol made with this statement:
1182
1183 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
1184
1185 Of course, since you are writing the definition of
1186 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1187 can take a short cut in the definition of this macro and use the
1188 name that you know will result.
1189
1190 The number of the first basic block of the function is
1191 passed to the macro in BLOCK_OR_LABEL.
1192
1193 If described in a virtual assembler language the code to be
1194 output looks like:
1195
1196 parameter1 <- LPBX0
1197 parameter2 <- BLOCK_OR_LABEL
1198 call __bb_init_trace_func
1199
1200 else if profile_block_flag != 0
1201
1202 Output code to call the subroutine `__bb_init_func'
1203 and pass one single parameter to it, which is the same
1204 as the first parameter to `__bb_init_trace_func'.
1205
1206 The first word of this parameter is a flag which will be nonzero if
1207 the object module has already been initialized. So test this word
1208 first, and do not call `__bb_init_func' if the flag is nonzero.
1209 Note: When profile_block_flag == 2 the test need not be done
1210 but `__bb_init_trace_func' *must* be called.
1211
1212 BLOCK_OR_LABEL may be used to generate a label number as a
1213 branch destination in case `__bb_init_func' will not be called.
1214
1215 If described in a virtual assembler language the code to be
1216 output looks like:
1217
1218 cmp (LPBX0),0
1219 jne local_label
1220 parameter1 <- LPBX0
1221 call __bb_init_func
1222local_label:
1223
1224*/
1225
|
909#undef FUNCTION_BLOCK_PROFILER
| 1226#undef FUNCTION_BLOCK_PROFILER
|
910#define FUNCTION_BLOCK_PROFILER(STREAM, LABELNO) \
| 1227#define FUNCTION_BLOCK_PROFILER(FILE, BLOCK_OR_LABEL) \
|
911do \
912 { \
913 static int num_func = 0; \
914 rtx xops[8]; \
915 char block_table[80], false_label[80]; \
916 \
917 ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \
| 1228do \
1229 { \
1230 static int num_func = 0; \
1231 rtx xops[8]; \
1232 char block_table[80], false_label[80]; \
1233 \
1234 ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \
|
918 ASM_GENERATE_INTERNAL_LABEL (false_label, "LPBZ", num_func); \
| |
919 \
| 1235 \
|
920 xops[0] = const0_rtx; \
921 xops[1] = gen_rtx (SYMBOL_REF, VOIDmode, block_table); \
922 xops[2] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, false_label)); \
923 xops[3] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_init_func")); \
924 xops[4] = gen_rtx (MEM, Pmode, xops[1]); \
| 1236 xops[1] = gen_rtx_SYMBOL_REF (VOIDmode, block_table); \
|
925 xops[5] = stack_pointer_rtx; \
| 1237 xops[5] = stack_pointer_rtx; \
|
926 xops[6] = GEN_INT (4); \
927 xops[7] = gen_rtx (REG, Pmode, 0); /* eax */ \
| 1238 xops[7] = gen_rtx_REG (Pmode, 0); /* eax */ \
|
928 \
929 CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \
| 1239 \
1240 CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \
|
930 CONSTANT_POOL_ADDRESS_P (xops[2]) = TRUE; \
| |
931 \
| 1241 \
|
932 output_asm_insn (AS2(cmp%L4,%0,%4), xops); \
933 output_asm_insn (AS1(jne,%2), xops); \
934 \
935 if (!flag_pic) \
936 output_asm_insn (AS1(push%L1,%1), xops); \
937 else \
| 1242 switch (profile_block_flag) \
|
938 { \
| 1243 { \
|
939 output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \
940 output_asm_insn (AS1 (push%L7,%7), xops); \
941 } \
| |
942 \
| 1244 \
|
943 output_asm_insn (AS1(call,%P3), xops); \
944 output_asm_insn (AS2(add%L0,%6,%5), xops); \
945 ASM_OUTPUT_INTERNAL_LABEL (STREAM, "LPBZ", num_func); \
946 num_func++; \
| 1245 case 2: \
1246 \
1247 xops[2] = GEN_INT ((BLOCK_OR_LABEL)); \
1248 xops[3] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_init_trace_func")); \
1249 xops[6] = GEN_INT (8); \
1250 \
1251 output_asm_insn (AS1(push%L2,%2), xops); \
1252 if (!flag_pic) \
1253 output_asm_insn (AS1(push%L1,%1), xops); \
1254 else \
1255 { \
1256 output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \
1257 output_asm_insn (AS1 (push%L7,%7), xops); \
1258 } \
1259 \
1260 output_asm_insn (AS1(call,%P3), xops); \
1261 output_asm_insn (AS2(add%L0,%6,%5), xops); \
1262 \
1263 break; \
1264 \
1265 default: \
1266 \
1267 ASM_GENERATE_INTERNAL_LABEL (false_label, "LPBZ", num_func); \
1268 \
1269 xops[0] = const0_rtx; \
1270 xops[2] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, false_label)); \
1271 xops[3] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_init_func")); \
1272 xops[4] = gen_rtx_MEM (Pmode, xops[1]); \
1273 xops[6] = GEN_INT (4); \
1274 \
1275 CONSTANT_POOL_ADDRESS_P (xops[2]) = TRUE; \
1276 \
1277 output_asm_insn (AS2(cmp%L4,%0,%4), xops); \
1278 output_asm_insn (AS1(jne,%2), xops); \
1279 \
1280 if (!flag_pic) \
1281 output_asm_insn (AS1(push%L1,%1), xops); \
1282 else \
1283 { \
1284 output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \
1285 output_asm_insn (AS1 (push%L7,%7), xops); \
1286 } \
1287 \
1288 output_asm_insn (AS1(call,%P3), xops); \
1289 output_asm_insn (AS2(add%L0,%6,%5), xops); \
1290 ASM_OUTPUT_INTERNAL_LABEL (FILE, "LPBZ", num_func); \
1291 num_func++; \
1292 \
1293 break; \
1294 \
1295 } \
|
947 } \
948while (0)
949
| 1296 } \
1297while (0)
1298
|
| 1299/* The following macro shall output assembler code to FILE
1300 to increment a counter associated with basic block number BLOCKNO.
|
950
| 1301
|
951/* A C statement or compound statement to increment the count
952 associated with the basic block number BLOCKNO. Basic blocks are
953 numbered separately from zero within each compilation. The count
954 associated with block number BLOCKNO is at index BLOCKNO in a
955 vector of words; the name of this array is a local symbol made
956 with this statement:
| 1302 If profile_block_flag == 2
|
957
| 1303
|
958 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 2);
| 1304 Output code to initialize the global structure `__bb' and
1305 call the function `__bb_trace_func' which will increment the
1306 counter.
|
959
| 1307
|
960 Of course, since you are writing the definition of
961 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
962 can take a short cut in the definition of this macro and use the
963 name that you know will result. */
| 1308 `__bb' consists of two words. In the first word the number
1309 of the basic block has to be stored. In the second word
1310 the address of a block allocated in the object module
1311 has to be stored.
|
964
| 1312
|
965#define BLOCK_PROFILER(STREAM, BLOCKNO) \
| 1313 The basic block number is given by BLOCKNO.
1314
1315 The address of the block is given by the label created with
1316
1317 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
1318
1319 by FUNCTION_BLOCK_PROFILER.
1320
1321 Of course, since you are writing the definition of
1322 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1323 can take a short cut in the definition of this macro and use the
1324 name that you know will result.
1325
1326 If described in a virtual assembler language the code to be
1327 output looks like:
1328
1329 move BLOCKNO -> (__bb)
1330 move LPBX0 -> (__bb+4)
1331 call __bb_trace_func
1332
1333 Note that function `__bb_trace_func' must not change the
1334 machine state, especially the flag register. To grant
1335 this, you must output code to save and restore registers
1336 either in this macro or in the macros MACHINE_STATE_SAVE
1337 and MACHINE_STATE_RESTORE. The last two macros will be
1338 used in the function `__bb_trace_func', so you must make
1339 sure that the function prologue does not change any
1340 register prior to saving it with MACHINE_STATE_SAVE.
1341
1342 else if profile_block_flag != 0
1343
1344 Output code to increment the counter directly.
1345 Basic blocks are numbered separately from zero within each
1346 compiled object module. The count associated with block number
1347 BLOCKNO is at index BLOCKNO in an array of words; the name of
1348 this array is a local symbol made with this statement:
1349
1350 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 2);
1351
1352 Of course, since you are writing the definition of
1353 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
1354 can take a short cut in the definition of this macro and use the
1355 name that you know will result.
1356
1357 If described in a virtual assembler language the code to be
1358 output looks like:
1359
1360 inc (LPBX2+4*BLOCKNO)
1361
1362*/
1363
1364#define BLOCK_PROFILER(FILE, BLOCKNO) \
|
966do \
967 { \
| 1365do \
1366 { \
|
968 rtx xops[1], cnt_rtx; \
| 1367 rtx xops[8], cnt_rtx; \
|
969 char counts[80]; \
| 1368 char counts[80]; \
|
| 1369 char *block_table = counts; \
|
970 \
| 1370 \
|
971 ASM_GENERATE_INTERNAL_LABEL (counts, "LPBX", 2); \
972 cnt_rtx = gen_rtx (SYMBOL_REF, VOIDmode, counts); \
973 SYMBOL_REF_FLAG (cnt_rtx) = TRUE; \
| 1371 switch (profile_block_flag) \
1372 { \
|
974 \
| 1373 \
|
975 if (BLOCKNO) \
976 cnt_rtx = plus_constant (cnt_rtx, (BLOCKNO)*4); \
| 1374 case 2: \
|
977 \
| 1375 \
|
978 if (flag_pic) \
979 cnt_rtx = gen_rtx (PLUS, Pmode, pic_offset_table_rtx, cnt_rtx); \
| 1376 ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \
|
980 \
| 1377 \
|
981 xops[0] = gen_rtx (MEM, SImode, cnt_rtx); \
982 output_asm_insn (AS1(inc%L0,%0), xops); \
| 1378 xops[1] = gen_rtx_SYMBOL_REF (VOIDmode, block_table); \
1379 xops[2] = GEN_INT ((BLOCKNO)); \
1380 xops[3] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_trace_func")); \
1381 xops[4] = gen_rtx_SYMBOL_REF (VOIDmode, "__bb"); \
1382 xops[5] = plus_constant (xops[4], 4); \
1383 xops[0] = gen_rtx_MEM (SImode, xops[4]); \
1384 xops[6] = gen_rtx_MEM (SImode, xops[5]); \
1385 \
1386 CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \
1387 \
1388 fprintf(FILE, "\tpushf\n"); \
1389 output_asm_insn (AS2(mov%L0,%2,%0), xops); \
1390 if (flag_pic) \
1391 { \
1392 xops[7] = gen_rtx_REG (Pmode, 0); /* eax */ \
1393 output_asm_insn (AS1(push%L7,%7), xops); \
1394 output_asm_insn (AS2(lea%L7,%a1,%7), xops); \
1395 output_asm_insn (AS2(mov%L6,%7,%6), xops); \
1396 output_asm_insn (AS1(pop%L7,%7), xops); \
1397 } \
1398 else \
1399 output_asm_insn (AS2(mov%L6,%1,%6), xops); \
1400 output_asm_insn (AS1(call,%P3), xops); \
1401 fprintf(FILE, "\tpopf\n"); \
1402 \
1403 break; \
1404 \
1405 default: \
1406 \
1407 ASM_GENERATE_INTERNAL_LABEL (counts, "LPBX", 2); \
1408 cnt_rtx = gen_rtx_SYMBOL_REF (VOIDmode, counts); \
1409 SYMBOL_REF_FLAG (cnt_rtx) = TRUE; \
1410 \
1411 if (BLOCKNO) \
1412 cnt_rtx = plus_constant (cnt_rtx, (BLOCKNO)*4); \
1413 \
1414 if (flag_pic) \
1415 cnt_rtx = gen_rtx_PLUS (Pmode, pic_offset_table_rtx, cnt_rtx); \
1416 \
1417 xops[0] = gen_rtx_MEM (SImode, cnt_rtx); \
1418 output_asm_insn (AS1(inc%L0,%0), xops); \
1419 \
1420 break; \
1421 \
1422 } \
|
983 } \
984while (0)
985
| 1423 } \
1424while (0)
1425
|
| 1426/* The following macro shall output assembler code to FILE
1427 to indicate a return from function during basic-block profiling.
1428
1429 If profiling_block_flag == 2:
1430
1431 Output assembler code to call function `__bb_trace_ret'.
1432
1433 Note that function `__bb_trace_ret' must not change the
1434 machine state, especially the flag register. To grant
1435 this, you must output code to save and restore registers
1436 either in this macro or in the macros MACHINE_STATE_SAVE_RET
1437 and MACHINE_STATE_RESTORE_RET. The last two macros will be
1438 used in the function `__bb_trace_ret', so you must make
1439 sure that the function prologue does not change any
1440 register prior to saving it with MACHINE_STATE_SAVE_RET.
1441
1442 else if profiling_block_flag != 0:
1443
1444 The macro will not be used, so it need not distinguish
1445 these cases.
1446*/
1447
1448#define FUNCTION_BLOCK_PROFILER_EXIT(FILE) \
1449do \
1450 { \
1451 rtx xops[1]; \
1452 \
1453 xops[0] = gen_rtx_MEM (Pmode, gen_rtx_SYMBOL_REF (VOIDmode, "__bb_trace_ret")); \
1454 \
1455 output_asm_insn (AS1(call,%P0), xops); \
1456 \
1457 } \
1458while (0)
1459
1460/* The function `__bb_trace_func' is called in every basic block
1461 and is not allowed to change the machine state. Saving (restoring)
1462 the state can either be done in the BLOCK_PROFILER macro,
1463 before calling function (rsp. after returning from function)
1464 `__bb_trace_func', or it can be done inside the function by
1465 defining the macros:
1466
1467 MACHINE_STATE_SAVE(ID)
1468 MACHINE_STATE_RESTORE(ID)
1469
1470 In the latter case care must be taken, that the prologue code
1471 of function `__bb_trace_func' does not already change the
1472 state prior to saving it with MACHINE_STATE_SAVE.
1473
1474 The parameter `ID' is a string identifying a unique macro use.
1475
1476 On the i386 the initialization code at the begin of
1477 function `__bb_trace_func' contains a `sub' instruction
1478 therefore we handle save and restore of the flag register
1479 in the BLOCK_PROFILER macro. */
1480
1481#define MACHINE_STATE_SAVE(ID) \
1482 asm (" pushl %eax"); \
1483 asm (" pushl %ecx"); \
1484 asm (" pushl %edx"); \
1485 asm (" pushl %esi");
1486
1487#define MACHINE_STATE_RESTORE(ID) \
1488 asm (" popl %esi"); \
1489 asm (" popl %edx"); \
1490 asm (" popl %ecx"); \
1491 asm (" popl %eax");
1492
|
986/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
987 the stack pointer does not matter. The value is tested only in
988 functions that have frame pointers.
989 No definition is equivalent to always zero. */
990/* Note on the 386 it might be more efficient not to define this since
991 we have to restore it ourselves from the frame pointer, in order to
992 use pop */
993
994#define EXIT_IGNORE_STACK 1
995
996/* This macro generates the assembly code for function exit,
997 on machines that need it. If FUNCTION_EPILOGUE is not defined
998 then individual return instructions are generated for each
999 return statement. Args are same as for FUNCTION_PROLOGUE.
1000
1001 The function epilogue should not depend on the current stack pointer!
1002 It should use the frame pointer only. This is mandatory because
1003 of alloca; we also take advantage of it to omit stack adjustments
1004 before returning.
1005
1006 If the last non-note insn in the function is a BARRIER, then there
1007 is no need to emit a function prologue, because control does not fall
1008 off the end. This happens if the function ends in an "exit" call, or
1009 if a `return' insn is emitted directly into the function. */
1010
| 1493/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1494 the stack pointer does not matter. The value is tested only in
1495 functions that have frame pointers.
1496 No definition is equivalent to always zero. */
1497/* Note on the 386 it might be more efficient not to define this since
1498 we have to restore it ourselves from the frame pointer, in order to
1499 use pop */
1500
1501#define EXIT_IGNORE_STACK 1
1502
1503/* This macro generates the assembly code for function exit,
1504 on machines that need it. If FUNCTION_EPILOGUE is not defined
1505 then individual return instructions are generated for each
1506 return statement. Args are same as for FUNCTION_PROLOGUE.
1507
1508 The function epilogue should not depend on the current stack pointer!
1509 It should use the frame pointer only. This is mandatory because
1510 of alloca; we also take advantage of it to omit stack adjustments
1511 before returning.
1512
1513 If the last non-note insn in the function is a BARRIER, then there
1514 is no need to emit a function prologue, because control does not fall
1515 off the end. This happens if the function ends in an "exit" call, or
1516 if a `return' insn is emitted directly into the function. */
1517
|
1011#define FUNCTION_EPILOGUE(FILE, SIZE) \
| 1518#if 0
1519#define FUNCTION_BEGIN_EPILOGUE(FILE) \
|
1012do { \
1013 rtx last = get_last_insn (); \
1014 if (last && GET_CODE (last) == NOTE) \
1015 last = prev_nonnote_insn (last); \
| 1520do { \
1521 rtx last = get_last_insn (); \
1522 if (last && GET_CODE (last) == NOTE) \
1523 last = prev_nonnote_insn (last); \
|
1016 if (! last || GET_CODE (last) != BARRIER) \
1017 function_epilogue (FILE, SIZE); \
| 1524/* if (! last || GET_CODE (last) != BARRIER) \
1525 function_epilogue (FILE, SIZE);*/ \
|
1018} while (0)
| 1526} while (0)
|
| 1527#endif
|
1019
| 1528
|
| 1529#define FUNCTION_EPILOGUE(FILE, SIZE) \
1530 function_epilogue (FILE, SIZE)
1531
|
1020/* Output assembler code for a block containing the constant parts
1021 of a trampoline, leaving space for the variable parts. */
1022
1023/* On the 386, the trampoline contains three instructions:
1024 mov #STATIC,ecx
1025 mov #FUNCTION,eax
1026 jmp @eax */
1027#define TRAMPOLINE_TEMPLATE(FILE) \
1028{ \
1029 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb9)); \
1030 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1031 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1032 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb8)); \
1033 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1034 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1035 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xff)); \
1036 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xe0)); \
1037}
1038
1039/* Length in units of the trampoline for entering a nested function. */
1040
1041#define TRAMPOLINE_SIZE 12
1042
1043/* Emit RTL insns to initialize the variable parts of a trampoline.
1044 FNADDR is an RTX for the address of the function's pure code.
1045 CXT is an RTX for the static chain value for the function. */
1046
1047#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1048{ \
| 1532/* Output assembler code for a block containing the constant parts
1533 of a trampoline, leaving space for the variable parts. */
1534
1535/* On the 386, the trampoline contains three instructions:
1536 mov #STATIC,ecx
1537 mov #FUNCTION,eax
1538 jmp @eax */
1539#define TRAMPOLINE_TEMPLATE(FILE) \
1540{ \
1541 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb9)); \
1542 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1543 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1544 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xb8)); \
1545 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1546 ASM_OUTPUT_SHORT (FILE, const0_rtx); \
1547 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xff)); \
1548 ASM_OUTPUT_CHAR (FILE, GEN_INT (0xe0)); \
1549}
1550
1551/* Length in units of the trampoline for entering a nested function. */
1552
1553#define TRAMPOLINE_SIZE 12
1554
1555/* Emit RTL insns to initialize the variable parts of a trampoline.
1556 FNADDR is an RTX for the address of the function's pure code.
1557 CXT is an RTX for the static chain value for the function. */
1558
1559#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1560{ \
|
1049 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 1)), CXT); \
1050 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 6)), FNADDR); \
| 1561 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 1)), CXT); \
1562 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 6)), FNADDR); \
|
1051}
1052
1053/* Definitions for register eliminations.
1054
1055 This is an array of structures. Each structure initializes one pair
1056 of eliminable registers. The "from" register number is given first,
1057 followed by "to". Eliminations of the same "from" register are listed
1058 in order of preference.
1059
1060 We have two registers that can be eliminated on the i386. First, the
1061 frame pointer register can often be eliminated in favor of the stack
1062 pointer register. Secondly, the argument pointer register can always be
1063 eliminated; it is replaced with either the stack or frame pointer. */
1064
1065#define ELIMINABLE_REGS \
1066{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1067 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1068 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1069
1070/* Given FROM and TO register numbers, say whether this elimination is allowed.
1071 Frame pointer elimination is automatically handled.
1072
1073 For the i386, if frame pointer elimination is being done, we would like to
1074 convert ap into sp, not fp.
1075
1076 All other eliminations are valid. */
1077
1078#define CAN_ELIMINATE(FROM, TO) \
1079 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
1080 ? ! frame_pointer_needed \
1081 : 1)
1082
1083/* Define the offset between two registers, one to be eliminated, and the other
1084 its replacement, at the start of a routine. */
1085
1086#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1087{ \
1088 if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1089 (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \
1090 else \
1091 { \
1092 int regno; \
1093 int offset = 0; \
1094 \
1095 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
1096 if ((regs_ever_live[regno] && ! call_used_regs[regno]) \
| 1563}
1564
1565/* Definitions for register eliminations.
1566
1567 This is an array of structures. Each structure initializes one pair
1568 of eliminable registers. The "from" register number is given first,
1569 followed by "to". Eliminations of the same "from" register are listed
1570 in order of preference.
1571
1572 We have two registers that can be eliminated on the i386. First, the
1573 frame pointer register can often be eliminated in favor of the stack
1574 pointer register. Secondly, the argument pointer register can always be
1575 eliminated; it is replaced with either the stack or frame pointer. */
1576
1577#define ELIMINABLE_REGS \
1578{{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1579 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1580 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
1581
1582/* Given FROM and TO register numbers, say whether this elimination is allowed.
1583 Frame pointer elimination is automatically handled.
1584
1585 For the i386, if frame pointer elimination is being done, we would like to
1586 convert ap into sp, not fp.
1587
1588 All other eliminations are valid. */
1589
1590#define CAN_ELIMINATE(FROM, TO) \
1591 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
1592 ? ! frame_pointer_needed \
1593 : 1)
1594
1595/* Define the offset between two registers, one to be eliminated, and the other
1596 its replacement, at the start of a routine. */
1597
1598#define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1599{ \
1600 if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1601 (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \
1602 else \
1603 { \
1604 int regno; \
1605 int offset = 0; \
1606 \
1607 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
1608 if ((regs_ever_live[regno] && ! call_used_regs[regno]) \
|
1097 || (current_function_uses_pic_offset_table \
1098 && regno == PIC_OFFSET_TABLE_REGNUM)) \
| 1609 || ((current_function_uses_pic_offset_table \
1610 || current_function_uses_const_pool) \
1611 && flag_pic && regno == PIC_OFFSET_TABLE_REGNUM)) \
|
1099 offset += 4; \
1100 \
1101 (OFFSET) = offset + get_frame_size (); \
1102 \
1103 if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1104 (OFFSET) += 4; /* Skip saved PC */ \
1105 } \
1106}
1107
1108/* Addressing modes, and classification of registers for them. */
1109
1110/* #define HAVE_POST_INCREMENT */
1111/* #define HAVE_POST_DECREMENT */
1112
1113/* #define HAVE_PRE_DECREMENT */
1114/* #define HAVE_PRE_INCREMENT */
1115
1116/* Macros to check register numbers against specific register classes. */
1117
1118/* These assume that REGNO is a hard or pseudo reg number.
1119 They give nonzero only if REGNO is a hard reg of the suitable class
1120 or a pseudo reg currently allocated to a suitable hard reg.
1121 Since they use reg_renumber, they are safe only once reg_renumber
1122 has been allocated, which happens in local-alloc.c. */
1123
1124#define REGNO_OK_FOR_INDEX_P(REGNO) \
1125 ((REGNO) < STACK_POINTER_REGNUM \
1126 || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM)
1127
1128#define REGNO_OK_FOR_BASE_P(REGNO) \
1129 ((REGNO) <= STACK_POINTER_REGNUM \
1130 || (REGNO) == ARG_POINTER_REGNUM \
1131 || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM)
1132
1133#define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4)
1134#define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5)
1135
1136/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1137 and check its validity for a certain class.
1138 We have two alternate definitions for each of them.
1139 The usual definition accepts all pseudo regs; the other rejects
1140 them unless they have been allocated suitable hard regs.
1141 The symbol REG_OK_STRICT causes the latter definition to be used.
1142
1143 Most source files want to accept pseudo regs in the hope that
1144 they will get allocated to the class that the insn wants them to be in.
1145 Source files for reload pass need to be strict.
1146 After reload, it makes no difference, since pseudo regs have
1147 been eliminated by then. */
1148
1149
1150/* Non strict versions, pseudos are ok */
1151#define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
1152 (REGNO (X) < STACK_POINTER_REGNUM \
1153 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1154
1155#define REG_OK_FOR_BASE_NONSTRICT_P(X) \
1156 (REGNO (X) <= STACK_POINTER_REGNUM \
1157 || REGNO (X) == ARG_POINTER_REGNUM \
1158 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1159
1160#define REG_OK_FOR_STRREG_NONSTRICT_P(X) \
1161 (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1162
1163/* Strict versions, hard registers only */
1164#define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1165#define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1166#define REG_OK_FOR_STRREG_STRICT_P(X) \
1167 (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X)))
1168
1169#ifndef REG_OK_STRICT
1170#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X)
1171#define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X)
1172#define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_NONSTRICT_P(X)
1173
1174#else
1175#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X)
1176#define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X)
1177#define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_STRICT_P(X)
1178#endif
1179
1180/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1181 that is a valid memory address for an instruction.
1182 The MODE argument is the machine mode for the MEM expression
1183 that wants to use this address.
1184
1185 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
1186 except for CONSTANT_ADDRESS_P which is usually machine-independent.
1187
1188 See legitimize_pic_address in i386.c for details as to what
1189 constitutes a legitimate address when -fpic is used. */
1190
1191#define MAX_REGS_PER_ADDRESS 2
1192
1193#define CONSTANT_ADDRESS_P(X) \
1194 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1195 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1196 || GET_CODE (X) == HIGH)
1197
1198/* Nonzero if the constant value X is a legitimate general operand.
1199 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1200
1201#define LEGITIMATE_CONSTANT_P(X) 1
1202
1203#ifdef REG_OK_STRICT
1204#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1205{ \
1206 if (legitimate_address_p (MODE, X, 1)) \
1207 goto ADDR; \
1208}
1209
1210#else
1211#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1212{ \
1213 if (legitimate_address_p (MODE, X, 0)) \
1214 goto ADDR; \
1215}
1216
1217#endif
1218
1219/* Try machine-dependent ways of modifying an illegitimate address
1220 to be legitimate. If we find one, return the new, valid address.
1221 This macro is used in only one place: `memory_address' in explow.c.
1222
1223 OLDX is the address as it was before break_out_memory_refs was called.
1224 In some cases it is useful to look at this to decide what needs to be done.
1225
1226 MODE and WIN are passed so that this macro can use
1227 GO_IF_LEGITIMATE_ADDRESS.
1228
1229 It is always safe for this macro to do nothing. It exists to recognize
1230 opportunities to optimize the output.
1231
1232 For the 80386, we handle X+REG by loading X into a register R and
1233 using R+REG. R will go in a general reg and indexing will be used.
1234 However, if REG is a broken-out memory address or multiplication,
1235 nothing needs to be done because REG can certainly go in a general reg.
1236
1237 When -fpic is used, special handling is needed for symbolic references.
1238 See comments by legitimize_pic_address in i386.c for details. */
1239
1240#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1241{ \
| 1612 offset += 4; \
1613 \
1614 (OFFSET) = offset + get_frame_size (); \
1615 \
1616 if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1617 (OFFSET) += 4; /* Skip saved PC */ \
1618 } \
1619}
1620
1621/* Addressing modes, and classification of registers for them. */
1622
1623/* #define HAVE_POST_INCREMENT */
1624/* #define HAVE_POST_DECREMENT */
1625
1626/* #define HAVE_PRE_DECREMENT */
1627/* #define HAVE_PRE_INCREMENT */
1628
1629/* Macros to check register numbers against specific register classes. */
1630
1631/* These assume that REGNO is a hard or pseudo reg number.
1632 They give nonzero only if REGNO is a hard reg of the suitable class
1633 or a pseudo reg currently allocated to a suitable hard reg.
1634 Since they use reg_renumber, they are safe only once reg_renumber
1635 has been allocated, which happens in local-alloc.c. */
1636
1637#define REGNO_OK_FOR_INDEX_P(REGNO) \
1638 ((REGNO) < STACK_POINTER_REGNUM \
1639 || (unsigned) reg_renumber[REGNO] < STACK_POINTER_REGNUM)
1640
1641#define REGNO_OK_FOR_BASE_P(REGNO) \
1642 ((REGNO) <= STACK_POINTER_REGNUM \
1643 || (REGNO) == ARG_POINTER_REGNUM \
1644 || (unsigned) reg_renumber[REGNO] <= STACK_POINTER_REGNUM)
1645
1646#define REGNO_OK_FOR_SIREG_P(REGNO) ((REGNO) == 4 || reg_renumber[REGNO] == 4)
1647#define REGNO_OK_FOR_DIREG_P(REGNO) ((REGNO) == 5 || reg_renumber[REGNO] == 5)
1648
1649/* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1650 and check its validity for a certain class.
1651 We have two alternate definitions for each of them.
1652 The usual definition accepts all pseudo regs; the other rejects
1653 them unless they have been allocated suitable hard regs.
1654 The symbol REG_OK_STRICT causes the latter definition to be used.
1655
1656 Most source files want to accept pseudo regs in the hope that
1657 they will get allocated to the class that the insn wants them to be in.
1658 Source files for reload pass need to be strict.
1659 After reload, it makes no difference, since pseudo regs have
1660 been eliminated by then. */
1661
1662
1663/* Non strict versions, pseudos are ok */
1664#define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
1665 (REGNO (X) < STACK_POINTER_REGNUM \
1666 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1667
1668#define REG_OK_FOR_BASE_NONSTRICT_P(X) \
1669 (REGNO (X) <= STACK_POINTER_REGNUM \
1670 || REGNO (X) == ARG_POINTER_REGNUM \
1671 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1672
1673#define REG_OK_FOR_STRREG_NONSTRICT_P(X) \
1674 (REGNO (X) == 4 || REGNO (X) == 5 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1675
1676/* Strict versions, hard registers only */
1677#define REG_OK_FOR_INDEX_STRICT_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1678#define REG_OK_FOR_BASE_STRICT_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1679#define REG_OK_FOR_STRREG_STRICT_P(X) \
1680 (REGNO_OK_FOR_DIREG_P (REGNO (X)) || REGNO_OK_FOR_SIREG_P (REGNO (X)))
1681
1682#ifndef REG_OK_STRICT
1683#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X)
1684#define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X)
1685#define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_NONSTRICT_P(X)
1686
1687#else
1688#define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X)
1689#define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X)
1690#define REG_OK_FOR_STRREG_P(X) REG_OK_FOR_STRREG_STRICT_P(X)
1691#endif
1692
1693/* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1694 that is a valid memory address for an instruction.
1695 The MODE argument is the machine mode for the MEM expression
1696 that wants to use this address.
1697
1698 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS,
1699 except for CONSTANT_ADDRESS_P which is usually machine-independent.
1700
1701 See legitimize_pic_address in i386.c for details as to what
1702 constitutes a legitimate address when -fpic is used. */
1703
1704#define MAX_REGS_PER_ADDRESS 2
1705
1706#define CONSTANT_ADDRESS_P(X) \
1707 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1708 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1709 || GET_CODE (X) == HIGH)
1710
1711/* Nonzero if the constant value X is a legitimate general operand.
1712 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1713
1714#define LEGITIMATE_CONSTANT_P(X) 1
1715
1716#ifdef REG_OK_STRICT
1717#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1718{ \
1719 if (legitimate_address_p (MODE, X, 1)) \
1720 goto ADDR; \
1721}
1722
1723#else
1724#define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1725{ \
1726 if (legitimate_address_p (MODE, X, 0)) \
1727 goto ADDR; \
1728}
1729
1730#endif
1731
1732/* Try machine-dependent ways of modifying an illegitimate address
1733 to be legitimate. If we find one, return the new, valid address.
1734 This macro is used in only one place: `memory_address' in explow.c.
1735
1736 OLDX is the address as it was before break_out_memory_refs was called.
1737 In some cases it is useful to look at this to decide what needs to be done.
1738
1739 MODE and WIN are passed so that this macro can use
1740 GO_IF_LEGITIMATE_ADDRESS.
1741
1742 It is always safe for this macro to do nothing. It exists to recognize
1743 opportunities to optimize the output.
1744
1745 For the 80386, we handle X+REG by loading X into a register R and
1746 using R+REG. R will go in a general reg and indexing will be used.
1747 However, if REG is a broken-out memory address or multiplication,
1748 nothing needs to be done because REG can certainly go in a general reg.
1749
1750 When -fpic is used, special handling is needed for symbolic references.
1751 See comments by legitimize_pic_address in i386.c for details. */
1752
1753#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1754{ \
|
1242 rtx orig_x = (X); \
| |
1243 (X) = legitimize_address (X, OLDX, MODE); \
1244 if (memory_address_p (MODE, X)) \
1245 goto WIN; \
1246}
1247
| 1755 (X) = legitimize_address (X, OLDX, MODE); \
1756 if (memory_address_p (MODE, X)) \
1757 goto WIN; \
1758}
1759
|
| 1760#define REWRITE_ADDRESS(x) rewrite_address(x)
1761
|
1248/* Nonzero if the constant value X is a legitimate general operand
1249 when generating PIC code. It is given that flag_pic is on and
1250 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1251
1252#define LEGITIMATE_PIC_OPERAND_P(X) \
1253 (! SYMBOLIC_CONST (X) \
1254 || (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X)))
1255
1256#define SYMBOLIC_CONST(X) \
1257(GET_CODE (X) == SYMBOL_REF \
1258 || GET_CODE (X) == LABEL_REF \
1259 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
1260
1261/* Go to LABEL if ADDR (a legitimate address expression)
1262 has an effect that depends on the machine mode it is used for.
1263 On the 80386, only postdecrement and postincrement address depend thus
1264 (the amount of decrement or increment being the length of the operand). */
1265#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1266 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1267
1268/* Define this macro if references to a symbol must be treated
1269 differently depending on something about the variable or
1270 function named by the symbol (such as what section it is in).
1271
1272 On i386, if using PIC, mark a SYMBOL_REF for a non-global symbol
1273 so that we may access it directly in the GOT. */
1274
1275#define ENCODE_SECTION_INFO(DECL) \
1276do \
1277 { \
1278 if (flag_pic) \
1279 { \
1280 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1281 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
| 1762/* Nonzero if the constant value X is a legitimate general operand
1763 when generating PIC code. It is given that flag_pic is on and
1764 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1765
1766#define LEGITIMATE_PIC_OPERAND_P(X) \
1767 (! SYMBOLIC_CONST (X) \
1768 || (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X)))
1769
1770#define SYMBOLIC_CONST(X) \
1771(GET_CODE (X) == SYMBOL_REF \
1772 || GET_CODE (X) == LABEL_REF \
1773 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
1774
1775/* Go to LABEL if ADDR (a legitimate address expression)
1776 has an effect that depends on the machine mode it is used for.
1777 On the 80386, only postdecrement and postincrement address depend thus
1778 (the amount of decrement or increment being the length of the operand). */
1779#define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1780 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1781
1782/* Define this macro if references to a symbol must be treated
1783 differently depending on something about the variable or
1784 function named by the symbol (such as what section it is in).
1785
1786 On i386, if using PIC, mark a SYMBOL_REF for a non-global symbol
1787 so that we may access it directly in the GOT. */
1788
1789#define ENCODE_SECTION_INFO(DECL) \
1790do \
1791 { \
1792 if (flag_pic) \
1793 { \
1794 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1795 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
|
| 1796 \
1797 if (TARGET_DEBUG_ADDR \
1798 && TREE_CODE_CLASS (TREE_CODE (DECL)) == 'd') \
1799 { \
1800 fprintf (stderr, "Encode %s, public = %d\n", \
1801 IDENTIFIER_POINTER (DECL_NAME (DECL)), \
1802 TREE_PUBLIC (DECL)); \
1803 } \
1804 \
|
1282 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
1283 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1284 || ! TREE_PUBLIC (DECL)); \
1285 } \
1286 } \
1287while (0)
1288
| 1805 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
1806 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1807 || ! TREE_PUBLIC (DECL)); \
1808 } \
1809 } \
1810while (0)
1811
|
1289/* Define this macro if a SYMBOL_REF representing a non-global
1290 address must be marked specially. This is called for
1291 compiler-generated local symbols, such as "__EXCEPTION_TABLE__".
1292
1293 On i386, if using PIC, we use this to set the rtx's
1294 SYMBOL_REF_FLAG, so that we may access it directly as
1295 an offset from the GOT register. */
1296
1297#define MARK_LOCAL_ADDRESS(X) \
1298do \
1299 { \
1300 if (flag_pic && GET_CODE (X) == SYMBOL_REF) \
1301 SYMBOL_REF_FLAG (X) = 1; \
1302 } \
1303while (0)
1304
| |
1305/* Initialize data used by insn expanders. This is called from
1306 init_emit, once for each function, before code is generated.
1307 For 386, clear stack slot assignments remembered from previous
1308 functions. */
1309
1310#define INIT_EXPANDERS clear_386_stack_locals ()
1311
1312/* The `FINALIZE_PIC' macro serves as a hook to emit these special
1313 codes once the function is being compiled into assembly code, but
1314 not before. (It is not done before, because in the case of
1315 compiling an inline function, it would lead to multiple PIC
1316 prologues being included in functions which used inline functions
1317 and were compiled to assembly language.) */
1318
1319#define FINALIZE_PIC \
1320do \
1321 { \
1322 extern int current_function_uses_pic_offset_table; \
1323 \
1324 current_function_uses_pic_offset_table |= profile_flag | profile_block_flag; \
1325 } \
1326while (0)
1327
1328
1329/* If defined, a C expression whose value is nonzero if IDENTIFIER
1330 with arguments ARGS is a valid machine specific attribute for DECL.
1331 The attributes in ATTRIBUTES have previously been assigned to DECL. */
1332
1333#define VALID_MACHINE_DECL_ATTRIBUTE(DECL, ATTRIBUTES, NAME, ARGS) \
1334 (i386_valid_decl_attribute_p (DECL, ATTRIBUTES, NAME, ARGS))
1335
1336/* If defined, a C expression whose value is nonzero if IDENTIFIER
1337 with arguments ARGS is a valid machine specific attribute for TYPE.
1338 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
1339
1340#define VALID_MACHINE_TYPE_ATTRIBUTE(TYPE, ATTRIBUTES, NAME, ARGS) \
1341 (i386_valid_type_attribute_p (TYPE, ATTRIBUTES, NAME, ARGS))
1342
1343/* If defined, a C expression whose value is zero if the attributes on
1344 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
1345 two if they are nearly compatible (which causes a warning to be
1346 generated). */
1347
1348#define COMP_TYPE_ATTRIBUTES(TYPE1, TYPE2) \
1349 (i386_comp_type_attributes (TYPE1, TYPE2))
1350
1351/* If defined, a C statement that assigns default attributes to newly
1352 defined TYPE. */
1353
1354/* #define SET_DEFAULT_TYPE_ATTRIBUTES (TYPE) */
1355
1356/* Max number of args passed in registers. If this is more than 3, we will
1357 have problems with ebx (register #4), since it is a caller save register and
1358 is also used as the pic register in ELF. So for now, don't allow more than
1359 3 registers to be passed in registers. */
1360
1361#define REGPARM_MAX 3
1362
1363
1364/* Specify the machine mode that this machine uses
1365 for the index in the tablejump instruction. */
1366#define CASE_VECTOR_MODE Pmode
1367
| 1812/* Initialize data used by insn expanders. This is called from
1813 init_emit, once for each function, before code is generated.
1814 For 386, clear stack slot assignments remembered from previous
1815 functions. */
1816
1817#define INIT_EXPANDERS clear_386_stack_locals ()
1818
1819/* The `FINALIZE_PIC' macro serves as a hook to emit these special
1820 codes once the function is being compiled into assembly code, but
1821 not before. (It is not done before, because in the case of
1822 compiling an inline function, it would lead to multiple PIC
1823 prologues being included in functions which used inline functions
1824 and were compiled to assembly language.) */
1825
1826#define FINALIZE_PIC \
1827do \
1828 { \
1829 extern int current_function_uses_pic_offset_table; \
1830 \
1831 current_function_uses_pic_offset_table |= profile_flag | profile_block_flag; \
1832 } \
1833while (0)
1834
1835
1836/* If defined, a C expression whose value is nonzero if IDENTIFIER
1837 with arguments ARGS is a valid machine specific attribute for DECL.
1838 The attributes in ATTRIBUTES have previously been assigned to DECL. */
1839
1840#define VALID_MACHINE_DECL_ATTRIBUTE(DECL, ATTRIBUTES, NAME, ARGS) \
1841 (i386_valid_decl_attribute_p (DECL, ATTRIBUTES, NAME, ARGS))
1842
1843/* If defined, a C expression whose value is nonzero if IDENTIFIER
1844 with arguments ARGS is a valid machine specific attribute for TYPE.
1845 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
1846
1847#define VALID_MACHINE_TYPE_ATTRIBUTE(TYPE, ATTRIBUTES, NAME, ARGS) \
1848 (i386_valid_type_attribute_p (TYPE, ATTRIBUTES, NAME, ARGS))
1849
1850/* If defined, a C expression whose value is zero if the attributes on
1851 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
1852 two if they are nearly compatible (which causes a warning to be
1853 generated). */
1854
1855#define COMP_TYPE_ATTRIBUTES(TYPE1, TYPE2) \
1856 (i386_comp_type_attributes (TYPE1, TYPE2))
1857
1858/* If defined, a C statement that assigns default attributes to newly
1859 defined TYPE. */
1860
1861/* #define SET_DEFAULT_TYPE_ATTRIBUTES (TYPE) */
1862
1863/* Max number of args passed in registers. If this is more than 3, we will
1864 have problems with ebx (register #4), since it is a caller save register and
1865 is also used as the pic register in ELF. So for now, don't allow more than
1866 3 registers to be passed in registers. */
1867
1868#define REGPARM_MAX 3
1869
1870
1871/* Specify the machine mode that this machine uses
1872 for the index in the tablejump instruction. */
1873#define CASE_VECTOR_MODE Pmode
1874
|
1368/* Define this if the tablejump instruction expects the table
1369 to contain offsets from the address of the table.
1370 Do not define this if the table should contain absolute addresses. */
1371/* #define CASE_VECTOR_PC_RELATIVE */
| 1875/* Define as C expression which evaluates to nonzero if the tablejump
1876 instruction expects the table to contain offsets from the address of the
1877 table.
1878 Do not define this if the table should contain absolute addresses. */
1879/* #define CASE_VECTOR_PC_RELATIVE 1 */
|
1372
1373/* Specify the tree operation to be used to convert reals to integers.
1374 This should be changed to take advantage of fist --wfs ??
1375 */
1376#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1377
1378/* This is the kind of divide that is easiest to do in the general case. */
1379#define EASY_DIV_EXPR TRUNC_DIV_EXPR
1380
1381/* Define this as 1 if `char' should by default be signed; else as 0. */
1382#define DEFAULT_SIGNED_CHAR 1
1383
1384/* Max number of bytes we can move from memory to memory
1385 in one reasonably fast instruction. */
1386#define MOVE_MAX 4
1387
| 1880
1881/* Specify the tree operation to be used to convert reals to integers.
1882 This should be changed to take advantage of fist --wfs ??
1883 */
1884#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1885
1886/* This is the kind of divide that is easiest to do in the general case. */
1887#define EASY_DIV_EXPR TRUNC_DIV_EXPR
1888
1889/* Define this as 1 if `char' should by default be signed; else as 0. */
1890#define DEFAULT_SIGNED_CHAR 1
1891
1892/* Max number of bytes we can move from memory to memory
1893 in one reasonably fast instruction. */
1894#define MOVE_MAX 4
1895
|
1388/* MOVE_RATIO is the number of move instructions that is better than a
1389 block move. Make this large on i386, since the block move is very
1390 inefficient with small blocks, and the hard register needs of the
1391 block move require much reload work. */
1392#define MOVE_RATIO 5
| 1896/* The number of scalar move insns which should be generated instead
1897 of a string move insn or a library call. Increasing the value
1898 will always make code faster, but eventually incurs high cost in
1899 increased code size.
|
1393
| 1900
|
1394/* Define this if zero-extension is slow (more than one real instruction). */
1395/* #define SLOW_ZERO_EXTEND */
| 1901 If you don't define this, a reasonable default is used.
|
1396
| 1902
|
1397/* Nonzero if access to memory by bytes is slow and undesirable. */
1398#define SLOW_BYTE_ACCESS 0
| 1903 Make this large on i386, since the block move is very inefficient with small
1904 blocks, and the hard register needs of the block move require much reload
1905 work. */
|
1399
| 1906
|
| 1907#define MOVE_RATIO 5
1908
|
1400/* Define if shifts truncate the shift count
1401 which implies one can omit a sign-extension or zero-extension
1402 of a shift count. */
| 1909/* Define if shifts truncate the shift count
1910 which implies one can omit a sign-extension or zero-extension
1911 of a shift count. */
|
1403/* One i386, shifts do truncate the count. But bit opcodes don't. */
| 1912/* On i386, shifts do truncate the count. But bit opcodes don't. */
|
1404
1405/* #define SHIFT_COUNT_TRUNCATED */
1406
1407/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1408 is done just by pretending it is already truncated. */
1409#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1410
1411/* We assume that the store-condition-codes instructions store 0 for false
1412 and some other value for true. This is the value stored for true. */
1413
1414#define STORE_FLAG_VALUE 1
1415
1416/* When a prototype says `char' or `short', really pass an `int'.
1417 (The 386 can't easily push less than an int.) */
1418
1419#define PROMOTE_PROTOTYPES
1420
1421/* Specify the machine mode that pointers have.
1422 After generation of rtl, the compiler makes no further distinction
1423 between pointers and any other objects of this machine mode. */
1424#define Pmode SImode
1425
1426/* A function address in a call instruction
1427 is a byte address (for indexing purposes)
1428 so give the MEM rtx a byte's mode. */
1429#define FUNCTION_MODE QImode
| 1913
1914/* #define SHIFT_COUNT_TRUNCATED */
1915
1916/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1917 is done just by pretending it is already truncated. */
1918#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1919
1920/* We assume that the store-condition-codes instructions store 0 for false
1921 and some other value for true. This is the value stored for true. */
1922
1923#define STORE_FLAG_VALUE 1
1924
1925/* When a prototype says `char' or `short', really pass an `int'.
1926 (The 386 can't easily push less than an int.) */
1927
1928#define PROMOTE_PROTOTYPES
1929
1930/* Specify the machine mode that pointers have.
1931 After generation of rtl, the compiler makes no further distinction
1932 between pointers and any other objects of this machine mode. */
1933#define Pmode SImode
1934
1935/* A function address in a call instruction
1936 is a byte address (for indexing purposes)
1937 so give the MEM rtx a byte's mode. */
1938#define FUNCTION_MODE QImode
|
| 1939
1940/* A part of a C `switch' statement that describes the relative costs
1941 of constant RTL expressions. It must contain `case' labels for
1942 expression codes `const_int', `const', `symbol_ref', `label_ref'
1943 and `const_double'. Each case must ultimately reach a `return'
1944 statement to return the relative cost of the use of that kind of
1945 constant value in an expression. The cost may depend on the
1946 precise value of the constant, which is available for examination
1947 in X, and the rtx code of the expression in which it is contained,
1948 found in OUTER_CODE.
1949
1950 CODE is the expression code--redundant, since it can be obtained
1951 with `GET_CODE (X)'. */
|
1430
| 1952
|
1431/* Define this if addresses of constant functions
1432 shouldn't be put through pseudo regs where they can be cse'd.
1433 Desirable on the 386 because a CALL with a constant address is
1434 not much slower than one with a register address. On a 486,
1435 it is faster to call with a constant address than indirect. */
1436#define NO_FUNCTION_CSE
1437
1438/* Provide the costs of a rtl expression. This is in the body of a
1439 switch on CODE. */
1440
1441#define RTX_COSTS(X,CODE,OUTER_CODE) \
1442 case MULT: \
1443 return COSTS_N_INSNS (20); \
1444 case DIV: \
1445 case UDIV: \
1446 case MOD: \
1447 case UMOD: \
1448 return COSTS_N_INSNS (20); \
1449 case ASHIFTRT: \
1450 case LSHIFTRT: \
1451 case ASHIFT: \
1452 return (4 + rtx_cost (XEXP (X, 0), OUTER_CODE) \
1453 + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1454 case PLUS: \
1455 if (GET_CODE (XEXP (X, 0)) == MULT \
1456 && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \
1457 && (INTVAL (XEXP (XEXP (X, 0), 1)) == 2 \
1458 || INTVAL (XEXP (XEXP (X, 0), 1)) == 4 \
1459 || INTVAL (XEXP (XEXP (X, 0), 1)) == 8)) \
1460 return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \
1461 + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1462 break;
1463
1464
1465/* Compute the cost of computing a constant rtl expression RTX
1466 whose rtx-code is CODE. The body of this macro is a portion
1467 of a switch statement. If the code is computed here,
1468 return it with a return statement. Otherwise, break from the switch. */
1469
| |
1470#define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1471 case CONST_INT: \
| 1953#define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1954 case CONST_INT: \
|
| 1955 return (unsigned) INTVAL (RTX) < 256 ? 0 : 1; \
|
1472 case CONST: \
1473 case LABEL_REF: \
1474 case SYMBOL_REF: \
| 1956 case CONST: \
1957 case LABEL_REF: \
1958 case SYMBOL_REF: \
|
1475 return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 0; \
| 1959 return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 1; \
1960 \
|
1476 case CONST_DOUBLE: \
1477 { \
1478 int code; \
1479 if (GET_MODE (RTX) == VOIDmode) \
1480 return 2; \
| 1961 case CONST_DOUBLE: \
1962 { \
1963 int code; \
1964 if (GET_MODE (RTX) == VOIDmode) \
1965 return 2; \
|
| 1966 \
|
1481 code = standard_80387_constant_p (RTX); \
1482 return code == 1 ? 0 : \
1483 code == 2 ? 1 : \
1484 2; \
1485 }
1486
| 1967 code = standard_80387_constant_p (RTX); \
1968 return code == 1 ? 0 : \
1969 code == 2 ? 1 : \
1970 2; \
1971 }
1972
|
1487/* Compute the cost of an address. This is meant to approximate the size
1488 and/or execution delay of an insn using that address. If the cost is
1489 approximated by the RTL complexity, including CONST_COSTS above, as
1490 is usually the case for CISC machines, this macro should not be defined.
1491 For aggressively RISCy machines, only one insn format is allowed, so
1492 this macro should be a constant. The value of this macro only matters
1493 for valid addresses.
| 1973/* Delete the definition here when TOPLEVEL_COSTS_N_INSNS gets added to cse.c */
1974#define TOPLEVEL_COSTS_N_INSNS(N) {total = COSTS_N_INSNS (N); break;}
|
1494
| 1975
|
| 1976/* Like `CONST_COSTS' but applies to nonconstant RTL expressions.
1977 This can be used, for example, to indicate how costly a multiply
1978 instruction is. In writing this macro, you can use the construct
1979 `COSTS_N_INSNS (N)' to specify a cost equal to N fast
1980 instructions. OUTER_CODE is the code of the expression in which X
1981 is contained.
1982
1983 This macro is optional; do not define it if the default cost
1984 assumptions are adequate for the target machine. */
1985
1986#define RTX_COSTS(X,CODE,OUTER_CODE) \
1987 case ASHIFT: \
1988 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
1989 && GET_MODE (XEXP (X, 0)) == SImode) \
1990 { \
1991 HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \
1992 \
1993 if (value == 1) \
1994 return COSTS_N_INSNS (ix86_cost->add) \
1995 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
1996 \
1997 if (value == 2 || value == 3) \
1998 return COSTS_N_INSNS (ix86_cost->lea) \
1999 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
2000 } \
2001 /* fall through */ \
2002 \
2003 case ROTATE: \
2004 case ASHIFTRT: \
2005 case LSHIFTRT: \
2006 case ROTATERT: \
2007 if (GET_MODE (XEXP (X, 0)) == DImode) \
2008 { \
2009 if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
2010 { \
2011 if (INTVAL (XEXP (X, 1)) > 32) \
2012 return COSTS_N_INSNS(ix86_cost->shift_const + 2); \
2013 return COSTS_N_INSNS(ix86_cost->shift_const * 2); \
2014 } \
2015 return ((GET_CODE (XEXP (X, 1)) == AND \
2016 ? COSTS_N_INSNS(ix86_cost->shift_var * 2) \
2017 : COSTS_N_INSNS(ix86_cost->shift_var * 6 + 2)) \
2018 + rtx_cost(XEXP (X, 0), OUTER_CODE)); \
2019 } \
2020 return COSTS_N_INSNS (GET_CODE (XEXP (X, 1)) == CONST_INT \
2021 ? ix86_cost->shift_const \
2022 : ix86_cost->shift_var) \
2023 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
2024 \
2025 case MULT: \
2026 if (GET_CODE (XEXP (X, 1)) == CONST_INT) \
2027 { \
2028 unsigned HOST_WIDE_INT value = INTVAL (XEXP (X, 1)); \
2029 int nbits = 0; \
2030 \
2031 if (value == 2) \
2032 return COSTS_N_INSNS (ix86_cost->add) \
2033 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
2034 if (value == 4 || value == 8) \
2035 return COSTS_N_INSNS (ix86_cost->lea) \
2036 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
2037 \
2038 while (value != 0) \
2039 { \
2040 nbits++; \
2041 value >>= 1; \
2042 } \
2043 \
2044 if (nbits == 1) \
2045 return COSTS_N_INSNS (ix86_cost->shift_const) \
2046 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
2047 \
2048 return COSTS_N_INSNS (ix86_cost->mult_init \
2049 + nbits * ix86_cost->mult_bit) \
2050 + rtx_cost(XEXP (X, 0), OUTER_CODE); \
2051 } \
2052 \
2053 else /* This is arbitrary */ \
2054 TOPLEVEL_COSTS_N_INSNS (ix86_cost->mult_init \
2055 + 7 * ix86_cost->mult_bit); \
2056 \
2057 case DIV: \
2058 case UDIV: \
2059 case MOD: \
2060 case UMOD: \
2061 TOPLEVEL_COSTS_N_INSNS (ix86_cost->divide); \
2062 \
2063 case PLUS: \
2064 if (GET_CODE (XEXP (X, 0)) == REG \
2065 && GET_MODE (XEXP (X, 0)) == SImode \
2066 && GET_CODE (XEXP (X, 1)) == PLUS) \
2067 return COSTS_N_INSNS (ix86_cost->lea); \
2068 \
2069 /* fall through */ \
2070 case AND: \
2071 case IOR: \
2072 case XOR: \
2073 case MINUS: \
2074 if (GET_MODE (X) == DImode) \
2075 return COSTS_N_INSNS (ix86_cost->add) * 2 \
2076 + (rtx_cost (XEXP (X, 0), OUTER_CODE) \
2077 << (GET_MODE (XEXP (X, 0)) != DImode)) \
2078 + (rtx_cost (XEXP (X, 1), OUTER_CODE) \
2079 << (GET_MODE (XEXP (X, 1)) != DImode)); \
2080 case NEG: \
2081 case NOT: \
2082 if (GET_MODE (X) == DImode) \
2083 TOPLEVEL_COSTS_N_INSNS (ix86_cost->add * 2) \
2084 TOPLEVEL_COSTS_N_INSNS (ix86_cost->add)
2085
2086
2087/* An expression giving the cost of an addressing mode that contains
2088 ADDRESS. If not defined, the cost is computed from the ADDRESS
2089 expression and the `CONST_COSTS' values.
2090
2091 For most CISC machines, the default cost is a good approximation
2092 of the true cost of the addressing mode. However, on RISC
2093 machines, all instructions normally have the same length and
2094 execution time. Hence all addresses will have equal costs.
2095
2096 In cases where more than one form of an address is known, the form
2097 with the lowest cost will be used. If multiple forms have the
2098 same, lowest, cost, the one that is the most complex will be used.
2099
2100 For example, suppose an address that is equal to the sum of a
2101 register and a constant is used twice in the same basic block.
2102 When this macro is not defined, the address will be computed in a
2103 register and memory references will be indirect through that
2104 register. On machines where the cost of the addressing mode
2105 containing the sum is no higher than that of a simple indirect
2106 reference, this will produce an additional instruction and
2107 possibly require an additional register. Proper specification of
2108 this macro eliminates this overhead for such machines.
2109
2110 Similar use of this macro is made in strength reduction of loops.
2111
2112 ADDRESS need not be valid as an address. In such a case, the cost
2113 is not relevant and can be any value; invalid addresses need not be
2114 assigned a different cost.
2115
2116 On machines where an address involving more than one register is as
2117 cheap as an address computation involving only one register,
2118 defining `ADDRESS_COST' to reflect this can cause two registers to
2119 be live over a region of code where only one would have been if
2120 `ADDRESS_COST' were not defined in that manner. This effect should
2121 be considered in the definition of this macro. Equivalent costs
2122 should probably only be given to addresses with different numbers
2123 of registers on machines with lots of registers.
2124
2125 This macro will normally either not be defined or be defined as a
2126 constant.
2127
|
1495 For i386, it is better to use a complex address than let gcc copy
1496 the address into a reg and make a new pseudo. But not if the address
1497 requires to two regs - that would mean more pseudos with longer
1498 lifetimes. */
1499
1500#define ADDRESS_COST(RTX) \
1501 ((CONSTANT_P (RTX) \
1502 || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \
1503 && REG_P (XEXP (RTX, 0)))) ? 0 \
1504 : REG_P (RTX) ? 1 \
1505 : 2)
| 2128 For i386, it is better to use a complex address than let gcc copy
2129 the address into a reg and make a new pseudo. But not if the address
2130 requires to two regs - that would mean more pseudos with longer
2131 lifetimes. */
2132
2133#define ADDRESS_COST(RTX) \
2134 ((CONSTANT_P (RTX) \
2135 || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \
2136 && REG_P (XEXP (RTX, 0)))) ? 0 \
2137 : REG_P (RTX) ? 1 \
2138 : 2)
|
| 2139
2140/* A C expression for the cost of moving data of mode M between a
2141 register and memory. A value of 2 is the default; this cost is
2142 relative to those in `REGISTER_MOVE_COST'.
2143
2144 If moving between registers and memory is more expensive than
2145 between two registers, you should define this macro to express the
2146 relative cost.
2147
2148 On the i386, copying between floating-point and fixed-point
2149 registers is expensive. */
2150
2151#define REGISTER_MOVE_COST(CLASS1, CLASS2) \
2152 (((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
2153 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2))) ? 10 \
2154 : 2)
2155
2156
2157/* A C expression for the cost of moving data of mode M between a
2158 register and memory. A value of 2 is the default; this cost is
2159 relative to those in `REGISTER_MOVE_COST'.
2160
2161 If moving between registers and memory is more expensive than
2162 between two registers, you should define this macro to express the
2163 relative cost. */
2164
2165/* #define MEMORY_MOVE_COST(M,C,I) 2 */
2166
2167/* A C expression for the cost of a branch instruction. A value of 1
2168 is the default; other values are interpreted relative to that. */
2169
2170#define BRANCH_COST i386_branch_cost
2171
2172/* Define this macro as a C expression which is nonzero if accessing
2173 less than a word of memory (i.e. a `char' or a `short') is no
2174 faster than accessing a word of memory, i.e., if such access
2175 require more than one instruction or if there is no difference in
2176 cost between byte and (aligned) word loads.
2177
2178 When this macro is not defined, the compiler will access a field by
2179 finding the smallest containing object; when it is defined, a
2180 fullword load will be used if alignment permits. Unless bytes
2181 accesses are faster than word accesses, using word accesses is
2182 preferable since it may eliminate subsequent memory access if
2183 subsequent accesses occur to other fields in the same word of the
2184 structure, but to different bytes. */
2185
2186#define SLOW_BYTE_ACCESS 0
2187
2188/* Nonzero if access to memory by shorts is slow and undesirable. */
2189#define SLOW_SHORT_ACCESS 0
2190
2191/* Define this macro if zero-extension (of a `char' or `short' to an
2192 `int') can be done faster if the destination is a register that is
2193 known to be zero.
2194
2195 If you define this macro, you must have instruction patterns that
2196 recognize RTL structures like this:
2197
2198 (set (strict_low_part (subreg:QI (reg:SI ...) 0)) ...)
2199
2200 and likewise for `HImode'. */
2201
2202/* #define SLOW_ZERO_EXTEND */
2203
2204/* Define this macro to be the value 1 if unaligned accesses have a
2205 cost many times greater than aligned accesses, for example if they
2206 are emulated in a trap handler.
2207
2208 When this macro is non-zero, the compiler will act as if
2209 `STRICT_ALIGNMENT' were non-zero when generating code for block
2210 moves. This can cause significantly more instructions to be
2211 produced. Therefore, do not set this macro non-zero if unaligned
2212 accesses only add a cycle or two to the time for a memory access.
2213
2214 If the value of this macro is always zero, it need not be defined. */
2215
2216/* #define SLOW_UNALIGNED_ACCESS 0 */
2217
2218/* Define this macro to inhibit strength reduction of memory
2219 addresses. (On some machines, such strength reduction seems to do
2220 harm rather than good.) */
2221
2222/* #define DONT_REDUCE_ADDR */
2223
2224/* Define this macro if it is as good or better to call a constant
2225 function address than to call an address kept in a register.
2226
2227 Desirable on the 386 because a CALL with a constant address is
2228 faster than one with a register address. */
2229
2230#define NO_FUNCTION_CSE
2231
2232/* Define this macro if it is as good or better for a function to call
2233 itself with an explicit address than to call an address kept in a
2234 register. */
2235
2236#define NO_RECURSIVE_FUNCTION_CSE
2237
2238/* A C statement (sans semicolon) to update the integer variable COST
2239 based on the relationship between INSN that is dependent on
2240 DEP_INSN through the dependence LINK. The default is to make no
2241 adjustment to COST. This can be used for example to specify to
2242 the scheduler that an output- or anti-dependence does not incur
2243 the same cost as a data-dependence. */
2244
2245#define ADJUST_COST(insn,link,dep_insn,cost) \
2246 { \
2247 rtx next_inst; \
2248 if (GET_CODE (dep_insn) == CALL_INSN) \
2249 (cost) = 0; \
2250 \
2251 else if (GET_CODE (dep_insn) == INSN \
2252 && GET_CODE (PATTERN (dep_insn)) == SET \
2253 && GET_CODE (SET_DEST (PATTERN (dep_insn))) == REG \
2254 && GET_CODE (insn) == INSN \
2255 && GET_CODE (PATTERN (insn)) == SET \
2256 && !reg_overlap_mentioned_p (SET_DEST (PATTERN (dep_insn)), \
2257 SET_SRC (PATTERN (insn)))) \
2258 { \
2259 (cost) = 0; \
2260 } \
2261 \
2262 else if (GET_CODE (insn) == JUMP_INSN) \
2263 { \
2264 (cost) = 0; \
2265 } \
2266 \
2267 if (TARGET_PENTIUM) \
2268 { \
2269 if (cost !=0 && is_fp_insn (insn) && is_fp_insn (dep_insn) \
2270 && !is_fp_dest (dep_insn)) \
2271 { \
2272 (cost) = 0; \
2273 } \
2274 \
2275 if (agi_dependent (insn, dep_insn)) \
2276 { \
2277 (cost) = 3; \
2278 } \
2279 else if (GET_CODE (insn) == INSN \
2280 && GET_CODE (PATTERN (insn)) == SET \
2281 && SET_DEST (PATTERN (insn)) == cc0_rtx \
2282 && (next_inst = next_nonnote_insn (insn)) \
2283 && GET_CODE (next_inst) == JUMP_INSN) \
2284 { /* compare probably paired with jump */ \
2285 (cost) = 0; \
2286 } \
2287 } \
2288 else \
2289 if (!is_fp_dest (dep_insn)) \
2290 { \
2291 if(!agi_dependent (insn, dep_insn)) \
2292 (cost) = 0; \
2293 else if (TARGET_486) \
2294 (cost) = 2; \
2295 } \
2296 else \
2297 if (is_fp_store (insn) && is_fp_insn (dep_insn) \
2298 && NEXT_INSN (insn) && NEXT_INSN (NEXT_INSN (insn)) \
2299 && NEXT_INSN (NEXT_INSN (NEXT_INSN (insn))) \
2300 && (GET_CODE (NEXT_INSN (insn)) == INSN) \
2301 && (GET_CODE (NEXT_INSN (NEXT_INSN (insn))) == JUMP_INSN) \
2302 && (GET_CODE (NEXT_INSN (NEXT_INSN (NEXT_INSN (insn)))) == NOTE) \
2303 && (NOTE_LINE_NUMBER (NEXT_INSN (NEXT_INSN (NEXT_INSN (insn)))) \
2304 == NOTE_INSN_LOOP_END)) \
2305 { \
2306 (cost) = 3; \
2307 } \
2308 }
2309
2310
2311#define ADJUST_BLOCKAGE(last_insn,insn,blockage) \
2312{ \
2313 if (is_fp_store (last_insn) && is_fp_insn (insn) \
2314 && NEXT_INSN (last_insn) && NEXT_INSN (NEXT_INSN (last_insn)) \
2315 && NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn))) \
2316 && (GET_CODE (NEXT_INSN (last_insn)) == INSN) \
2317 && (GET_CODE (NEXT_INSN (NEXT_INSN (last_insn))) == JUMP_INSN) \
2318 && (GET_CODE (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) == NOTE) \
2319 && (NOTE_LINE_NUMBER (NEXT_INSN (NEXT_INSN (NEXT_INSN (last_insn)))) \
2320 == NOTE_INSN_LOOP_END)) \
2321 { \
2322 (blockage) = 3; \
2323 } \
2324}
2325
|
1506
1507/* Add any extra modes needed to represent the condition code.
1508
1509 For the i386, we need separate modes when floating-point equality
1510 comparisons are being done. */
1511
1512#define EXTRA_CC_MODES CCFPEQmode
1513
1514/* Define the names for the modes specified above. */
1515#define EXTRA_CC_NAMES "CCFPEQ"
1516
1517/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1518 return the mode to be used for the comparison.
1519
1520 For floating-point equality comparisons, CCFPEQmode should be used.
1521 VOIDmode should be used in all other cases. */
1522
1523#define SELECT_CC_MODE(OP,X,Y) \
1524 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
1525 && ((OP) == EQ || (OP) == NE) ? CCFPEQmode : VOIDmode)
1526
1527/* Define the information needed to generate branch and scc insns. This is
1528 stored from the compare operation. Note that we can't use "rtx" here
1529 since it hasn't been defined! */
1530
1531extern struct rtx_def *(*i386_compare_gen)(), *(*i386_compare_gen_eq)();
1532
1533/* Tell final.c how to eliminate redundant test instructions. */
1534
1535/* Here we define machine-dependent flags and fields in cc_status
1536 (see `conditions.h'). */
1537
| 2326
2327/* Add any extra modes needed to represent the condition code.
2328
2329 For the i386, we need separate modes when floating-point equality
2330 comparisons are being done. */
2331
2332#define EXTRA_CC_MODES CCFPEQmode
2333
2334/* Define the names for the modes specified above. */
2335#define EXTRA_CC_NAMES "CCFPEQ"
2336
2337/* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
2338 return the mode to be used for the comparison.
2339
2340 For floating-point equality comparisons, CCFPEQmode should be used.
2341 VOIDmode should be used in all other cases. */
2342
2343#define SELECT_CC_MODE(OP,X,Y) \
2344 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
2345 && ((OP) == EQ || (OP) == NE) ? CCFPEQmode : VOIDmode)
2346
2347/* Define the information needed to generate branch and scc insns. This is
2348 stored from the compare operation. Note that we can't use "rtx" here
2349 since it hasn't been defined! */
2350
2351extern struct rtx_def *(*i386_compare_gen)(), *(*i386_compare_gen_eq)();
2352
2353/* Tell final.c how to eliminate redundant test instructions. */
2354
2355/* Here we define machine-dependent flags and fields in cc_status
2356 (see `conditions.h'). */
2357
|
| 2358/* Set if the cc value was actually from the 80387 and
2359 we are testing eax directly (i.e. no sahf) */
2360#define CC_TEST_AX 020000
2361
|
1538/* Set if the cc value is actually in the 80387, so a floating point
1539 conditional branch must be output. */
1540#define CC_IN_80387 04000
1541
1542/* Set if the CC value was stored in a nonstandard way, so that
1543 the state of equality is indicated by zero in the carry bit. */
1544#define CC_Z_IN_NOT_C 010000
1545
| 2362/* Set if the cc value is actually in the 80387, so a floating point
2363 conditional branch must be output. */
2364#define CC_IN_80387 04000
2365
2366/* Set if the CC value was stored in a nonstandard way, so that
2367 the state of equality is indicated by zero in the carry bit. */
2368#define CC_Z_IN_NOT_C 010000
2369
|
| 2370/* Set if the CC value was actually from the 80387 and loaded directly
2371 into the eflags instead of via eax/sahf. */
2372#define CC_FCOMI 040000
2373
|
1546/* Store in cc_status the expressions
1547 that the condition codes will describe
1548 after execution of an instruction whose pattern is EXP.
1549 Do not alter them if the instruction would not alter the cc's. */
1550
1551#define NOTICE_UPDATE_CC(EXP, INSN) \
1552 notice_update_cc((EXP))
1553
1554/* Output a signed jump insn. Use template NORMAL ordinarily, or
1555 FLOAT following a floating point comparison.
1556 Use NO_OV following an arithmetic insn that set the cc's
1557 before a test insn that was deleted.
1558 NO_OV may be zero, meaning final should reinsert the test insn
1559 because the jump cannot be handled properly without it. */
1560
1561#define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
1562{ \
1563 if (cc_prev_status.flags & CC_IN_80387) \
1564 return FLOAT; \
1565 if (cc_prev_status.flags & CC_NO_OVERFLOW) \
1566 return NO_OV; \
1567 return NORMAL; \
1568}
1569
1570/* Control the assembler format that we output, to the extent
1571 this does not vary between assemblers. */
1572
1573/* How to refer to registers in assembler output.
1574 This sequence is indexed by compiler's hard-register-number (see above). */
1575
1576/* In order to refer to the first 8 regs as 32 bit regs prefix an "e"
1577 For non floating point regs, the following are the HImode names.
1578
1579 For float regs, the stack top is sometimes referred to as "%st(0)"
1580 instead of just "%st". PRINT_REG handles this with the "y" code. */
1581
1582#define HI_REGISTER_NAMES \
1583{"ax","dx","cx","bx","si","di","bp","sp", \
1584 "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","" }
1585
1586#define REGISTER_NAMES HI_REGISTER_NAMES
1587
1588/* Table of additional register names to use in user input. */
1589
1590#define ADDITIONAL_REGISTER_NAMES \
| 2374/* Store in cc_status the expressions
2375 that the condition codes will describe
2376 after execution of an instruction whose pattern is EXP.
2377 Do not alter them if the instruction would not alter the cc's. */
2378
2379#define NOTICE_UPDATE_CC(EXP, INSN) \
2380 notice_update_cc((EXP))
2381
2382/* Output a signed jump insn. Use template NORMAL ordinarily, or
2383 FLOAT following a floating point comparison.
2384 Use NO_OV following an arithmetic insn that set the cc's
2385 before a test insn that was deleted.
2386 NO_OV may be zero, meaning final should reinsert the test insn
2387 because the jump cannot be handled properly without it. */
2388
2389#define OUTPUT_JUMP(NORMAL, FLOAT, NO_OV) \
2390{ \
2391 if (cc_prev_status.flags & CC_IN_80387) \
2392 return FLOAT; \
2393 if (cc_prev_status.flags & CC_NO_OVERFLOW) \
2394 return NO_OV; \
2395 return NORMAL; \
2396}
2397
2398/* Control the assembler format that we output, to the extent
2399 this does not vary between assemblers. */
2400
2401/* How to refer to registers in assembler output.
2402 This sequence is indexed by compiler's hard-register-number (see above). */
2403
2404/* In order to refer to the first 8 regs as 32 bit regs prefix an "e"
2405 For non floating point regs, the following are the HImode names.
2406
2407 For float regs, the stack top is sometimes referred to as "%st(0)"
2408 instead of just "%st". PRINT_REG handles this with the "y" code. */
2409
2410#define HI_REGISTER_NAMES \
2411{"ax","dx","cx","bx","si","di","bp","sp", \
2412 "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","" }
2413
2414#define REGISTER_NAMES HI_REGISTER_NAMES
2415
2416/* Table of additional register names to use in user input. */
2417
2418#define ADDITIONAL_REGISTER_NAMES \
|
1591{ "eax", 0, "edx", 1, "ecx", 2, "ebx", 3, \
1592 "esi", 4, "edi", 5, "ebp", 6, "esp", 7, \
1593 "al", 0, "dl", 1, "cl", 2, "bl", 3, \
1594 "ah", 0, "dh", 1, "ch", 2, "bh", 3 }
| 2419{ { "eax", 0 }, { "edx", 1 }, { "ecx", 2 }, { "ebx", 3 }, \
2420 { "esi", 4 }, { "edi", 5 }, { "ebp", 6 }, { "esp", 7 }, \
2421 { "al", 0 }, { "dl", 1 }, { "cl", 2 }, { "bl", 3 }, \
2422 { "ah", 0 }, { "dh", 1 }, { "ch", 2 }, { "bh", 3 } }
|
1595
1596/* Note we are omitting these since currently I don't know how
1597to get gcc to use these, since they want the same but different
1598number as al, and ax.
1599*/
1600
1601/* note the last four are not really qi_registers, but
1602 the md will have to never output movb into one of them
1603 only a movw . There is no movb into the last four regs */
1604
1605#define QI_REGISTER_NAMES \
1606{"al", "dl", "cl", "bl", "si", "di", "bp", "sp",}
1607
1608/* These parallel the array above, and can be used to access bits 8:15
1609 of regs 0 through 3. */
1610
1611#define QI_HIGH_REGISTER_NAMES \
1612{"ah", "dh", "ch", "bh", }
1613
1614/* How to renumber registers for dbx and gdb. */
1615
1616/* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */
1617#define DBX_REGISTER_NUMBER(n) \
1618((n) == 0 ? 0 : \
1619 (n) == 1 ? 2 : \
1620 (n) == 2 ? 1 : \
1621 (n) == 3 ? 3 : \
1622 (n) == 4 ? 6 : \
1623 (n) == 5 ? 7 : \
1624 (n) == 6 ? 4 : \
1625 (n) == 7 ? 5 : \
1626 (n) + 4)
1627
| 2423
2424/* Note we are omitting these since currently I don't know how
2425to get gcc to use these, since they want the same but different
2426number as al, and ax.
2427*/
2428
2429/* note the last four are not really qi_registers, but
2430 the md will have to never output movb into one of them
2431 only a movw . There is no movb into the last four regs */
2432
2433#define QI_REGISTER_NAMES \
2434{"al", "dl", "cl", "bl", "si", "di", "bp", "sp",}
2435
2436/* These parallel the array above, and can be used to access bits 8:15
2437 of regs 0 through 3. */
2438
2439#define QI_HIGH_REGISTER_NAMES \
2440{"ah", "dh", "ch", "bh", }
2441
2442/* How to renumber registers for dbx and gdb. */
2443
2444/* {0,2,1,3,6,7,4,5,12,13,14,15,16,17} */
2445#define DBX_REGISTER_NUMBER(n) \
2446((n) == 0 ? 0 : \
2447 (n) == 1 ? 2 : \
2448 (n) == 2 ? 1 : \
2449 (n) == 3 ? 3 : \
2450 (n) == 4 ? 6 : \
2451 (n) == 5 ? 7 : \
2452 (n) == 6 ? 4 : \
2453 (n) == 7 ? 5 : \
2454 (n) + 4)
2455
|
| 2456/* Before the prologue, RA is at 0(%esp). */
2457#define INCOMING_RETURN_ADDR_RTX \
2458 gen_rtx_MEM (VOIDmode, gen_rtx_REG (VOIDmode, STACK_POINTER_REGNUM))
2459
2460/* After the prologue, RA is at -4(AP) in the current frame. */
2461#define RETURN_ADDR_RTX(COUNT, FRAME) \
2462 ((COUNT) == 0 \
2463 ? gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, arg_pointer_rtx, GEN_INT(-4)))\
2464 : gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, (FRAME), GEN_INT(4))))
2465
2466/* PC is dbx register 8; let's use that column for RA. */
2467#define DWARF_FRAME_RETURN_COLUMN 8
2468
2469/* Before the prologue, the top of the frame is at 4(%esp). */
2470#define INCOMING_FRAME_SP_OFFSET 4
2471
|
1628/* This is how to output the definition of a user-level label named NAME,
1629 such as the label on a static function or variable NAME. */
1630
1631#define ASM_OUTPUT_LABEL(FILE,NAME) \
1632 (assemble_name (FILE, NAME), fputs (":\n", FILE))
1633
1634/* This is how to output an assembler line defining a `double' constant. */
1635
1636#define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1637do { long l[2]; \
1638 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
| 2472/* This is how to output the definition of a user-level label named NAME,
2473 such as the label on a static function or variable NAME. */
2474
2475#define ASM_OUTPUT_LABEL(FILE,NAME) \
2476 (assemble_name (FILE, NAME), fputs (":\n", FILE))
2477
2478/* This is how to output an assembler line defining a `double' constant. */
2479
2480#define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
2481do { long l[2]; \
2482 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
|
1639 if (sizeof (int) == sizeof (long)) \
1640 fprintf (FILE, "%s 0x%x,0x%x\n", ASM_LONG, (int) l[0], (int) l[1]); \
1641 else \
1642 fprintf (FILE, "%s 0x%lx,0x%lx\n", ASM_LONG, l[0], l[1]); \
| 2483 fprintf (FILE, "%s 0x%lx,0x%lx\n", ASM_LONG, l[0], l[1]); \
|
1643 } while (0)
1644
1645/* This is how to output a `long double' extended real constant. */
1646
1647#undef ASM_OUTPUT_LONG_DOUBLE
1648#define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \
1649do { long l[3]; \
1650 REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \
| 2484 } while (0)
2485
2486/* This is how to output a `long double' extended real constant. */
2487
2488#undef ASM_OUTPUT_LONG_DOUBLE
2489#define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \
2490do { long l[3]; \
2491 REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \
|
1651 if (sizeof (int) == sizeof (long)) \
1652 fprintf (FILE, "%s 0x%x,0x%x,0x%x\n", ASM_LONG, \
1653 (int) l[0], (int) l[1], (int) l[2]); \
1654 else \
1655 fprintf (FILE, "%s 0x%lx,0x%lx,0x%lx\n", ASM_LONG, l[0], l[1], l[2]); \
| 2492 fprintf (FILE, "%s 0x%lx,0x%lx,0x%lx\n", ASM_LONG, l[0], l[1], l[2]); \
|
1656 } while (0)
1657
1658/* This is how to output an assembler line defining a `float' constant. */
1659
1660#define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1661do { long l; \
1662 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
| 2493 } while (0)
2494
2495/* This is how to output an assembler line defining a `float' constant. */
2496
2497#define ASM_OUTPUT_FLOAT(FILE,VALUE) \
2498do { long l; \
2499 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
|
1663 if (sizeof (int) == sizeof (long)) \
1664 fprintf ((FILE), "%s 0x%x\n", ASM_LONG, (int) l); \
1665 else \
1666 fprintf ((FILE), "%s 0x%lx\n", ASM_LONG, l); \
| 2500 fprintf ((FILE), "%s 0x%lx\n", ASM_LONG, l); \
|
1667 } while (0)
1668
1669/* Store in OUTPUT a string (made with alloca) containing
1670 an assembler-name for a local static variable named NAME.
1671 LABELNO is an integer which is different for each call. */
1672
1673#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1674( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1675 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1676
1677
1678
1679/* This is how to output an assembler line defining an `int' constant. */
1680
1681#define ASM_OUTPUT_INT(FILE,VALUE) \
1682( fprintf (FILE, "%s ", ASM_LONG), \
1683 output_addr_const (FILE,(VALUE)), \
1684 putc('\n',FILE))
1685
1686/* Likewise for `char' and `short' constants. */
1687/* is this supposed to do align too?? */
1688
1689#define ASM_OUTPUT_SHORT(FILE,VALUE) \
1690( fprintf (FILE, "%s ", ASM_SHORT), \
1691 output_addr_const (FILE,(VALUE)), \
1692 putc('\n',FILE))
1693
1694/*
1695#define ASM_OUTPUT_SHORT(FILE,VALUE) \
1696( fprintf (FILE, "%s ", ASM_BYTE_OP), \
1697 output_addr_const (FILE,(VALUE)), \
1698 fputs (",", FILE), \
1699 output_addr_const (FILE,(VALUE)), \
1700 fputs (" >> 8\n",FILE))
1701*/
1702
1703
1704#define ASM_OUTPUT_CHAR(FILE,VALUE) \
1705( fprintf (FILE, "%s ", ASM_BYTE_OP), \
1706 output_addr_const (FILE, (VALUE)), \
1707 putc ('\n', FILE))
1708
1709/* This is how to output an assembler line for a numeric constant byte. */
1710
1711#define ASM_OUTPUT_BYTE(FILE,VALUE) \
1712 fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE))
1713
1714/* This is how to output an insn to push a register on the stack.
1715 It need not be very fast code. */
1716
1717#define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
| 2501 } while (0)
2502
2503/* Store in OUTPUT a string (made with alloca) containing
2504 an assembler-name for a local static variable named NAME.
2505 LABELNO is an integer which is different for each call. */
2506
2507#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
2508( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
2509 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
2510
2511
2512
2513/* This is how to output an assembler line defining an `int' constant. */
2514
2515#define ASM_OUTPUT_INT(FILE,VALUE) \
2516( fprintf (FILE, "%s ", ASM_LONG), \
2517 output_addr_const (FILE,(VALUE)), \
2518 putc('\n',FILE))
2519
2520/* Likewise for `char' and `short' constants. */
2521/* is this supposed to do align too?? */
2522
2523#define ASM_OUTPUT_SHORT(FILE,VALUE) \
2524( fprintf (FILE, "%s ", ASM_SHORT), \
2525 output_addr_const (FILE,(VALUE)), \
2526 putc('\n',FILE))
2527
2528/*
2529#define ASM_OUTPUT_SHORT(FILE,VALUE) \
2530( fprintf (FILE, "%s ", ASM_BYTE_OP), \
2531 output_addr_const (FILE,(VALUE)), \
2532 fputs (",", FILE), \
2533 output_addr_const (FILE,(VALUE)), \
2534 fputs (" >> 8\n",FILE))
2535*/
2536
2537
2538#define ASM_OUTPUT_CHAR(FILE,VALUE) \
2539( fprintf (FILE, "%s ", ASM_BYTE_OP), \
2540 output_addr_const (FILE, (VALUE)), \
2541 putc ('\n', FILE))
2542
2543/* This is how to output an assembler line for a numeric constant byte. */
2544
2545#define ASM_OUTPUT_BYTE(FILE,VALUE) \
2546 fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE))
2547
2548/* This is how to output an insn to push a register on the stack.
2549 It need not be very fast code. */
2550
2551#define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
|
1718 fprintf (FILE, "\tpushl e%s\n", reg_names[REGNO])
| 2552 fprintf (FILE, "\tpushl %%e%s\n", reg_names[REGNO])
|
1719
1720/* This is how to output an insn to pop a register from the stack.
1721 It need not be very fast code. */
1722
1723#define ASM_OUTPUT_REG_POP(FILE,REGNO) \
| 2553
2554/* This is how to output an insn to pop a register from the stack.
2555 It need not be very fast code. */
2556
2557#define ASM_OUTPUT_REG_POP(FILE,REGNO) \
|
1724 fprintf (FILE, "\tpopl e%s\n", reg_names[REGNO])
| 2558 fprintf (FILE, "\tpopl %%e%s\n", reg_names[REGNO])
|
1725
1726/* This is how to output an element of a case-vector that is absolute.
1727 */
1728
1729#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1730 fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE)
1731
1732/* This is how to output an element of a case-vector that is relative.
1733 We don't use these on the 386 yet, because the ATT assembler can't do
1734 forward reference the differences.
1735 */
1736
| 2559
2560/* This is how to output an element of a case-vector that is absolute.
2561 */
2562
2563#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
2564 fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE)
2565
2566/* This is how to output an element of a case-vector that is relative.
2567 We don't use these on the 386 yet, because the ATT assembler can't do
2568 forward reference the differences.
2569 */
2570
|
1737#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
| 2571#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
|
1738 fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL)
1739
1740/* Define the parentheses used to group arithmetic operations
1741 in assembler code. */
1742
1743#define ASM_OPEN_PAREN ""
1744#define ASM_CLOSE_PAREN ""
1745
1746/* Define results of standard character escape sequences. */
1747#define TARGET_BELL 007
1748#define TARGET_BS 010
1749#define TARGET_TAB 011
1750#define TARGET_NEWLINE 012
1751#define TARGET_VT 013
1752#define TARGET_FF 014
1753#define TARGET_CR 015
1754
1755/* Print operand X (an rtx) in assembler syntax to file FILE.
1756 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1757 The CODE z takes the size of operand from the following digit, and
1758 outputs b,w,or l respectively.
1759
1760 On the 80386, we use several such letters:
1761 f -- float insn (print a CONST_DOUBLE as a float rather than in hex).
1762 L,W,B,Q,S,T -- print the opcode suffix for specified size of operand.
1763 R -- print the prefix for register names.
1764 z -- print the opcode suffix for the size of the current operand.
1765 * -- print a star (in certain assembler syntax)
| 2572 fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL)
2573
2574/* Define the parentheses used to group arithmetic operations
2575 in assembler code. */
2576
2577#define ASM_OPEN_PAREN ""
2578#define ASM_CLOSE_PAREN ""
2579
2580/* Define results of standard character escape sequences. */
2581#define TARGET_BELL 007
2582#define TARGET_BS 010
2583#define TARGET_TAB 011
2584#define TARGET_NEWLINE 012
2585#define TARGET_VT 013
2586#define TARGET_FF 014
2587#define TARGET_CR 015
2588
2589/* Print operand X (an rtx) in assembler syntax to file FILE.
2590 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
2591 The CODE z takes the size of operand from the following digit, and
2592 outputs b,w,or l respectively.
2593
2594 On the 80386, we use several such letters:
2595 f -- float insn (print a CONST_DOUBLE as a float rather than in hex).
2596 L,W,B,Q,S,T -- print the opcode suffix for specified size of operand.
2597 R -- print the prefix for register names.
2598 z -- print the opcode suffix for the size of the current operand.
2599 * -- print a star (in certain assembler syntax)
|
1766 w -- print the operand as if it's a "word" (HImode) even if it isn't.
1767 b -- print the operand as if it's a byte (QImode) even if it isn't.
1768 c -- don't print special prefixes before constant operands. */
| 2600 P -- if PIC, print an @PLT suffix.
2601 X -- don't print any sort of PIC '@' suffix for a symbol.
2602 J -- print jump insn for arithmetic_comparison_operator.
2603 s -- ??? something to do with double shifts. not actually used, afaik.
2604 C -- print a conditional move suffix corresponding to the op code.
2605 c -- likewise, but reverse the condition.
2606 F,f -- likewise, but for floating-point. */
|
1769
1770#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1771 ((CODE) == '*')
1772
1773/* Print the name of a register based on its machine mode and number.
1774 If CODE is 'w', pretend the mode is HImode.
1775 If CODE is 'b', pretend the mode is QImode.
1776 If CODE is 'k', pretend the mode is SImode.
1777 If CODE is 'h', pretend the reg is the `high' byte register.
1778 If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. */
1779
1780extern char *hi_reg_name[];
1781extern char *qi_reg_name[];
1782extern char *qi_high_reg_name[];
1783
1784#define PRINT_REG(X, CODE, FILE) \
1785 do { if (REGNO (X) == ARG_POINTER_REGNUM) \
1786 abort (); \
1787 fprintf (FILE, "%s", RP); \
1788 switch ((CODE == 'w' ? 2 \
1789 : CODE == 'b' ? 1 \
1790 : CODE == 'k' ? 4 \
1791 : CODE == 'y' ? 3 \
1792 : CODE == 'h' ? 0 \
1793 : GET_MODE_SIZE (GET_MODE (X)))) \
1794 { \
1795 case 3: \
1796 if (STACK_TOP_P (X)) \
1797 { \
1798 fputs ("st(0)", FILE); \
1799 break; \
1800 } \
1801 case 4: \
1802 case 8: \
1803 case 12: \
1804 if (! FP_REG_P (X)) fputs ("e", FILE); \
1805 case 2: \
1806 fputs (hi_reg_name[REGNO (X)], FILE); \
1807 break; \
1808 case 1: \
1809 fputs (qi_reg_name[REGNO (X)], FILE); \
1810 break; \
1811 case 0: \
1812 fputs (qi_high_reg_name[REGNO (X)], FILE); \
1813 break; \
1814 } \
1815 } while (0)
1816
1817#define PRINT_OPERAND(FILE, X, CODE) \
1818 print_operand (FILE, X, CODE)
1819
1820#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1821 print_operand_address (FILE, ADDR)
1822
1823/* Print the name of a register for based on its machine mode and number.
1824 This macro is used to print debugging output.
1825 This macro is different from PRINT_REG in that it may be used in
1826 programs that are not linked with aux-output.o. */
1827
1828#define DEBUG_PRINT_REG(X, CODE, FILE) \
1829 do { static char *hi_name[] = HI_REGISTER_NAMES; \
1830 static char *qi_name[] = QI_REGISTER_NAMES; \
1831 fprintf (FILE, "%d %s", REGNO (X), RP); \
1832 if (REGNO (X) == ARG_POINTER_REGNUM) \
1833 { fputs ("argp", FILE); break; } \
1834 if (STACK_TOP_P (X)) \
1835 { fputs ("st(0)", FILE); break; } \
1836 if (FP_REG_P (X)) \
1837 { fputs (hi_name[REGNO(X)], FILE); break; } \
1838 switch (GET_MODE_SIZE (GET_MODE (X))) \
1839 { \
1840 default: \
1841 fputs ("e", FILE); \
1842 case 2: \
1843 fputs (hi_name[REGNO (X)], FILE); \
1844 break; \
1845 case 1: \
1846 fputs (qi_name[REGNO (X)], FILE); \
1847 break; \
1848 } \
1849 } while (0)
1850
1851/* Output the prefix for an immediate operand, or for an offset operand. */
1852#define PRINT_IMMED_PREFIX(FILE) fputs (IP, (FILE))
1853#define PRINT_OFFSET_PREFIX(FILE) fputs (IP, (FILE))
1854
1855/* Routines in libgcc that return floats must return them in an fp reg,
1856 just as other functions do which return such values.
1857 These macros make that happen. */
1858
1859#define FLOAT_VALUE_TYPE float
1860#define INTIFY(FLOATVAL) FLOATVAL
1861
1862/* Nonzero if INSN magically clobbers register REGNO. */
1863
1864/* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) \
1865 (FP_REGNO_P (REGNO) \
1866 && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER))
1867*/
1868
1869/* a letter which is not needed by the normal asm syntax, which
1870 we can use for operand syntax in the extended asm */
1871
1872#define ASM_OPERAND_LETTER '#'
| 2607
2608#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
2609 ((CODE) == '*')
2610
2611/* Print the name of a register based on its machine mode and number.
2612 If CODE is 'w', pretend the mode is HImode.
2613 If CODE is 'b', pretend the mode is QImode.
2614 If CODE is 'k', pretend the mode is SImode.
2615 If CODE is 'h', pretend the reg is the `high' byte register.
2616 If CODE is 'y', print "st(0)" instead of "st", if the reg is stack op. */
2617
2618extern char *hi_reg_name[];
2619extern char *qi_reg_name[];
2620extern char *qi_high_reg_name[];
2621
2622#define PRINT_REG(X, CODE, FILE) \
2623 do { if (REGNO (X) == ARG_POINTER_REGNUM) \
2624 abort (); \
2625 fprintf (FILE, "%s", RP); \
2626 switch ((CODE == 'w' ? 2 \
2627 : CODE == 'b' ? 1 \
2628 : CODE == 'k' ? 4 \
2629 : CODE == 'y' ? 3 \
2630 : CODE == 'h' ? 0 \
2631 : GET_MODE_SIZE (GET_MODE (X)))) \
2632 { \
2633 case 3: \
2634 if (STACK_TOP_P (X)) \
2635 { \
2636 fputs ("st(0)", FILE); \
2637 break; \
2638 } \
2639 case 4: \
2640 case 8: \
2641 case 12: \
2642 if (! FP_REG_P (X)) fputs ("e", FILE); \
2643 case 2: \
2644 fputs (hi_reg_name[REGNO (X)], FILE); \
2645 break; \
2646 case 1: \
2647 fputs (qi_reg_name[REGNO (X)], FILE); \
2648 break; \
2649 case 0: \
2650 fputs (qi_high_reg_name[REGNO (X)], FILE); \
2651 break; \
2652 } \
2653 } while (0)
2654
2655#define PRINT_OPERAND(FILE, X, CODE) \
2656 print_operand (FILE, X, CODE)
2657
2658#define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
2659 print_operand_address (FILE, ADDR)
2660
2661/* Print the name of a register for based on its machine mode and number.
2662 This macro is used to print debugging output.
2663 This macro is different from PRINT_REG in that it may be used in
2664 programs that are not linked with aux-output.o. */
2665
2666#define DEBUG_PRINT_REG(X, CODE, FILE) \
2667 do { static char *hi_name[] = HI_REGISTER_NAMES; \
2668 static char *qi_name[] = QI_REGISTER_NAMES; \
2669 fprintf (FILE, "%d %s", REGNO (X), RP); \
2670 if (REGNO (X) == ARG_POINTER_REGNUM) \
2671 { fputs ("argp", FILE); break; } \
2672 if (STACK_TOP_P (X)) \
2673 { fputs ("st(0)", FILE); break; } \
2674 if (FP_REG_P (X)) \
2675 { fputs (hi_name[REGNO(X)], FILE); break; } \
2676 switch (GET_MODE_SIZE (GET_MODE (X))) \
2677 { \
2678 default: \
2679 fputs ("e", FILE); \
2680 case 2: \
2681 fputs (hi_name[REGNO (X)], FILE); \
2682 break; \
2683 case 1: \
2684 fputs (qi_name[REGNO (X)], FILE); \
2685 break; \
2686 } \
2687 } while (0)
2688
2689/* Output the prefix for an immediate operand, or for an offset operand. */
2690#define PRINT_IMMED_PREFIX(FILE) fputs (IP, (FILE))
2691#define PRINT_OFFSET_PREFIX(FILE) fputs (IP, (FILE))
2692
2693/* Routines in libgcc that return floats must return them in an fp reg,
2694 just as other functions do which return such values.
2695 These macros make that happen. */
2696
2697#define FLOAT_VALUE_TYPE float
2698#define INTIFY(FLOATVAL) FLOATVAL
2699
2700/* Nonzero if INSN magically clobbers register REGNO. */
2701
2702/* #define INSN_CLOBBERS_REGNO_P(INSN, REGNO) \
2703 (FP_REGNO_P (REGNO) \
2704 && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER))
2705*/
2706
2707/* a letter which is not needed by the normal asm syntax, which
2708 we can use for operand syntax in the extended asm */
2709
2710#define ASM_OPERAND_LETTER '#'
|
1873
| |
1874#define RET return ""
| 2711#define RET return ""
|
1875#define AT_SP(mode) (gen_rtx (MEM, (mode), stack_pointer_rtx))
| 2712#define AT_SP(mode) (gen_rtx_MEM ((mode), stack_pointer_rtx))
|
1876
| 2713
|
| 2714/* Helper macros to expand a binary/unary operator if needed */
2715#define IX86_EXPAND_BINARY_OPERATOR(OP, MODE, OPERANDS) \
2716do { \
2717 if (!ix86_expand_binary_operator (OP, MODE, OPERANDS)) \
2718 FAIL; \
2719} while (0)
2720
2721#define IX86_EXPAND_UNARY_OPERATOR(OP, MODE, OPERANDS) \
2722do { \
2723 if (!ix86_expand_unary_operator (OP, MODE, OPERANDS,)) \
2724 FAIL; \
2725} while (0)
2726
2727
|
1877/* Functions in i386.c */
1878extern void override_options ();
1879extern void order_regs_for_local_alloc ();
| 2728/* Functions in i386.c */
2729extern void override_options ();
2730extern void order_regs_for_local_alloc ();
|
| 2731extern char *output_strlen_unroll ();
2732extern struct rtx_def *i386_sext16_if_const ();
2733extern int i386_aligned_p ();
2734extern int i386_cc_probably_useless_p ();
|
1880extern int i386_valid_decl_attribute_p ();
1881extern int i386_valid_type_attribute_p ();
1882extern int i386_return_pops_args ();
1883extern int i386_comp_type_attributes ();
1884extern void init_cumulative_args ();
1885extern void function_arg_advance ();
1886extern struct rtx_def *function_arg ();
1887extern int function_arg_partial_nregs ();
| 2735extern int i386_valid_decl_attribute_p ();
2736extern int i386_valid_type_attribute_p ();
2737extern int i386_return_pops_args ();
2738extern int i386_comp_type_attributes ();
2739extern void init_cumulative_args ();
2740extern void function_arg_advance ();
2741extern struct rtx_def *function_arg ();
2742extern int function_arg_partial_nregs ();
|
| 2743extern char *output_strlen_unroll ();
|
1888extern void output_op_from_reg ();
1889extern void output_to_reg ();
1890extern char *singlemove_string ();
1891extern char *output_move_double ();
1892extern char *output_move_memory ();
1893extern char *output_move_pushmem ();
1894extern int standard_80387_constant_p ();
1895extern char *output_move_const_single ();
1896extern int symbolic_operand ();
1897extern int call_insn_operand ();
1898extern int expander_call_insn_operand ();
1899extern int symbolic_reference_mentioned_p ();
| 2744extern void output_op_from_reg ();
2745extern void output_to_reg ();
2746extern char *singlemove_string ();
2747extern char *output_move_double ();
2748extern char *output_move_memory ();
2749extern char *output_move_pushmem ();
2750extern int standard_80387_constant_p ();
2751extern char *output_move_const_single ();
2752extern int symbolic_operand ();
2753extern int call_insn_operand ();
2754extern int expander_call_insn_operand ();
2755extern int symbolic_reference_mentioned_p ();
|
| 2756extern int ix86_expand_binary_operator ();
2757extern int ix86_binary_operator_ok ();
2758extern int ix86_expand_unary_operator ();
2759extern int ix86_unary_operator_ok ();
|
1900extern void emit_pic_move ();
1901extern void function_prologue ();
1902extern int simple_386_epilogue ();
1903extern void function_epilogue ();
1904extern int legitimate_address_p ();
1905extern struct rtx_def *legitimize_pic_address ();
1906extern struct rtx_def *legitimize_address ();
1907extern void print_operand ();
1908extern void print_operand_address ();
1909extern void notice_update_cc ();
1910extern void split_di ();
1911extern int binary_387_op ();
1912extern int shift_op ();
1913extern int VOIDmode_compare_op ();
1914extern char *output_387_binary_op ();
1915extern char *output_fix_trunc ();
1916extern char *output_float_compare ();
1917extern char *output_fp_cc0_set ();
1918extern void save_386_machine_status ();
1919extern void restore_386_machine_status ();
1920extern void clear_386_stack_locals ();
1921extern struct rtx_def *assign_386_stack_local ();
| 2760extern void emit_pic_move ();
2761extern void function_prologue ();
2762extern int simple_386_epilogue ();
2763extern void function_epilogue ();
2764extern int legitimate_address_p ();
2765extern struct rtx_def *legitimize_pic_address ();
2766extern struct rtx_def *legitimize_address ();
2767extern void print_operand ();
2768extern void print_operand_address ();
2769extern void notice_update_cc ();
2770extern void split_di ();
2771extern int binary_387_op ();
2772extern int shift_op ();
2773extern int VOIDmode_compare_op ();
2774extern char *output_387_binary_op ();
2775extern char *output_fix_trunc ();
2776extern char *output_float_compare ();
2777extern char *output_fp_cc0_set ();
2778extern void save_386_machine_status ();
2779extern void restore_386_machine_status ();
2780extern void clear_386_stack_locals ();
2781extern struct rtx_def *assign_386_stack_local ();
|
| 2782extern int is_mul ();
2783extern int is_div ();
2784extern int last_to_set_cc ();
2785extern int doesnt_set_condition_code ();
2786extern int sets_condition_code ();
2787extern int str_immediate_operand ();
2788extern int is_fp_insn ();
2789extern int is_fp_dest ();
2790extern int is_fp_store ();
2791extern int agi_dependent ();
2792extern int reg_mentioned_in_mem ();
2793extern char *output_int_conditional_move ();
2794extern char *output_fp_conditional_move ();
2795extern int ix86_can_use_return_insn_p ();
|
1922
| 2796
|
| 2797#ifdef NOTYET
2798extern struct rtx_def *copy_all_rtx ();
2799extern void rewrite_address ();
2800#endif
2801
|
1923/* Variables in i386.c */
| 2802/* Variables in i386.c */
|
| 2803extern char *ix86_cpu_string; /* for -mcpu=<xxx> */
2804extern char *ix86_arch_string; /* for -march=<xxx> */
|
1924extern char *i386_reg_alloc_order; /* register allocation order */
1925extern char *i386_regparm_string; /* # registers to use to pass args */
1926extern char *i386_align_loops_string; /* power of two alignment for loops */
1927extern char *i386_align_jumps_string; /* power of two alignment for non-loop jumps */
1928extern char *i386_align_funcs_string; /* power of two alignment for functions */
| 2805extern char *i386_reg_alloc_order; /* register allocation order */
2806extern char *i386_regparm_string; /* # registers to use to pass args */
2807extern char *i386_align_loops_string; /* power of two alignment for loops */
2808extern char *i386_align_jumps_string; /* power of two alignment for non-loop jumps */
2809extern char *i386_align_funcs_string; /* power of two alignment for functions */
|
| 2810extern char *i386_branch_cost_string; /* values 1-5: see jump.c */
|
1929extern int i386_regparm; /* i386_regparm_string as a number */
1930extern int i386_align_loops; /* power of two alignment for loops */
1931extern int i386_align_jumps; /* power of two alignment for non-loop jumps */
1932extern int i386_align_funcs; /* power of two alignment for functions */
| 2811extern int i386_regparm; /* i386_regparm_string as a number */
2812extern int i386_align_loops; /* power of two alignment for loops */
2813extern int i386_align_jumps; /* power of two alignment for non-loop jumps */
2814extern int i386_align_funcs; /* power of two alignment for functions */
|
| 2815extern int i386_branch_cost; /* values 1-5: see jump.c */
|
1933extern char *hi_reg_name[]; /* names for 16 bit regs */
1934extern char *qi_reg_name[]; /* names for 8 bit regs (low) */
1935extern char *qi_high_reg_name[]; /* names for 8 bit regs (high) */
1936extern enum reg_class regclass_map[]; /* smalled class containing REGNO */
1937extern struct rtx_def *i386_compare_op0; /* operand 0 for comparisons */
1938extern struct rtx_def *i386_compare_op1; /* operand 1 for comparisons */
1939
1940/* External variables used */
| 2816extern char *hi_reg_name[]; /* names for 16 bit regs */
2817extern char *qi_reg_name[]; /* names for 8 bit regs (low) */
2818extern char *qi_high_reg_name[]; /* names for 8 bit regs (high) */
2819extern enum reg_class regclass_map[]; /* smalled class containing REGNO */
2820extern struct rtx_def *i386_compare_op0; /* operand 0 for comparisons */
2821extern struct rtx_def *i386_compare_op1; /* operand 1 for comparisons */
2822
2823/* External variables used */
|
1941extern int optimize; /* optimization level */
1942extern int obey_regdecls; /* TRUE if stupid register allocation */
| 2824extern int optimize; /* optimization level */
2825extern int obey_regdecls; /* TRUE if stupid register allocation */
|
1943
1944/* External functions used */
1945extern struct rtx_def *force_operand ();
| 2826
2827/* External functions used */
2828extern struct rtx_def *force_operand ();
|
| 2829
|
1946
1947/*
1948Local variables:
1949version-control: t
1950End:
1951*/
| 2830
2831/*
2832Local variables:
2833version-control: t
2834End:
2835*/
|