1/* Definitions of target machine for GNU compiler for Intel X86
2 (386, 486, Pentium).
3 Copyright (C) 1988, 1992, 1994, 1995 Free Software Foundation, Inc.
4
5This file is part of GNU CC.
6
7GNU CC is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2, or (at your option)
10any later version.
11
12GNU CC is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with GNU CC; see the file COPYING. If not, write to
19the Free Software Foundation, 59 Temple Place - Suite 330,
20Boston, MA 02111-1307, USA. */
21
22
23/* The purpose of this file is to define the characteristics of the i386,
24 independent of assembler syntax or operating system.
25
26 Three other files build on this one to describe a specific assembler syntax:
27 bsd386.h, att386.h, and sun386.h.
28
29 The actual tm.h file for a particular system should include
30 this file, and then the file for the appropriate assembler syntax.
--- 17 unchanged lines hidden (view full) ---
48#define HALF_PIC_ENCODE(DECL)
49#define HALF_PIC_DECLARE(NAME)
50#define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
51#define HALF_PIC_ADDRESS_P(X) 0
52#define HALF_PIC_PTR(X) X
53#define HALF_PIC_FINISH(STREAM)
54#endif
55
56/* Run-time compilation parameters selecting different hardware subsets. */
57
58extern int target_flags;
59
60/* Macros used in the machine description to test the flags. */
61
62/* configure can arrange to make this 2, to force a 486. */
63#ifndef TARGET_CPU_DEFAULT
64#define TARGET_CPU_DEFAULT 0
65#endif
66
67/* Masks for the -m switches */
68#define MASK_80387 000000000001 /* Hardware floating point */
69#define MASK_486 000000000002 /* 80486 specific */
70#define MASK_NOTUSED1 000000000004 /* bit not currently used */
71#define MASK_RTD 000000000010 /* Use ret that pops args */
72#define MASK_ALIGN_DOUBLE 000000000020 /* align doubles to 2 word boundary */
73#define MASK_SVR3_SHLIB 000000000040 /* Uninit locals into bss */
74#define MASK_IEEE_FP 000000000100 /* IEEE fp comparisons */
75#define MASK_FLOAT_RETURNS 000000000200 /* Return float in st(0) */
76#define MASK_NO_FANCY_MATH_387 000000000400 /* Disable sin, cos, sqrt */
77
78 /* Temporary codegen switches */
79#define MASK_DEBUG_ADDR 000001000000 /* Debug GO_IF_LEGITIMATE_ADDRESS */
80#define MASK_NO_WIDE_MULTIPLY 000002000000 /* Disable 32x32->64 multiplies */
81#define MASK_NO_MOVE 000004000000 /* Don't generate mem->mem */
82#define MASK_DEBUG_ARG 000010000000 /* Debug function_arg */
83
84/* Use the floating point instructions */
85#define TARGET_80387 (target_flags & MASK_80387)
86
87/* Compile using ret insn that pops args.
88 This will not work unless you use prototypes at least
89 for all functions that can take varying numbers of args. */
90#define TARGET_RTD (target_flags & MASK_RTD)
--- 16 unchanged lines hidden (view full) ---
107 in the 387 FPU or in 386 integer registers. If set, this flag causes
108 the 387 to be used, which is compatible with most calling conventions. */
109#define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & MASK_FLOAT_RETURNS)
110
111/* Disable generation of FP sin, cos and sqrt operations for 387.
112 This is because FreeBSD lacks these in the math-emulator-code */
113#define TARGET_NO_FANCY_MATH_387 (target_flags & MASK_NO_FANCY_MATH_387)
114
115/* Temporary switches for tuning code generation */
116
117/* Disable 32x32->64 bit multiplies that are used for long long multiplies
118 and division by constants, but sometimes cause reload problems. */
119#define TARGET_NO_WIDE_MULTIPLY (target_flags & MASK_NO_WIDE_MULTIPLY)
120#define TARGET_WIDE_MULTIPLY (!TARGET_NO_WIDE_MULTIPLY)
121
122/* Debug GO_IF_LEGITIMATE_ADDRESS */
123#define TARGET_DEBUG_ADDR (target_flags & MASK_DEBUG_ADDR)
124
125/* Debug FUNCTION_ARG macros */
126#define TARGET_DEBUG_ARG (target_flags & MASK_DEBUG_ARG)
127
128/* Hack macros for tuning code generation */
129#define TARGET_MOVE ((target_flags & MASK_NO_MOVE) == 0) /* Don't generate memory->memory */
130
131/* Specific hardware switches */
132#define TARGET_486 (target_flags & MASK_486) /* 80486DX, 80486SX, 80486DX[24] */
133#define TARGET_386 (!TARGET_486) /* 80386 */
134
135#define TARGET_SWITCHES \
136{ { "80387", MASK_80387 }, \
137 { "no-80387", -MASK_80387 }, \
138 { "hard-float", MASK_80387 }, \
139 { "soft-float", -MASK_80387 }, \
140 { "no-soft-float", MASK_80387 }, \
141 { "386", -MASK_486 }, \
142 { "no-386", MASK_486 }, \
143 { "486", MASK_486 }, \
144 { "no-486", -MASK_486 }, \
145 { "rtd", MASK_RTD }, \
146 { "no-rtd", -MASK_RTD }, \
147 { "align-double", MASK_ALIGN_DOUBLE }, \
148 { "no-align-double", -MASK_ALIGN_DOUBLE }, \
149 { "svr3-shlib", MASK_SVR3_SHLIB }, \
150 { "no-svr3-shlib", -MASK_SVR3_SHLIB }, \
151 { "ieee-fp", MASK_IEEE_FP }, \
152 { "no-ieee-fp", -MASK_IEEE_FP }, \
153 { "fp-ret-in-387", MASK_FLOAT_RETURNS }, \
154 { "no-fp-ret-in-387", -MASK_FLOAT_RETURNS }, \
155 { "no-fancy-math-387", MASK_NO_FANCY_MATH_387 }, \
156 { "fancy-math-387", -MASK_NO_FANCY_MATH_387 }, \
157 { "no-wide-multiply", MASK_NO_WIDE_MULTIPLY }, \
158 { "wide-multiply", -MASK_NO_WIDE_MULTIPLY }, \
159 { "debug-addr", MASK_DEBUG_ADDR }, \
160 { "no-debug-addr", -MASK_DEBUG_ADDR }, \
161 { "move", -MASK_NO_MOVE }, \
162 { "no-move", MASK_NO_MOVE }, \
163 { "debug-arg", MASK_DEBUG_ARG }, \
164 { "no-debug-arg", -MASK_DEBUG_ARG }, \
165 SUBTARGET_SWITCHES \
166 { "", TARGET_DEFAULT | TARGET_CPU_DEFAULT}}
167
168/* This macro is similar to `TARGET_SWITCHES' but defines names of
169 command options that have values. Its definition is an
170 initializer with a subgrouping for each command option.
171
172 Each subgrouping contains a string constant, that defines the
173 fixed part of the option name, and the address of a variable. The
174 variable, type `char *', is set to the variable part of the given
175 option if the fixed part matches. The actual option name is made
176 by appending `-m' to the specified name. */
177#define TARGET_OPTIONS \
178{ { "reg-alloc=", &i386_reg_alloc_order }, \
179 { "regparm=", &i386_regparm_string }, \
180 { "align-loops=", &i386_align_loops_string }, \
181 { "align-jumps=", &i386_align_jumps_string }, \
182 { "align-functions=", &i386_align_funcs_string }, \
183 SUBTARGET_OPTIONS \
184}
185
186/* Sometimes certain combinations of command options do not make
187 sense on a particular target machine. You can define a macro
188 `OVERRIDE_OPTIONS' to take account of this. This macro, if
189 defined, is executed once just after all the command options have
190 been parsed.
191
192 Don't use this macro to turn on various extra optimizations for
193 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
194
195#define OVERRIDE_OPTIONS override_options ()
196
197/* These are meant to be redefined in the host dependent files */
198#define SUBTARGET_SWITCHES
199#define SUBTARGET_OPTIONS
200
201
202/* target machine storage layout */
203
204/* Define for XFmode extended real floating point support.
205 This will automatically cause REAL_ARITHMETIC to be defined. */
206#define LONG_DOUBLE_TYPE_SIZE 96
207
208/* Define if you don't want extended real, but do want to use the
209 software floating point emulator for REAL_ARITHMETIC and
--- 50 unchanged lines hidden (view full) ---
260 might need to be aligned. No data type wants to be aligned
261 rounder than this. The i386 supports 64-bit floating point
262 quantities, but these can be aligned on any 32-bit boundary.
263 The published ABIs say that doubles should be aligned on word
264 boundaries, but the Pentium gets better performance with them
265 aligned on 64 bit boundaries. */
266#define BIGGEST_ALIGNMENT (TARGET_ALIGN_DOUBLE ? 64 : 32)
267
268/* Set this non-zero if move instructions will actually fail to work
269 when given unaligned data. */
270#define STRICT_ALIGNMENT 0
271
272/* If bit field type is int, don't let it cross an int,
273 and give entire struct the alignment of an int. */
274/* Required on the 386 since it doesn't have bitfield insns. */
275#define PCC_BITFIELD_TYPE_MATTERS 1
276
277/* Maximum power of 2 that code can be aligned to. */
278#define MAX_CODE_ALIGN 6 /* 64 byte alignment */
279
280/* Align loop starts for optimal branching. */
281#define ASM_OUTPUT_LOOP_ALIGN(FILE) ASM_OUTPUT_ALIGN (FILE, i386_align_loops)
282
283/* This is how to align an instruction for optimal branching.
284 On i486 we'll get better performance by aligning on a
285 cache line (i.e. 16 byte) boundary. */
286#define ASM_OUTPUT_ALIGN_CODE(FILE) ASM_OUTPUT_ALIGN ((FILE), i386_align_jumps)
287
288
289/* Standard register usage. */
290
291/* This processor has special stack-like registers. See reg-stack.c
292 for details. */
293
294#define STACK_REGS
295
296/* Number of actual hardware registers.
297 The hardware registers are assigned numbers for the compiler
298 from 0 to just below FIRST_PSEUDO_REGISTER.
299 All registers that the compiler knows about must be given numbers,
300 even those that are not normally considered general registers.
301
302 In the 80386 we give the 8 general purpose registers the numbers 0-7.
--- 101 unchanged lines hidden (view full) ---
404 On the 80386, the first 4 cpu registers can hold any mode
405 while the floating point registers may hold only floating point.
406 Make it clear that the fp regs could not hold a 16-byte float. */
407
408/* The casts to int placate a compiler on a microvax,
409 for cross-compiler testing. */
410
411#define HARD_REGNO_MODE_OK(REGNO, MODE) \
412 ((REGNO) < 2 ? 1 \
413 : (REGNO) < 4 ? 1 \
414 : FP_REGNO_P (REGNO) \
415 ? (((int) GET_MODE_CLASS (MODE) == (int) MODE_FLOAT \
416 || (int) GET_MODE_CLASS (MODE) == (int) MODE_COMPLEX_FLOAT) \
417 && GET_MODE_UNIT_SIZE (MODE) <= 12) \
418 : (int) (MODE) != (int) QImode)
419
420/* Value is 1 if it is a good idea to tie two pseudo registers
421 when one has mode MODE1 and one has mode MODE2.
422 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
423 for any hard reg, then this must be 0 for correct output. */
424
425#define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
426
427/* A C expression returning the cost of moving data from a register of class
428 CLASS1 to one of CLASS2.
429
430 On the i386, copying between floating-point and fixed-point
431 registers is expensive. */
432
433#define REGISTER_MOVE_COST(CLASS1, CLASS2) \
434 (((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
435 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2))) ? 10 \
436 : 2)
437
438/* Specify the registers used for certain standard purposes.
439 The values of these macros are register numbers. */
440
441/* on the 386 the pc register is %eip, and is not usable as a general
442 register. The ordinary mov instructions won't work */
443/* #define PC_REGNUM */
444
445/* Register to use for pushing function arguments. */
--- 8 unchanged lines hidden (view full) ---
454/* First & last stack-like regs */
455#define FIRST_STACK_REG FIRST_FLOAT_REG
456#define LAST_STACK_REG (FIRST_FLOAT_REG + 7)
457
458/* Value should be nonzero if functions must have frame pointers.
459 Zero means the frame pointer need not be set up (and parms
460 may be accessed via the stack pointer) in functions that seem suitable.
461 This is computed in `reload', in reload1.c. */
462#define FRAME_POINTER_REQUIRED 0
463
464/* Base register for access to arguments of the function. */
465#define ARG_POINTER_REGNUM 16
466
467/* Register in which static-chain is passed to a function. */
468#define STATIC_CHAIN_REGNUM 2
469
470/* Register to hold the addressing base for position independent
--- 86 unchanged lines hidden (view full) ---
557 "FLOAT_REGS", \
558 "ALL_REGS" }
559
560/* Define which registers fit in which classes.
561 This is an initializer for a vector of HARD_REG_SET
562 of length N_REG_CLASSES. */
563
564#define REG_CLASS_CONTENTS \
565{ 0, \
566 0x1, 0x2, 0x4, 0x8, /* AREG, DREG, CREG, BREG */ \
567 0x3, /* AD_REGS */ \
568 0xf, /* Q_REGS */ \
569 0x10, 0x20, /* SIREG, DIREG */ \
570 0x07f, /* INDEX_REGS */ \
571 0x100ff, /* GENERAL_REGS */ \
572 0x0100, 0x0200, /* FP_TOP_REG, FP_SECOND_REG */ \
573 0xff00, /* FLOAT_REGS */ \
574 0x1ffff }
575
576/* The same information, inverted:
577 Return the class number of the smallest class containing
578 reg number REGNO. This could be a conditional expression
579 or could index an array. */
580
581#define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
582
583/* When defined, the compiler allows registers explicitly used in the
584 rtl to be used as spill registers but prevents the compiler from
585 extending the lifetime of these registers. */
586
587#define SMALL_REGISTER_CLASSES
588
589#define QI_REG_P(X) \
590 (REG_P (X) && REGNO (X) < 4)
591#define NON_QI_REG_P(X) \
592 (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
593
594#define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
595#define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG)
--- 57 unchanged lines hidden (view full) ---
653
654#define CONST_OK_FOR_LETTER_P(VALUE, C) \
655 ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 : \
656 (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \
657 (C) == 'K' ? (VALUE) == 0xff : \
658 (C) == 'L' ? (VALUE) == 0xffff : \
659 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \
660 (C) == 'N' ? (VALUE) >= 0 && (VALUE) <= 255 :\
661 0)
662
663/* Similar, but for floating constants, and defining letters G and H.
664 Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if
665 TARGET_387 isn't set, because the stack register converter may need to
666 load 0.0 into the function value register. */
667
668#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
669 ((C) == 'G' ? standard_80387_constant_p (VALUE) : 0)
670
671/* Place additional restrictions on the register class to use when it
672 is necessary to be able to hold a value of mode MODE in a reload
673 register for which class CLASS would ordinarily be used. */
674
675#define LIMIT_RELOAD_CLASS(MODE, CLASS) \
676 ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \
677 ? Q_REGS : (CLASS))
--- 108 unchanged lines hidden (view full) ---
786#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
787 (i386_return_pops_args (FUNDECL, FUNTYPE, SIZE))
788
789/* Define how to find the value returned by a function.
790 VALTYPE is the data type of the value (as a tree).
791 If the precise function being called is known, FUNC is its FUNCTION_DECL;
792 otherwise, FUNC is 0. */
793#define FUNCTION_VALUE(VALTYPE, FUNC) \
794 gen_rtx (REG, TYPE_MODE (VALTYPE), \
795 VALUE_REGNO (TYPE_MODE (VALTYPE)))
796
797/* Define how to find the value returned by a library function
798 assuming the value has mode MODE. */
799
800#define LIBCALL_VALUE(MODE) \
801 gen_rtx (REG, MODE, VALUE_REGNO (MODE))
802
803/* Define the size of the result block used for communication between
804 untyped_call and untyped_return. The block contains a DImode value
805 followed by the block used by fnsave and frstor. */
806
807#define APPLY_RESULT_SIZE (8+108)
808
809/* 1 if N is a possible register number for function argument passing. */
--- 10 unchanged lines hidden (view full) ---
820 int nregs; /* # registers available for passing */
821 int regno; /* next available register number */
822} CUMULATIVE_ARGS;
823
824/* Initialize a variable CUM of type CUMULATIVE_ARGS
825 for a call to a function whose data type is FNTYPE.
826 For a library call, FNTYPE is 0. */
827
828#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
829 (init_cumulative_args (&CUM, FNTYPE, LIBNAME))
830
831/* Update the data in CUM to advance over an argument
832 of mode MODE and data type TYPE.
833 (TYPE is null for libcalls where that information may not be available.) */
834
835#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
836 (function_arg_advance (&CUM, MODE, TYPE, NAMED))
--- 16 unchanged lines hidden (view full) ---
853
854/* For an arg passed partly in registers and partly in memory,
855 this is the number of registers used.
856 For args passed entirely in registers or entirely in memory, zero. */
857
858#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
859 (function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED))
860
861/* This macro generates the assembly code for function entry.
862 FILE is a stdio stream to output the code to.
863 SIZE is an int: how many units of temporary storage to allocate.
864 Refer to the array `regs_ever_live' to determine which registers
865 to save; `regs_ever_live[I]' is nonzero if register number I
866 is ever used in the function. This macro is responsible for
867 knowing which registers should not be saved even if used. */
868
--- 13 unchanged lines hidden (view full) ---
882 } \
883 else \
884 { \
885 fprintf (FILE, "\tmovl $%sP%d,%%edx\n", LPREFIX, (LABELNO)); \
886 fprintf (FILE, "\tcall _mcount\n"); \
887 } \
888}
889
890/* A C statement or compound statement to output to FILE some
891 assembler code to initialize basic-block profiling for the current
892 object module. This code should call the subroutine
893 `__bb_init_func' once per object module, passing it as its sole
894 argument the address of a block allocated in the object module.
895
896 The name of the block is a local symbol made with this statement:
897
898 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
899
900 Of course, since you are writing the definition of
901 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
902 can take a short cut in the definition of this macro and use the
903 name that you know will result.
904
905 The first word of this block is a flag which will be nonzero if the
906 object module has already been initialized. So test this word
907 first, and do not call `__bb_init_func' if the flag is nonzero. */
908
909#undef FUNCTION_BLOCK_PROFILER
910#define FUNCTION_BLOCK_PROFILER(STREAM, LABELNO) \
911do \
912 { \
913 static int num_func = 0; \
914 rtx xops[8]; \
915 char block_table[80], false_label[80]; \
916 \
917 ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \
918 ASM_GENERATE_INTERNAL_LABEL (false_label, "LPBZ", num_func); \
919 \
920 xops[0] = const0_rtx; \
921 xops[1] = gen_rtx (SYMBOL_REF, VOIDmode, block_table); \
922 xops[2] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, false_label)); \
923 xops[3] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_init_func")); \
924 xops[4] = gen_rtx (MEM, Pmode, xops[1]); \
925 xops[5] = stack_pointer_rtx; \
926 xops[6] = GEN_INT (4); \
927 xops[7] = gen_rtx (REG, Pmode, 0); /* eax */ \
928 \
929 CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \
930 CONSTANT_POOL_ADDRESS_P (xops[2]) = TRUE; \
931 \
932 output_asm_insn (AS2(cmp%L4,%0,%4), xops); \
933 output_asm_insn (AS1(jne,%2), xops); \
934 \
935 if (!flag_pic) \
936 output_asm_insn (AS1(push%L1,%1), xops); \
937 else \
938 { \
939 output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \
940 output_asm_insn (AS1 (push%L7,%7), xops); \
941 } \
942 \
943 output_asm_insn (AS1(call,%P3), xops); \
944 output_asm_insn (AS2(add%L0,%6,%5), xops); \
945 ASM_OUTPUT_INTERNAL_LABEL (STREAM, "LPBZ", num_func); \
946 num_func++; \
947 } \
948while (0)
949
950
951/* A C statement or compound statement to increment the count
952 associated with the basic block number BLOCKNO. Basic blocks are
953 numbered separately from zero within each compilation. The count
954 associated with block number BLOCKNO is at index BLOCKNO in a
955 vector of words; the name of this array is a local symbol made
956 with this statement:
957
958 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 2);
959
960 Of course, since you are writing the definition of
961 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
962 can take a short cut in the definition of this macro and use the
963 name that you know will result. */
964
965#define BLOCK_PROFILER(STREAM, BLOCKNO) \
966do \
967 { \
968 rtx xops[1], cnt_rtx; \
969 char counts[80]; \
970 \
971 ASM_GENERATE_INTERNAL_LABEL (counts, "LPBX", 2); \
972 cnt_rtx = gen_rtx (SYMBOL_REF, VOIDmode, counts); \
973 SYMBOL_REF_FLAG (cnt_rtx) = TRUE; \
974 \
975 if (BLOCKNO) \
976 cnt_rtx = plus_constant (cnt_rtx, (BLOCKNO)*4); \
977 \
978 if (flag_pic) \
979 cnt_rtx = gen_rtx (PLUS, Pmode, pic_offset_table_rtx, cnt_rtx); \
980 \
981 xops[0] = gen_rtx (MEM, SImode, cnt_rtx); \
982 output_asm_insn (AS1(inc%L0,%0), xops); \
983 } \
984while (0)
985
986/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
987 the stack pointer does not matter. The value is tested only in
988 functions that have frame pointers.
989 No definition is equivalent to always zero. */
990/* Note on the 386 it might be more efficient not to define this since
991 we have to restore it ourselves from the frame pointer, in order to
992 use pop */
993
--- 9 unchanged lines hidden (view full) ---
1003 of alloca; we also take advantage of it to omit stack adjustments
1004 before returning.
1005
1006 If the last non-note insn in the function is a BARRIER, then there
1007 is no need to emit a function prologue, because control does not fall
1008 off the end. This happens if the function ends in an "exit" call, or
1009 if a `return' insn is emitted directly into the function. */
1010
1011#define FUNCTION_EPILOGUE(FILE, SIZE) \
1012do { \
1013 rtx last = get_last_insn (); \
1014 if (last && GET_CODE (last) == NOTE) \
1015 last = prev_nonnote_insn (last); \
1016 if (! last || GET_CODE (last) != BARRIER) \
1017 function_epilogue (FILE, SIZE); \
1018} while (0)
1019
1020/* Output assembler code for a block containing the constant parts
1021 of a trampoline, leaving space for the variable parts. */
1022
1023/* On the 386, the trampoline contains three instructions:
1024 mov #STATIC,ecx
1025 mov #FUNCTION,eax
1026 jmp @eax */
1027#define TRAMPOLINE_TEMPLATE(FILE) \
--- 13 unchanged lines hidden (view full) ---
1041#define TRAMPOLINE_SIZE 12
1042
1043/* Emit RTL insns to initialize the variable parts of a trampoline.
1044 FNADDR is an RTX for the address of the function's pure code.
1045 CXT is an RTX for the static chain value for the function. */
1046
1047#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1048{ \
1049 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 1)), CXT); \
1050 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 6)), FNADDR); \
1051}
1052
1053/* Definitions for register eliminations.
1054
1055 This is an array of structures. Each structure initializes one pair
1056 of eliminable registers. The "from" register number is given first,
1057 followed by "to". Eliminations of the same "from" register are listed
1058 in order of preference.
--- 30 unchanged lines hidden (view full) ---
1089 (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \
1090 else \
1091 { \
1092 int regno; \
1093 int offset = 0; \
1094 \
1095 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
1096 if ((regs_ever_live[regno] && ! call_used_regs[regno]) \
1097 || (current_function_uses_pic_offset_table \
1098 && regno == PIC_OFFSET_TABLE_REGNUM)) \
1099 offset += 4; \
1100 \
1101 (OFFSET) = offset + get_frame_size (); \
1102 \
1103 if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1104 (OFFSET) += 4; /* Skip saved PC */ \
1105 } \
1106}
--- 127 unchanged lines hidden (view full) ---
1234 However, if REG is a broken-out memory address or multiplication,
1235 nothing needs to be done because REG can certainly go in a general reg.
1236
1237 When -fpic is used, special handling is needed for symbolic references.
1238 See comments by legitimize_pic_address in i386.c for details. */
1239
1240#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1241{ \
1242 rtx orig_x = (X); \
1243 (X) = legitimize_address (X, OLDX, MODE); \
1244 if (memory_address_p (MODE, X)) \
1245 goto WIN; \
1246}
1247
1248/* Nonzero if the constant value X is a legitimate general operand
1249 when generating PIC code. It is given that flag_pic is on and
1250 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1251
1252#define LEGITIMATE_PIC_OPERAND_P(X) \
1253 (! SYMBOLIC_CONST (X) \
1254 || (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X)))
1255
--- 18 unchanged lines hidden (view full) ---
1274
1275#define ENCODE_SECTION_INFO(DECL) \
1276do \
1277 { \
1278 if (flag_pic) \
1279 { \
1280 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1281 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
1282 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
1283 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1284 || ! TREE_PUBLIC (DECL)); \
1285 } \
1286 } \
1287while (0)
1288
1289/* Define this macro if a SYMBOL_REF representing a non-global
1290 address must be marked specially. This is called for
1291 compiler-generated local symbols, such as "__EXCEPTION_TABLE__".
1292
1293 On i386, if using PIC, we use this to set the rtx's
1294 SYMBOL_REF_FLAG, so that we may access it directly as
1295 an offset from the GOT register. */
1296
1297#define MARK_LOCAL_ADDRESS(X) \
1298do \
1299 { \
1300 if (flag_pic && GET_CODE (X) == SYMBOL_REF) \
1301 SYMBOL_REF_FLAG (X) = 1; \
1302 } \
1303while (0)
1304
1305/* Initialize data used by insn expanders. This is called from
1306 init_emit, once for each function, before code is generated.
1307 For 386, clear stack slot assignments remembered from previous
1308 functions. */
1309
1310#define INIT_EXPANDERS clear_386_stack_locals ()
1311
1312/* The `FINALIZE_PIC' macro serves as a hook to emit these special
--- 47 unchanged lines hidden (view full) ---
1360
1361#define REGPARM_MAX 3
1362
1363
1364/* Specify the machine mode that this machine uses
1365 for the index in the tablejump instruction. */
1366#define CASE_VECTOR_MODE Pmode
1367
1368/* Define this if the tablejump instruction expects the table
1369 to contain offsets from the address of the table.
1370 Do not define this if the table should contain absolute addresses. */
1371/* #define CASE_VECTOR_PC_RELATIVE */
1372
1373/* Specify the tree operation to be used to convert reals to integers.
1374 This should be changed to take advantage of fist --wfs ??
1375 */
1376#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1377
1378/* This is the kind of divide that is easiest to do in the general case. */
1379#define EASY_DIV_EXPR TRUNC_DIV_EXPR
1380
1381/* Define this as 1 if `char' should by default be signed; else as 0. */
1382#define DEFAULT_SIGNED_CHAR 1
1383
1384/* Max number of bytes we can move from memory to memory
1385 in one reasonably fast instruction. */
1386#define MOVE_MAX 4
1387
1388/* MOVE_RATIO is the number of move instructions that is better than a
1389 block move. Make this large on i386, since the block move is very
1390 inefficient with small blocks, and the hard register needs of the
1391 block move require much reload work. */
1392#define MOVE_RATIO 5
1393
1394/* Define this if zero-extension is slow (more than one real instruction). */
1395/* #define SLOW_ZERO_EXTEND */
1396
1397/* Nonzero if access to memory by bytes is slow and undesirable. */
1398#define SLOW_BYTE_ACCESS 0
1399
1400/* Define if shifts truncate the shift count
1401 which implies one can omit a sign-extension or zero-extension
1402 of a shift count. */
1403/* One i386, shifts do truncate the count. But bit opcodes don't. */
1404
1405/* #define SHIFT_COUNT_TRUNCATED */
1406
1407/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1408 is done just by pretending it is already truncated. */
1409#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1410
1411/* We assume that the store-condition-codes instructions store 0 for false
--- 10 unchanged lines hidden (view full) ---
1422 After generation of rtl, the compiler makes no further distinction
1423 between pointers and any other objects of this machine mode. */
1424#define Pmode SImode
1425
1426/* A function address in a call instruction
1427 is a byte address (for indexing purposes)
1428 so give the MEM rtx a byte's mode. */
1429#define FUNCTION_MODE QImode
1430
1431/* Define this if addresses of constant functions
1432 shouldn't be put through pseudo regs where they can be cse'd.
1433 Desirable on the 386 because a CALL with a constant address is
1434 not much slower than one with a register address. On a 486,
1435 it is faster to call with a constant address than indirect. */
1436#define NO_FUNCTION_CSE
1437
1438/* Provide the costs of a rtl expression. This is in the body of a
1439 switch on CODE. */
1440
1441#define RTX_COSTS(X,CODE,OUTER_CODE) \
1442 case MULT: \
1443 return COSTS_N_INSNS (20); \
1444 case DIV: \
1445 case UDIV: \
1446 case MOD: \
1447 case UMOD: \
1448 return COSTS_N_INSNS (20); \
1449 case ASHIFTRT: \
1450 case LSHIFTRT: \
1451 case ASHIFT: \
1452 return (4 + rtx_cost (XEXP (X, 0), OUTER_CODE) \
1453 + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1454 case PLUS: \
1455 if (GET_CODE (XEXP (X, 0)) == MULT \
1456 && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \
1457 && (INTVAL (XEXP (XEXP (X, 0), 1)) == 2 \
1458 || INTVAL (XEXP (XEXP (X, 0), 1)) == 4 \
1459 || INTVAL (XEXP (XEXP (X, 0), 1)) == 8)) \
1460 return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \
1461 + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1462 break;
1463
1464
1465/* Compute the cost of computing a constant rtl expression RTX
1466 whose rtx-code is CODE. The body of this macro is a portion
1467 of a switch statement. If the code is computed here,
1468 return it with a return statement. Otherwise, break from the switch. */
1469
1470#define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1471 case CONST_INT: \
1472 case CONST: \
1473 case LABEL_REF: \
1474 case SYMBOL_REF: \
1475 return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 0; \
1476 case CONST_DOUBLE: \
1477 { \
1478 int code; \
1479 if (GET_MODE (RTX) == VOIDmode) \
1480 return 2; \
1481 code = standard_80387_constant_p (RTX); \
1482 return code == 1 ? 0 : \
1483 code == 2 ? 1 : \
1484 2; \
1485 }
1486
1487/* Compute the cost of an address. This is meant to approximate the size
1488 and/or execution delay of an insn using that address. If the cost is
1489 approximated by the RTL complexity, including CONST_COSTS above, as
1490 is usually the case for CISC machines, this macro should not be defined.
1491 For aggressively RISCy machines, only one insn format is allowed, so
1492 this macro should be a constant. The value of this macro only matters
1493 for valid addresses.
1494
1495 For i386, it is better to use a complex address than let gcc copy
1496 the address into a reg and make a new pseudo. But not if the address
1497 requires to two regs - that would mean more pseudos with longer
1498 lifetimes. */
1499
1500#define ADDRESS_COST(RTX) \
1501 ((CONSTANT_P (RTX) \
1502 || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \
1503 && REG_P (XEXP (RTX, 0)))) ? 0 \
1504 : REG_P (RTX) ? 1 \
1505 : 2)
1506
1507/* Add any extra modes needed to represent the condition code.
1508
1509 For the i386, we need separate modes when floating-point equality
1510 comparisons are being done. */
1511
1512#define EXTRA_CC_MODES CCFPEQmode
1513
--- 16 unchanged lines hidden (view full) ---
1530
1531extern struct rtx_def *(*i386_compare_gen)(), *(*i386_compare_gen_eq)();
1532
1533/* Tell final.c how to eliminate redundant test instructions. */
1534
1535/* Here we define machine-dependent flags and fields in cc_status
1536 (see `conditions.h'). */
1537
1538/* Set if the cc value is actually in the 80387, so a floating point
1539 conditional branch must be output. */
1540#define CC_IN_80387 04000
1541
1542/* Set if the CC value was stored in a nonstandard way, so that
1543 the state of equality is indicated by zero in the carry bit. */
1544#define CC_Z_IN_NOT_C 010000
1545
1546/* Store in cc_status the expressions
1547 that the condition codes will describe
1548 after execution of an instruction whose pattern is EXP.
1549 Do not alter them if the instruction would not alter the cc's. */
1550
1551#define NOTICE_UPDATE_CC(EXP, INSN) \
1552 notice_update_cc((EXP))
1553
--- 29 unchanged lines hidden (view full) ---
1583{"ax","dx","cx","bx","si","di","bp","sp", \
1584 "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","" }
1585
1586#define REGISTER_NAMES HI_REGISTER_NAMES
1587
1588/* Table of additional register names to use in user input. */
1589
1590#define ADDITIONAL_REGISTER_NAMES \
1591{ "eax", 0, "edx", 1, "ecx", 2, "ebx", 3, \
1592 "esi", 4, "edi", 5, "ebp", 6, "esp", 7, \
1593 "al", 0, "dl", 1, "cl", 2, "bl", 3, \
1594 "ah", 0, "dh", 1, "ch", 2, "bh", 3 }
1595
1596/* Note we are omitting these since currently I don't know how
1597to get gcc to use these, since they want the same but different
1598number as al, and ax.
1599*/
1600
1601/* note the last four are not really qi_registers, but
1602 the md will have to never output movb into one of them
--- 17 unchanged lines hidden (view full) ---
1620 (n) == 2 ? 1 : \
1621 (n) == 3 ? 3 : \
1622 (n) == 4 ? 6 : \
1623 (n) == 5 ? 7 : \
1624 (n) == 6 ? 4 : \
1625 (n) == 7 ? 5 : \
1626 (n) + 4)
1627
1628/* This is how to output the definition of a user-level label named NAME,
1629 such as the label on a static function or variable NAME. */
1630
1631#define ASM_OUTPUT_LABEL(FILE,NAME) \
1632 (assemble_name (FILE, NAME), fputs (":\n", FILE))
1633
1634/* This is how to output an assembler line defining a `double' constant. */
1635
1636#define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1637do { long l[2]; \
1638 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
1639 if (sizeof (int) == sizeof (long)) \
1640 fprintf (FILE, "%s 0x%x,0x%x\n", ASM_LONG, (int) l[0], (int) l[1]); \
1641 else \
1642 fprintf (FILE, "%s 0x%lx,0x%lx\n", ASM_LONG, l[0], l[1]); \
1643 } while (0)
1644
1645/* This is how to output a `long double' extended real constant. */
1646
1647#undef ASM_OUTPUT_LONG_DOUBLE
1648#define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \
1649do { long l[3]; \
1650 REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \
1651 if (sizeof (int) == sizeof (long)) \
1652 fprintf (FILE, "%s 0x%x,0x%x,0x%x\n", ASM_LONG, \
1653 (int) l[0], (int) l[1], (int) l[2]); \
1654 else \
1655 fprintf (FILE, "%s 0x%lx,0x%lx,0x%lx\n", ASM_LONG, l[0], l[1], l[2]); \
1656 } while (0)
1657
1658/* This is how to output an assembler line defining a `float' constant. */
1659
1660#define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1661do { long l; \
1662 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
1663 if (sizeof (int) == sizeof (long)) \
1664 fprintf ((FILE), "%s 0x%x\n", ASM_LONG, (int) l); \
1665 else \
1666 fprintf ((FILE), "%s 0x%lx\n", ASM_LONG, l); \
1667 } while (0)
1668
1669/* Store in OUTPUT a string (made with alloca) containing
1670 an assembler-name for a local static variable named NAME.
1671 LABELNO is an integer which is different for each call. */
1672
1673#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1674( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
--- 35 unchanged lines hidden (view full) ---
1710
1711#define ASM_OUTPUT_BYTE(FILE,VALUE) \
1712 fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE))
1713
1714/* This is how to output an insn to push a register on the stack.
1715 It need not be very fast code. */
1716
1717#define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1718 fprintf (FILE, "\tpushl e%s\n", reg_names[REGNO])
1719
1720/* This is how to output an insn to pop a register from the stack.
1721 It need not be very fast code. */
1722
1723#define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1724 fprintf (FILE, "\tpopl e%s\n", reg_names[REGNO])
1725
1726/* This is how to output an element of a case-vector that is absolute.
1727 */
1728
1729#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1730 fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE)
1731
1732/* This is how to output an element of a case-vector that is relative.
1733 We don't use these on the 386 yet, because the ATT assembler can't do
1734 forward reference the differences.
1735 */
1736
1737#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1738 fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL)
1739
1740/* Define the parentheses used to group arithmetic operations
1741 in assembler code. */
1742
1743#define ASM_OPEN_PAREN ""
1744#define ASM_CLOSE_PAREN ""
1745
--- 12 unchanged lines hidden (view full) ---
1758 outputs b,w,or l respectively.
1759
1760 On the 80386, we use several such letters:
1761 f -- float insn (print a CONST_DOUBLE as a float rather than in hex).
1762 L,W,B,Q,S,T -- print the opcode suffix for specified size of operand.
1763 R -- print the prefix for register names.
1764 z -- print the opcode suffix for the size of the current operand.
1765 * -- print a star (in certain assembler syntax)
1766 w -- print the operand as if it's a "word" (HImode) even if it isn't.
1767 b -- print the operand as if it's a byte (QImode) even if it isn't.
1768 c -- don't print special prefixes before constant operands. */
1769
1770#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1771 ((CODE) == '*')
1772
1773/* Print the name of a register based on its machine mode and number.
1774 If CODE is 'w', pretend the mode is HImode.
1775 If CODE is 'b', pretend the mode is QImode.
1776 If CODE is 'k', pretend the mode is SImode.
--- 88 unchanged lines hidden (view full) ---
1865 (FP_REGNO_P (REGNO) \
1866 && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER))
1867*/
1868
1869/* a letter which is not needed by the normal asm syntax, which
1870 we can use for operand syntax in the extended asm */
1871
1872#define ASM_OPERAND_LETTER '#'
1873
1874#define RET return ""
1875#define AT_SP(mode) (gen_rtx (MEM, (mode), stack_pointer_rtx))
1876
1877/* Functions in i386.c */
1878extern void override_options ();
1879extern void order_regs_for_local_alloc ();
1880extern int i386_valid_decl_attribute_p ();
1881extern int i386_valid_type_attribute_p ();
1882extern int i386_return_pops_args ();
1883extern int i386_comp_type_attributes ();
1884extern void init_cumulative_args ();
1885extern void function_arg_advance ();
1886extern struct rtx_def *function_arg ();
1887extern int function_arg_partial_nregs ();
1888extern void output_op_from_reg ();
1889extern void output_to_reg ();
1890extern char *singlemove_string ();
1891extern char *output_move_double ();
1892extern char *output_move_memory ();
1893extern char *output_move_pushmem ();
1894extern int standard_80387_constant_p ();
1895extern char *output_move_const_single ();
1896extern int symbolic_operand ();
1897extern int call_insn_operand ();
1898extern int expander_call_insn_operand ();
1899extern int symbolic_reference_mentioned_p ();
1900extern void emit_pic_move ();
1901extern void function_prologue ();
1902extern int simple_386_epilogue ();
1903extern void function_epilogue ();
1904extern int legitimate_address_p ();
1905extern struct rtx_def *legitimize_pic_address ();
1906extern struct rtx_def *legitimize_address ();
1907extern void print_operand ();
--- 6 unchanged lines hidden (view full) ---
1914extern char *output_387_binary_op ();
1915extern char *output_fix_trunc ();
1916extern char *output_float_compare ();
1917extern char *output_fp_cc0_set ();
1918extern void save_386_machine_status ();
1919extern void restore_386_machine_status ();
1920extern void clear_386_stack_locals ();
1921extern struct rtx_def *assign_386_stack_local ();
1922
1923/* Variables in i386.c */
1924extern char *i386_reg_alloc_order; /* register allocation order */
1925extern char *i386_regparm_string; /* # registers to use to pass args */
1926extern char *i386_align_loops_string; /* power of two alignment for loops */
1927extern char *i386_align_jumps_string; /* power of two alignment for non-loop jumps */
1928extern char *i386_align_funcs_string; /* power of two alignment for functions */
1929extern int i386_regparm; /* i386_regparm_string as a number */
1930extern int i386_align_loops; /* power of two alignment for loops */
1931extern int i386_align_jumps; /* power of two alignment for non-loop jumps */
1932extern int i386_align_funcs; /* power of two alignment for functions */
1933extern char *hi_reg_name[]; /* names for 16 bit regs */
1934extern char *qi_reg_name[]; /* names for 8 bit regs (low) */
1935extern char *qi_high_reg_name[]; /* names for 8 bit regs (high) */
1936extern enum reg_class regclass_map[]; /* smalled class containing REGNO */
1937extern struct rtx_def *i386_compare_op0; /* operand 0 for comparisons */
1938extern struct rtx_def *i386_compare_op1; /* operand 1 for comparisons */
1939
1940/* External variables used */
1941extern int optimize; /* optimization level */
1942extern int obey_regdecls; /* TRUE if stupid register allocation */
1943
1944/* External functions used */
1945extern struct rtx_def *force_operand ();
1946
1947/*
1948Local variables:
1949version-control: t
1950End:
1951*/
2 (386, 486, Pentium).
3 Copyright (C) 1988, 1992, 1994, 1995 Free Software Foundation, Inc.
4
5This file is part of GNU CC.
6
7GNU CC is free software; you can redistribute it and/or modify
8it under the terms of the GNU General Public License as published by
9the Free Software Foundation; either version 2, or (at your option)
10any later version.
11
12GNU CC is distributed in the hope that it will be useful,
13but WITHOUT ANY WARRANTY; without even the implied warranty of
14MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15GNU General Public License for more details.
16
17You should have received a copy of the GNU General Public License
18along with GNU CC; see the file COPYING. If not, write to
19the Free Software Foundation, 59 Temple Place - Suite 330,
20Boston, MA 02111-1307, USA. */
21
22
23/* The purpose of this file is to define the characteristics of the i386,
24 independent of assembler syntax or operating system.
25
26 Three other files build on this one to describe a specific assembler syntax:
27 bsd386.h, att386.h, and sun386.h.
28
29 The actual tm.h file for a particular system should include
30 this file, and then the file for the appropriate assembler syntax.
--- 17 unchanged lines hidden (view full) ---
48#define HALF_PIC_ENCODE(DECL)
49#define HALF_PIC_DECLARE(NAME)
50#define HALF_PIC_INIT() error ("half-pic init called on systems that don't support it.")
51#define HALF_PIC_ADDRESS_P(X) 0
52#define HALF_PIC_PTR(X) X
53#define HALF_PIC_FINISH(STREAM)
54#endif
55
56/* Run-time compilation parameters selecting different hardware subsets. */
57
58extern int target_flags;
59
60/* Macros used in the machine description to test the flags. */
61
62/* configure can arrange to make this 2, to force a 486. */
63#ifndef TARGET_CPU_DEFAULT
64#define TARGET_CPU_DEFAULT 0
65#endif
66
67/* Masks for the -m switches */
68#define MASK_80387 000000000001 /* Hardware floating point */
69#define MASK_486 000000000002 /* 80486 specific */
70#define MASK_NOTUSED1 000000000004 /* bit not currently used */
71#define MASK_RTD 000000000010 /* Use ret that pops args */
72#define MASK_ALIGN_DOUBLE 000000000020 /* align doubles to 2 word boundary */
73#define MASK_SVR3_SHLIB 000000000040 /* Uninit locals into bss */
74#define MASK_IEEE_FP 000000000100 /* IEEE fp comparisons */
75#define MASK_FLOAT_RETURNS 000000000200 /* Return float in st(0) */
76#define MASK_NO_FANCY_MATH_387 000000000400 /* Disable sin, cos, sqrt */
77
78 /* Temporary codegen switches */
79#define MASK_DEBUG_ADDR 000001000000 /* Debug GO_IF_LEGITIMATE_ADDRESS */
80#define MASK_NO_WIDE_MULTIPLY 000002000000 /* Disable 32x32->64 multiplies */
81#define MASK_NO_MOVE 000004000000 /* Don't generate mem->mem */
82#define MASK_DEBUG_ARG 000010000000 /* Debug function_arg */
83
84/* Use the floating point instructions */
85#define TARGET_80387 (target_flags & MASK_80387)
86
87/* Compile using ret insn that pops args.
88 This will not work unless you use prototypes at least
89 for all functions that can take varying numbers of args. */
90#define TARGET_RTD (target_flags & MASK_RTD)
--- 16 unchanged lines hidden (view full) ---
107 in the 387 FPU or in 386 integer registers. If set, this flag causes
108 the 387 to be used, which is compatible with most calling conventions. */
109#define TARGET_FLOAT_RETURNS_IN_80387 (target_flags & MASK_FLOAT_RETURNS)
110
111/* Disable generation of FP sin, cos and sqrt operations for 387.
112 This is because FreeBSD lacks these in the math-emulator-code */
113#define TARGET_NO_FANCY_MATH_387 (target_flags & MASK_NO_FANCY_MATH_387)
114
115/* Temporary switches for tuning code generation */
116
117/* Disable 32x32->64 bit multiplies that are used for long long multiplies
118 and division by constants, but sometimes cause reload problems. */
119#define TARGET_NO_WIDE_MULTIPLY (target_flags & MASK_NO_WIDE_MULTIPLY)
120#define TARGET_WIDE_MULTIPLY (!TARGET_NO_WIDE_MULTIPLY)
121
122/* Debug GO_IF_LEGITIMATE_ADDRESS */
123#define TARGET_DEBUG_ADDR (target_flags & MASK_DEBUG_ADDR)
124
125/* Debug FUNCTION_ARG macros */
126#define TARGET_DEBUG_ARG (target_flags & MASK_DEBUG_ARG)
127
128/* Hack macros for tuning code generation */
129#define TARGET_MOVE ((target_flags & MASK_NO_MOVE) == 0) /* Don't generate memory->memory */
130
131/* Specific hardware switches */
132#define TARGET_486 (target_flags & MASK_486) /* 80486DX, 80486SX, 80486DX[24] */
133#define TARGET_386 (!TARGET_486) /* 80386 */
134
135#define TARGET_SWITCHES \
136{ { "80387", MASK_80387 }, \
137 { "no-80387", -MASK_80387 }, \
138 { "hard-float", MASK_80387 }, \
139 { "soft-float", -MASK_80387 }, \
140 { "no-soft-float", MASK_80387 }, \
141 { "386", -MASK_486 }, \
142 { "no-386", MASK_486 }, \
143 { "486", MASK_486 }, \
144 { "no-486", -MASK_486 }, \
145 { "rtd", MASK_RTD }, \
146 { "no-rtd", -MASK_RTD }, \
147 { "align-double", MASK_ALIGN_DOUBLE }, \
148 { "no-align-double", -MASK_ALIGN_DOUBLE }, \
149 { "svr3-shlib", MASK_SVR3_SHLIB }, \
150 { "no-svr3-shlib", -MASK_SVR3_SHLIB }, \
151 { "ieee-fp", MASK_IEEE_FP }, \
152 { "no-ieee-fp", -MASK_IEEE_FP }, \
153 { "fp-ret-in-387", MASK_FLOAT_RETURNS }, \
154 { "no-fp-ret-in-387", -MASK_FLOAT_RETURNS }, \
155 { "no-fancy-math-387", MASK_NO_FANCY_MATH_387 }, \
156 { "fancy-math-387", -MASK_NO_FANCY_MATH_387 }, \
157 { "no-wide-multiply", MASK_NO_WIDE_MULTIPLY }, \
158 { "wide-multiply", -MASK_NO_WIDE_MULTIPLY }, \
159 { "debug-addr", MASK_DEBUG_ADDR }, \
160 { "no-debug-addr", -MASK_DEBUG_ADDR }, \
161 { "move", -MASK_NO_MOVE }, \
162 { "no-move", MASK_NO_MOVE }, \
163 { "debug-arg", MASK_DEBUG_ARG }, \
164 { "no-debug-arg", -MASK_DEBUG_ARG }, \
165 SUBTARGET_SWITCHES \
166 { "", TARGET_DEFAULT | TARGET_CPU_DEFAULT}}
167
168/* This macro is similar to `TARGET_SWITCHES' but defines names of
169 command options that have values. Its definition is an
170 initializer with a subgrouping for each command option.
171
172 Each subgrouping contains a string constant, that defines the
173 fixed part of the option name, and the address of a variable. The
174 variable, type `char *', is set to the variable part of the given
175 option if the fixed part matches. The actual option name is made
176 by appending `-m' to the specified name. */
177#define TARGET_OPTIONS \
178{ { "reg-alloc=", &i386_reg_alloc_order }, \
179 { "regparm=", &i386_regparm_string }, \
180 { "align-loops=", &i386_align_loops_string }, \
181 { "align-jumps=", &i386_align_jumps_string }, \
182 { "align-functions=", &i386_align_funcs_string }, \
183 SUBTARGET_OPTIONS \
184}
185
186/* Sometimes certain combinations of command options do not make
187 sense on a particular target machine. You can define a macro
188 `OVERRIDE_OPTIONS' to take account of this. This macro, if
189 defined, is executed once just after all the command options have
190 been parsed.
191
192 Don't use this macro to turn on various extra optimizations for
193 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
194
195#define OVERRIDE_OPTIONS override_options ()
196
197/* These are meant to be redefined in the host dependent files */
198#define SUBTARGET_SWITCHES
199#define SUBTARGET_OPTIONS
200
201
202/* target machine storage layout */
203
204/* Define for XFmode extended real floating point support.
205 This will automatically cause REAL_ARITHMETIC to be defined. */
206#define LONG_DOUBLE_TYPE_SIZE 96
207
208/* Define if you don't want extended real, but do want to use the
209 software floating point emulator for REAL_ARITHMETIC and
--- 50 unchanged lines hidden (view full) ---
260 might need to be aligned. No data type wants to be aligned
261 rounder than this. The i386 supports 64-bit floating point
262 quantities, but these can be aligned on any 32-bit boundary.
263 The published ABIs say that doubles should be aligned on word
264 boundaries, but the Pentium gets better performance with them
265 aligned on 64 bit boundaries. */
266#define BIGGEST_ALIGNMENT (TARGET_ALIGN_DOUBLE ? 64 : 32)
267
268/* Set this non-zero if move instructions will actually fail to work
269 when given unaligned data. */
270#define STRICT_ALIGNMENT 0
271
272/* If bit field type is int, don't let it cross an int,
273 and give entire struct the alignment of an int. */
274/* Required on the 386 since it doesn't have bitfield insns. */
275#define PCC_BITFIELD_TYPE_MATTERS 1
276
277/* Maximum power of 2 that code can be aligned to. */
278#define MAX_CODE_ALIGN 6 /* 64 byte alignment */
279
280/* Align loop starts for optimal branching. */
281#define ASM_OUTPUT_LOOP_ALIGN(FILE) ASM_OUTPUT_ALIGN (FILE, i386_align_loops)
282
283/* This is how to align an instruction for optimal branching.
284 On i486 we'll get better performance by aligning on a
285 cache line (i.e. 16 byte) boundary. */
286#define ASM_OUTPUT_ALIGN_CODE(FILE) ASM_OUTPUT_ALIGN ((FILE), i386_align_jumps)
287
288
289/* Standard register usage. */
290
291/* This processor has special stack-like registers. See reg-stack.c
292 for details. */
293
294#define STACK_REGS
295
296/* Number of actual hardware registers.
297 The hardware registers are assigned numbers for the compiler
298 from 0 to just below FIRST_PSEUDO_REGISTER.
299 All registers that the compiler knows about must be given numbers,
300 even those that are not normally considered general registers.
301
302 In the 80386 we give the 8 general purpose registers the numbers 0-7.
--- 101 unchanged lines hidden (view full) ---
404 On the 80386, the first 4 cpu registers can hold any mode
405 while the floating point registers may hold only floating point.
406 Make it clear that the fp regs could not hold a 16-byte float. */
407
408/* The casts to int placate a compiler on a microvax,
409 for cross-compiler testing. */
410
411#define HARD_REGNO_MODE_OK(REGNO, MODE) \
412 ((REGNO) < 2 ? 1 \
413 : (REGNO) < 4 ? 1 \
414 : FP_REGNO_P (REGNO) \
415 ? (((int) GET_MODE_CLASS (MODE) == (int) MODE_FLOAT \
416 || (int) GET_MODE_CLASS (MODE) == (int) MODE_COMPLEX_FLOAT) \
417 && GET_MODE_UNIT_SIZE (MODE) <= 12) \
418 : (int) (MODE) != (int) QImode)
419
420/* Value is 1 if it is a good idea to tie two pseudo registers
421 when one has mode MODE1 and one has mode MODE2.
422 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
423 for any hard reg, then this must be 0 for correct output. */
424
425#define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) == (MODE2))
426
427/* A C expression returning the cost of moving data from a register of class
428 CLASS1 to one of CLASS2.
429
430 On the i386, copying between floating-point and fixed-point
431 registers is expensive. */
432
433#define REGISTER_MOVE_COST(CLASS1, CLASS2) \
434 (((FLOAT_CLASS_P (CLASS1) && ! FLOAT_CLASS_P (CLASS2)) \
435 || (! FLOAT_CLASS_P (CLASS1) && FLOAT_CLASS_P (CLASS2))) ? 10 \
436 : 2)
437
438/* Specify the registers used for certain standard purposes.
439 The values of these macros are register numbers. */
440
441/* on the 386 the pc register is %eip, and is not usable as a general
442 register. The ordinary mov instructions won't work */
443/* #define PC_REGNUM */
444
445/* Register to use for pushing function arguments. */
--- 8 unchanged lines hidden (view full) ---
454/* First & last stack-like regs */
455#define FIRST_STACK_REG FIRST_FLOAT_REG
456#define LAST_STACK_REG (FIRST_FLOAT_REG + 7)
457
458/* Value should be nonzero if functions must have frame pointers.
459 Zero means the frame pointer need not be set up (and parms
460 may be accessed via the stack pointer) in functions that seem suitable.
461 This is computed in `reload', in reload1.c. */
462#define FRAME_POINTER_REQUIRED 0
463
464/* Base register for access to arguments of the function. */
465#define ARG_POINTER_REGNUM 16
466
467/* Register in which static-chain is passed to a function. */
468#define STATIC_CHAIN_REGNUM 2
469
470/* Register to hold the addressing base for position independent
--- 86 unchanged lines hidden (view full) ---
557 "FLOAT_REGS", \
558 "ALL_REGS" }
559
560/* Define which registers fit in which classes.
561 This is an initializer for a vector of HARD_REG_SET
562 of length N_REG_CLASSES. */
563
564#define REG_CLASS_CONTENTS \
565{ 0, \
566 0x1, 0x2, 0x4, 0x8, /* AREG, DREG, CREG, BREG */ \
567 0x3, /* AD_REGS */ \
568 0xf, /* Q_REGS */ \
569 0x10, 0x20, /* SIREG, DIREG */ \
570 0x07f, /* INDEX_REGS */ \
571 0x100ff, /* GENERAL_REGS */ \
572 0x0100, 0x0200, /* FP_TOP_REG, FP_SECOND_REG */ \
573 0xff00, /* FLOAT_REGS */ \
574 0x1ffff }
575
576/* The same information, inverted:
577 Return the class number of the smallest class containing
578 reg number REGNO. This could be a conditional expression
579 or could index an array. */
580
581#define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
582
583/* When defined, the compiler allows registers explicitly used in the
584 rtl to be used as spill registers but prevents the compiler from
585 extending the lifetime of these registers. */
586
587#define SMALL_REGISTER_CLASSES
588
589#define QI_REG_P(X) \
590 (REG_P (X) && REGNO (X) < 4)
591#define NON_QI_REG_P(X) \
592 (REG_P (X) && REGNO (X) >= 4 && REGNO (X) < FIRST_PSEUDO_REGISTER)
593
594#define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
595#define FP_REGNO_P(n) ((n) >= FIRST_STACK_REG && (n) <= LAST_STACK_REG)
--- 57 unchanged lines hidden (view full) ---
653
654#define CONST_OK_FOR_LETTER_P(VALUE, C) \
655 ((C) == 'I' ? (VALUE) >= 0 && (VALUE) <= 31 : \
656 (C) == 'J' ? (VALUE) >= 0 && (VALUE) <= 63 : \
657 (C) == 'K' ? (VALUE) == 0xff : \
658 (C) == 'L' ? (VALUE) == 0xffff : \
659 (C) == 'M' ? (VALUE) >= 0 && (VALUE) <= 3 : \
660 (C) == 'N' ? (VALUE) >= 0 && (VALUE) <= 255 :\
661 0)
662
663/* Similar, but for floating constants, and defining letters G and H.
664 Here VALUE is the CONST_DOUBLE rtx itself. We allow constants even if
665 TARGET_387 isn't set, because the stack register converter may need to
666 load 0.0 into the function value register. */
667
668#define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
669 ((C) == 'G' ? standard_80387_constant_p (VALUE) : 0)
670
671/* Place additional restrictions on the register class to use when it
672 is necessary to be able to hold a value of mode MODE in a reload
673 register for which class CLASS would ordinarily be used. */
674
675#define LIMIT_RELOAD_CLASS(MODE, CLASS) \
676 ((MODE) == QImode && ((CLASS) == ALL_REGS || (CLASS) == GENERAL_REGS) \
677 ? Q_REGS : (CLASS))
--- 108 unchanged lines hidden (view full) ---
786#define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) \
787 (i386_return_pops_args (FUNDECL, FUNTYPE, SIZE))
788
789/* Define how to find the value returned by a function.
790 VALTYPE is the data type of the value (as a tree).
791 If the precise function being called is known, FUNC is its FUNCTION_DECL;
792 otherwise, FUNC is 0. */
793#define FUNCTION_VALUE(VALTYPE, FUNC) \
794 gen_rtx (REG, TYPE_MODE (VALTYPE), \
795 VALUE_REGNO (TYPE_MODE (VALTYPE)))
796
797/* Define how to find the value returned by a library function
798 assuming the value has mode MODE. */
799
800#define LIBCALL_VALUE(MODE) \
801 gen_rtx (REG, MODE, VALUE_REGNO (MODE))
802
803/* Define the size of the result block used for communication between
804 untyped_call and untyped_return. The block contains a DImode value
805 followed by the block used by fnsave and frstor. */
806
807#define APPLY_RESULT_SIZE (8+108)
808
809/* 1 if N is a possible register number for function argument passing. */
--- 10 unchanged lines hidden (view full) ---
820 int nregs; /* # registers available for passing */
821 int regno; /* next available register number */
822} CUMULATIVE_ARGS;
823
824/* Initialize a variable CUM of type CUMULATIVE_ARGS
825 for a call to a function whose data type is FNTYPE.
826 For a library call, FNTYPE is 0. */
827
828#define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME) \
829 (init_cumulative_args (&CUM, FNTYPE, LIBNAME))
830
831/* Update the data in CUM to advance over an argument
832 of mode MODE and data type TYPE.
833 (TYPE is null for libcalls where that information may not be available.) */
834
835#define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
836 (function_arg_advance (&CUM, MODE, TYPE, NAMED))
--- 16 unchanged lines hidden (view full) ---
853
854/* For an arg passed partly in registers and partly in memory,
855 this is the number of registers used.
856 For args passed entirely in registers or entirely in memory, zero. */
857
858#define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
859 (function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED))
860
861/* This macro generates the assembly code for function entry.
862 FILE is a stdio stream to output the code to.
863 SIZE is an int: how many units of temporary storage to allocate.
864 Refer to the array `regs_ever_live' to determine which registers
865 to save; `regs_ever_live[I]' is nonzero if register number I
866 is ever used in the function. This macro is responsible for
867 knowing which registers should not be saved even if used. */
868
--- 13 unchanged lines hidden (view full) ---
882 } \
883 else \
884 { \
885 fprintf (FILE, "\tmovl $%sP%d,%%edx\n", LPREFIX, (LABELNO)); \
886 fprintf (FILE, "\tcall _mcount\n"); \
887 } \
888}
889
890/* A C statement or compound statement to output to FILE some
891 assembler code to initialize basic-block profiling for the current
892 object module. This code should call the subroutine
893 `__bb_init_func' once per object module, passing it as its sole
894 argument the address of a block allocated in the object module.
895
896 The name of the block is a local symbol made with this statement:
897
898 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 0);
899
900 Of course, since you are writing the definition of
901 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
902 can take a short cut in the definition of this macro and use the
903 name that you know will result.
904
905 The first word of this block is a flag which will be nonzero if the
906 object module has already been initialized. So test this word
907 first, and do not call `__bb_init_func' if the flag is nonzero. */
908
909#undef FUNCTION_BLOCK_PROFILER
910#define FUNCTION_BLOCK_PROFILER(STREAM, LABELNO) \
911do \
912 { \
913 static int num_func = 0; \
914 rtx xops[8]; \
915 char block_table[80], false_label[80]; \
916 \
917 ASM_GENERATE_INTERNAL_LABEL (block_table, "LPBX", 0); \
918 ASM_GENERATE_INTERNAL_LABEL (false_label, "LPBZ", num_func); \
919 \
920 xops[0] = const0_rtx; \
921 xops[1] = gen_rtx (SYMBOL_REF, VOIDmode, block_table); \
922 xops[2] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, false_label)); \
923 xops[3] = gen_rtx (MEM, Pmode, gen_rtx (SYMBOL_REF, VOIDmode, "__bb_init_func")); \
924 xops[4] = gen_rtx (MEM, Pmode, xops[1]); \
925 xops[5] = stack_pointer_rtx; \
926 xops[6] = GEN_INT (4); \
927 xops[7] = gen_rtx (REG, Pmode, 0); /* eax */ \
928 \
929 CONSTANT_POOL_ADDRESS_P (xops[1]) = TRUE; \
930 CONSTANT_POOL_ADDRESS_P (xops[2]) = TRUE; \
931 \
932 output_asm_insn (AS2(cmp%L4,%0,%4), xops); \
933 output_asm_insn (AS1(jne,%2), xops); \
934 \
935 if (!flag_pic) \
936 output_asm_insn (AS1(push%L1,%1), xops); \
937 else \
938 { \
939 output_asm_insn (AS2 (lea%L7,%a1,%7), xops); \
940 output_asm_insn (AS1 (push%L7,%7), xops); \
941 } \
942 \
943 output_asm_insn (AS1(call,%P3), xops); \
944 output_asm_insn (AS2(add%L0,%6,%5), xops); \
945 ASM_OUTPUT_INTERNAL_LABEL (STREAM, "LPBZ", num_func); \
946 num_func++; \
947 } \
948while (0)
949
950
951/* A C statement or compound statement to increment the count
952 associated with the basic block number BLOCKNO. Basic blocks are
953 numbered separately from zero within each compilation. The count
954 associated with block number BLOCKNO is at index BLOCKNO in a
955 vector of words; the name of this array is a local symbol made
956 with this statement:
957
958 ASM_GENERATE_INTERNAL_LABEL (BUFFER, "LPBX", 2);
959
960 Of course, since you are writing the definition of
961 `ASM_GENERATE_INTERNAL_LABEL' as well as that of this macro, you
962 can take a short cut in the definition of this macro and use the
963 name that you know will result. */
964
965#define BLOCK_PROFILER(STREAM, BLOCKNO) \
966do \
967 { \
968 rtx xops[1], cnt_rtx; \
969 char counts[80]; \
970 \
971 ASM_GENERATE_INTERNAL_LABEL (counts, "LPBX", 2); \
972 cnt_rtx = gen_rtx (SYMBOL_REF, VOIDmode, counts); \
973 SYMBOL_REF_FLAG (cnt_rtx) = TRUE; \
974 \
975 if (BLOCKNO) \
976 cnt_rtx = plus_constant (cnt_rtx, (BLOCKNO)*4); \
977 \
978 if (flag_pic) \
979 cnt_rtx = gen_rtx (PLUS, Pmode, pic_offset_table_rtx, cnt_rtx); \
980 \
981 xops[0] = gen_rtx (MEM, SImode, cnt_rtx); \
982 output_asm_insn (AS1(inc%L0,%0), xops); \
983 } \
984while (0)
985
986/* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
987 the stack pointer does not matter. The value is tested only in
988 functions that have frame pointers.
989 No definition is equivalent to always zero. */
990/* Note on the 386 it might be more efficient not to define this since
991 we have to restore it ourselves from the frame pointer, in order to
992 use pop */
993
--- 9 unchanged lines hidden (view full) ---
1003 of alloca; we also take advantage of it to omit stack adjustments
1004 before returning.
1005
1006 If the last non-note insn in the function is a BARRIER, then there
1007 is no need to emit a function prologue, because control does not fall
1008 off the end. This happens if the function ends in an "exit" call, or
1009 if a `return' insn is emitted directly into the function. */
1010
1011#define FUNCTION_EPILOGUE(FILE, SIZE) \
1012do { \
1013 rtx last = get_last_insn (); \
1014 if (last && GET_CODE (last) == NOTE) \
1015 last = prev_nonnote_insn (last); \
1016 if (! last || GET_CODE (last) != BARRIER) \
1017 function_epilogue (FILE, SIZE); \
1018} while (0)
1019
1020/* Output assembler code for a block containing the constant parts
1021 of a trampoline, leaving space for the variable parts. */
1022
1023/* On the 386, the trampoline contains three instructions:
1024 mov #STATIC,ecx
1025 mov #FUNCTION,eax
1026 jmp @eax */
1027#define TRAMPOLINE_TEMPLATE(FILE) \
--- 13 unchanged lines hidden (view full) ---
1041#define TRAMPOLINE_SIZE 12
1042
1043/* Emit RTL insns to initialize the variable parts of a trampoline.
1044 FNADDR is an RTX for the address of the function's pure code.
1045 CXT is an RTX for the static chain value for the function. */
1046
1047#define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1048{ \
1049 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 1)), CXT); \
1050 emit_move_insn (gen_rtx (MEM, SImode, plus_constant (TRAMP, 6)), FNADDR); \
1051}
1052
1053/* Definitions for register eliminations.
1054
1055 This is an array of structures. Each structure initializes one pair
1056 of eliminable registers. The "from" register number is given first,
1057 followed by "to". Eliminations of the same "from" register are listed
1058 in order of preference.
--- 30 unchanged lines hidden (view full) ---
1089 (OFFSET) = 8; /* Skip saved PC and previous frame pointer */ \
1090 else \
1091 { \
1092 int regno; \
1093 int offset = 0; \
1094 \
1095 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) \
1096 if ((regs_ever_live[regno] && ! call_used_regs[regno]) \
1097 || (current_function_uses_pic_offset_table \
1098 && regno == PIC_OFFSET_TABLE_REGNUM)) \
1099 offset += 4; \
1100 \
1101 (OFFSET) = offset + get_frame_size (); \
1102 \
1103 if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1104 (OFFSET) += 4; /* Skip saved PC */ \
1105 } \
1106}
--- 127 unchanged lines hidden (view full) ---
1234 However, if REG is a broken-out memory address or multiplication,
1235 nothing needs to be done because REG can certainly go in a general reg.
1236
1237 When -fpic is used, special handling is needed for symbolic references.
1238 See comments by legitimize_pic_address in i386.c for details. */
1239
1240#define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1241{ \
1242 rtx orig_x = (X); \
1243 (X) = legitimize_address (X, OLDX, MODE); \
1244 if (memory_address_p (MODE, X)) \
1245 goto WIN; \
1246}
1247
1248/* Nonzero if the constant value X is a legitimate general operand
1249 when generating PIC code. It is given that flag_pic is on and
1250 that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1251
1252#define LEGITIMATE_PIC_OPERAND_P(X) \
1253 (! SYMBOLIC_CONST (X) \
1254 || (GET_CODE (X) == SYMBOL_REF && CONSTANT_POOL_ADDRESS_P (X)))
1255
--- 18 unchanged lines hidden (view full) ---
1274
1275#define ENCODE_SECTION_INFO(DECL) \
1276do \
1277 { \
1278 if (flag_pic) \
1279 { \
1280 rtx rtl = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1281 ? TREE_CST_RTL (DECL) : DECL_RTL (DECL)); \
1282 SYMBOL_REF_FLAG (XEXP (rtl, 0)) \
1283 = (TREE_CODE_CLASS (TREE_CODE (DECL)) != 'd' \
1284 || ! TREE_PUBLIC (DECL)); \
1285 } \
1286 } \
1287while (0)
1288
1289/* Define this macro if a SYMBOL_REF representing a non-global
1290 address must be marked specially. This is called for
1291 compiler-generated local symbols, such as "__EXCEPTION_TABLE__".
1292
1293 On i386, if using PIC, we use this to set the rtx's
1294 SYMBOL_REF_FLAG, so that we may access it directly as
1295 an offset from the GOT register. */
1296
1297#define MARK_LOCAL_ADDRESS(X) \
1298do \
1299 { \
1300 if (flag_pic && GET_CODE (X) == SYMBOL_REF) \
1301 SYMBOL_REF_FLAG (X) = 1; \
1302 } \
1303while (0)
1304
1305/* Initialize data used by insn expanders. This is called from
1306 init_emit, once for each function, before code is generated.
1307 For 386, clear stack slot assignments remembered from previous
1308 functions. */
1309
1310#define INIT_EXPANDERS clear_386_stack_locals ()
1311
1312/* The `FINALIZE_PIC' macro serves as a hook to emit these special
--- 47 unchanged lines hidden (view full) ---
1360
1361#define REGPARM_MAX 3
1362
1363
1364/* Specify the machine mode that this machine uses
1365 for the index in the tablejump instruction. */
1366#define CASE_VECTOR_MODE Pmode
1367
1368/* Define this if the tablejump instruction expects the table
1369 to contain offsets from the address of the table.
1370 Do not define this if the table should contain absolute addresses. */
1371/* #define CASE_VECTOR_PC_RELATIVE */
1372
1373/* Specify the tree operation to be used to convert reals to integers.
1374 This should be changed to take advantage of fist --wfs ??
1375 */
1376#define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1377
1378/* This is the kind of divide that is easiest to do in the general case. */
1379#define EASY_DIV_EXPR TRUNC_DIV_EXPR
1380
1381/* Define this as 1 if `char' should by default be signed; else as 0. */
1382#define DEFAULT_SIGNED_CHAR 1
1383
1384/* Max number of bytes we can move from memory to memory
1385 in one reasonably fast instruction. */
1386#define MOVE_MAX 4
1387
1388/* MOVE_RATIO is the number of move instructions that is better than a
1389 block move. Make this large on i386, since the block move is very
1390 inefficient with small blocks, and the hard register needs of the
1391 block move require much reload work. */
1392#define MOVE_RATIO 5
1393
1394/* Define this if zero-extension is slow (more than one real instruction). */
1395/* #define SLOW_ZERO_EXTEND */
1396
1397/* Nonzero if access to memory by bytes is slow and undesirable. */
1398#define SLOW_BYTE_ACCESS 0
1399
1400/* Define if shifts truncate the shift count
1401 which implies one can omit a sign-extension or zero-extension
1402 of a shift count. */
1403/* One i386, shifts do truncate the count. But bit opcodes don't. */
1404
1405/* #define SHIFT_COUNT_TRUNCATED */
1406
1407/* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1408 is done just by pretending it is already truncated. */
1409#define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1410
1411/* We assume that the store-condition-codes instructions store 0 for false
--- 10 unchanged lines hidden (view full) ---
1422 After generation of rtl, the compiler makes no further distinction
1423 between pointers and any other objects of this machine mode. */
1424#define Pmode SImode
1425
1426/* A function address in a call instruction
1427 is a byte address (for indexing purposes)
1428 so give the MEM rtx a byte's mode. */
1429#define FUNCTION_MODE QImode
1430
1431/* Define this if addresses of constant functions
1432 shouldn't be put through pseudo regs where they can be cse'd.
1433 Desirable on the 386 because a CALL with a constant address is
1434 not much slower than one with a register address. On a 486,
1435 it is faster to call with a constant address than indirect. */
1436#define NO_FUNCTION_CSE
1437
1438/* Provide the costs of a rtl expression. This is in the body of a
1439 switch on CODE. */
1440
1441#define RTX_COSTS(X,CODE,OUTER_CODE) \
1442 case MULT: \
1443 return COSTS_N_INSNS (20); \
1444 case DIV: \
1445 case UDIV: \
1446 case MOD: \
1447 case UMOD: \
1448 return COSTS_N_INSNS (20); \
1449 case ASHIFTRT: \
1450 case LSHIFTRT: \
1451 case ASHIFT: \
1452 return (4 + rtx_cost (XEXP (X, 0), OUTER_CODE) \
1453 + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1454 case PLUS: \
1455 if (GET_CODE (XEXP (X, 0)) == MULT \
1456 && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \
1457 && (INTVAL (XEXP (XEXP (X, 0), 1)) == 2 \
1458 || INTVAL (XEXP (XEXP (X, 0), 1)) == 4 \
1459 || INTVAL (XEXP (XEXP (X, 0), 1)) == 8)) \
1460 return (2 + rtx_cost (XEXP (XEXP (X, 0), 0), OUTER_CODE) \
1461 + rtx_cost (XEXP (X, 1), OUTER_CODE)); \
1462 break;
1463
1464
1465/* Compute the cost of computing a constant rtl expression RTX
1466 whose rtx-code is CODE. The body of this macro is a portion
1467 of a switch statement. If the code is computed here,
1468 return it with a return statement. Otherwise, break from the switch. */
1469
1470#define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1471 case CONST_INT: \
1472 case CONST: \
1473 case LABEL_REF: \
1474 case SYMBOL_REF: \
1475 return flag_pic && SYMBOLIC_CONST (RTX) ? 2 : 0; \
1476 case CONST_DOUBLE: \
1477 { \
1478 int code; \
1479 if (GET_MODE (RTX) == VOIDmode) \
1480 return 2; \
1481 code = standard_80387_constant_p (RTX); \
1482 return code == 1 ? 0 : \
1483 code == 2 ? 1 : \
1484 2; \
1485 }
1486
1487/* Compute the cost of an address. This is meant to approximate the size
1488 and/or execution delay of an insn using that address. If the cost is
1489 approximated by the RTL complexity, including CONST_COSTS above, as
1490 is usually the case for CISC machines, this macro should not be defined.
1491 For aggressively RISCy machines, only one insn format is allowed, so
1492 this macro should be a constant. The value of this macro only matters
1493 for valid addresses.
1494
1495 For i386, it is better to use a complex address than let gcc copy
1496 the address into a reg and make a new pseudo. But not if the address
1497 requires to two regs - that would mean more pseudos with longer
1498 lifetimes. */
1499
1500#define ADDRESS_COST(RTX) \
1501 ((CONSTANT_P (RTX) \
1502 || (GET_CODE (RTX) == PLUS && CONSTANT_P (XEXP (RTX, 1)) \
1503 && REG_P (XEXP (RTX, 0)))) ? 0 \
1504 : REG_P (RTX) ? 1 \
1505 : 2)
1506
1507/* Add any extra modes needed to represent the condition code.
1508
1509 For the i386, we need separate modes when floating-point equality
1510 comparisons are being done. */
1511
1512#define EXTRA_CC_MODES CCFPEQmode
1513
--- 16 unchanged lines hidden (view full) ---
1530
1531extern struct rtx_def *(*i386_compare_gen)(), *(*i386_compare_gen_eq)();
1532
1533/* Tell final.c how to eliminate redundant test instructions. */
1534
1535/* Here we define machine-dependent flags and fields in cc_status
1536 (see `conditions.h'). */
1537
1538/* Set if the cc value is actually in the 80387, so a floating point
1539 conditional branch must be output. */
1540#define CC_IN_80387 04000
1541
1542/* Set if the CC value was stored in a nonstandard way, so that
1543 the state of equality is indicated by zero in the carry bit. */
1544#define CC_Z_IN_NOT_C 010000
1545
1546/* Store in cc_status the expressions
1547 that the condition codes will describe
1548 after execution of an instruction whose pattern is EXP.
1549 Do not alter them if the instruction would not alter the cc's. */
1550
1551#define NOTICE_UPDATE_CC(EXP, INSN) \
1552 notice_update_cc((EXP))
1553
--- 29 unchanged lines hidden (view full) ---
1583{"ax","dx","cx","bx","si","di","bp","sp", \
1584 "st","st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)","" }
1585
1586#define REGISTER_NAMES HI_REGISTER_NAMES
1587
1588/* Table of additional register names to use in user input. */
1589
1590#define ADDITIONAL_REGISTER_NAMES \
1591{ "eax", 0, "edx", 1, "ecx", 2, "ebx", 3, \
1592 "esi", 4, "edi", 5, "ebp", 6, "esp", 7, \
1593 "al", 0, "dl", 1, "cl", 2, "bl", 3, \
1594 "ah", 0, "dh", 1, "ch", 2, "bh", 3 }
1595
1596/* Note we are omitting these since currently I don't know how
1597to get gcc to use these, since they want the same but different
1598number as al, and ax.
1599*/
1600
1601/* note the last four are not really qi_registers, but
1602 the md will have to never output movb into one of them
--- 17 unchanged lines hidden (view full) ---
1620 (n) == 2 ? 1 : \
1621 (n) == 3 ? 3 : \
1622 (n) == 4 ? 6 : \
1623 (n) == 5 ? 7 : \
1624 (n) == 6 ? 4 : \
1625 (n) == 7 ? 5 : \
1626 (n) + 4)
1627
1628/* This is how to output the definition of a user-level label named NAME,
1629 such as the label on a static function or variable NAME. */
1630
1631#define ASM_OUTPUT_LABEL(FILE,NAME) \
1632 (assemble_name (FILE, NAME), fputs (":\n", FILE))
1633
1634/* This is how to output an assembler line defining a `double' constant. */
1635
1636#define ASM_OUTPUT_DOUBLE(FILE,VALUE) \
1637do { long l[2]; \
1638 REAL_VALUE_TO_TARGET_DOUBLE (VALUE, l); \
1639 if (sizeof (int) == sizeof (long)) \
1640 fprintf (FILE, "%s 0x%x,0x%x\n", ASM_LONG, (int) l[0], (int) l[1]); \
1641 else \
1642 fprintf (FILE, "%s 0x%lx,0x%lx\n", ASM_LONG, l[0], l[1]); \
1643 } while (0)
1644
1645/* This is how to output a `long double' extended real constant. */
1646
1647#undef ASM_OUTPUT_LONG_DOUBLE
1648#define ASM_OUTPUT_LONG_DOUBLE(FILE,VALUE) \
1649do { long l[3]; \
1650 REAL_VALUE_TO_TARGET_LONG_DOUBLE (VALUE, l); \
1651 if (sizeof (int) == sizeof (long)) \
1652 fprintf (FILE, "%s 0x%x,0x%x,0x%x\n", ASM_LONG, \
1653 (int) l[0], (int) l[1], (int) l[2]); \
1654 else \
1655 fprintf (FILE, "%s 0x%lx,0x%lx,0x%lx\n", ASM_LONG, l[0], l[1], l[2]); \
1656 } while (0)
1657
1658/* This is how to output an assembler line defining a `float' constant. */
1659
1660#define ASM_OUTPUT_FLOAT(FILE,VALUE) \
1661do { long l; \
1662 REAL_VALUE_TO_TARGET_SINGLE (VALUE, l); \
1663 if (sizeof (int) == sizeof (long)) \
1664 fprintf ((FILE), "%s 0x%x\n", ASM_LONG, (int) l); \
1665 else \
1666 fprintf ((FILE), "%s 0x%lx\n", ASM_LONG, l); \
1667 } while (0)
1668
1669/* Store in OUTPUT a string (made with alloca) containing
1670 an assembler-name for a local static variable named NAME.
1671 LABELNO is an integer which is different for each call. */
1672
1673#define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1674( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
--- 35 unchanged lines hidden (view full) ---
1710
1711#define ASM_OUTPUT_BYTE(FILE,VALUE) \
1712 fprintf ((FILE), "%s 0x%x\n", ASM_BYTE_OP, (VALUE))
1713
1714/* This is how to output an insn to push a register on the stack.
1715 It need not be very fast code. */
1716
1717#define ASM_OUTPUT_REG_PUSH(FILE,REGNO) \
1718 fprintf (FILE, "\tpushl e%s\n", reg_names[REGNO])
1719
1720/* This is how to output an insn to pop a register from the stack.
1721 It need not be very fast code. */
1722
1723#define ASM_OUTPUT_REG_POP(FILE,REGNO) \
1724 fprintf (FILE, "\tpopl e%s\n", reg_names[REGNO])
1725
1726/* This is how to output an element of a case-vector that is absolute.
1727 */
1728
1729#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1730 fprintf (FILE, "%s %s%d\n", ASM_LONG, LPREFIX, VALUE)
1731
1732/* This is how to output an element of a case-vector that is relative.
1733 We don't use these on the 386 yet, because the ATT assembler can't do
1734 forward reference the differences.
1735 */
1736
1737#define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1738 fprintf (FILE, "\t.word %s%d-%s%d\n",LPREFIX, VALUE,LPREFIX, REL)
1739
1740/* Define the parentheses used to group arithmetic operations
1741 in assembler code. */
1742
1743#define ASM_OPEN_PAREN ""
1744#define ASM_CLOSE_PAREN ""
1745
--- 12 unchanged lines hidden (view full) ---
1758 outputs b,w,or l respectively.
1759
1760 On the 80386, we use several such letters:
1761 f -- float insn (print a CONST_DOUBLE as a float rather than in hex).
1762 L,W,B,Q,S,T -- print the opcode suffix for specified size of operand.
1763 R -- print the prefix for register names.
1764 z -- print the opcode suffix for the size of the current operand.
1765 * -- print a star (in certain assembler syntax)
1766 w -- print the operand as if it's a "word" (HImode) even if it isn't.
1767 b -- print the operand as if it's a byte (QImode) even if it isn't.
1768 c -- don't print special prefixes before constant operands. */
1769
1770#define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
1771 ((CODE) == '*')
1772
1773/* Print the name of a register based on its machine mode and number.
1774 If CODE is 'w', pretend the mode is HImode.
1775 If CODE is 'b', pretend the mode is QImode.
1776 If CODE is 'k', pretend the mode is SImode.
--- 88 unchanged lines hidden (view full) ---
1865 (FP_REGNO_P (REGNO) \
1866 && (GET_CODE (INSN) == JUMP_INSN || GET_CODE (INSN) == BARRIER))
1867*/
1868
1869/* a letter which is not needed by the normal asm syntax, which
1870 we can use for operand syntax in the extended asm */
1871
1872#define ASM_OPERAND_LETTER '#'
1873
1874#define RET return ""
1875#define AT_SP(mode) (gen_rtx (MEM, (mode), stack_pointer_rtx))
1876
1877/* Functions in i386.c */
1878extern void override_options ();
1879extern void order_regs_for_local_alloc ();
1880extern int i386_valid_decl_attribute_p ();
1881extern int i386_valid_type_attribute_p ();
1882extern int i386_return_pops_args ();
1883extern int i386_comp_type_attributes ();
1884extern void init_cumulative_args ();
1885extern void function_arg_advance ();
1886extern struct rtx_def *function_arg ();
1887extern int function_arg_partial_nregs ();
1888extern void output_op_from_reg ();
1889extern void output_to_reg ();
1890extern char *singlemove_string ();
1891extern char *output_move_double ();
1892extern char *output_move_memory ();
1893extern char *output_move_pushmem ();
1894extern int standard_80387_constant_p ();
1895extern char *output_move_const_single ();
1896extern int symbolic_operand ();
1897extern int call_insn_operand ();
1898extern int expander_call_insn_operand ();
1899extern int symbolic_reference_mentioned_p ();
1900extern void emit_pic_move ();
1901extern void function_prologue ();
1902extern int simple_386_epilogue ();
1903extern void function_epilogue ();
1904extern int legitimate_address_p ();
1905extern struct rtx_def *legitimize_pic_address ();
1906extern struct rtx_def *legitimize_address ();
1907extern void print_operand ();
--- 6 unchanged lines hidden (view full) ---
1914extern char *output_387_binary_op ();
1915extern char *output_fix_trunc ();
1916extern char *output_float_compare ();
1917extern char *output_fp_cc0_set ();
1918extern void save_386_machine_status ();
1919extern void restore_386_machine_status ();
1920extern void clear_386_stack_locals ();
1921extern struct rtx_def *assign_386_stack_local ();
1922
1923/* Variables in i386.c */
1924extern char *i386_reg_alloc_order; /* register allocation order */
1925extern char *i386_regparm_string; /* # registers to use to pass args */
1926extern char *i386_align_loops_string; /* power of two alignment for loops */
1927extern char *i386_align_jumps_string; /* power of two alignment for non-loop jumps */
1928extern char *i386_align_funcs_string; /* power of two alignment for functions */
1929extern int i386_regparm; /* i386_regparm_string as a number */
1930extern int i386_align_loops; /* power of two alignment for loops */
1931extern int i386_align_jumps; /* power of two alignment for non-loop jumps */
1932extern int i386_align_funcs; /* power of two alignment for functions */
1933extern char *hi_reg_name[]; /* names for 16 bit regs */
1934extern char *qi_reg_name[]; /* names for 8 bit regs (low) */
1935extern char *qi_high_reg_name[]; /* names for 8 bit regs (high) */
1936extern enum reg_class regclass_map[]; /* smalled class containing REGNO */
1937extern struct rtx_def *i386_compare_op0; /* operand 0 for comparisons */
1938extern struct rtx_def *i386_compare_op1; /* operand 1 for comparisons */
1939
1940/* External variables used */
1941extern int optimize; /* optimization level */
1942extern int obey_regdecls; /* TRUE if stupid register allocation */
1943
1944/* External functions used */
1945extern struct rtx_def *force_operand ();
1946
1947/*
1948Local variables:
1949version-control: t
1950End:
1951*/