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pci_emul.h (234761) pci_emul.h (234938)
1/*-
2 * Copyright (c) 2011 NetApp, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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97 */
98#define MSIX_TABLE_ENTRY_SIZE 16
99#define MAX_MSIX_TABLE_SIZE 2048
100
101struct pci_devinst {
102 struct pci_devemu *pi_d;
103 struct vmctx *pi_vmctx;
104 uint8_t pi_bus, pi_slot, pi_func;
1/*-
2 * Copyright (c) 2011 NetApp, Inc.
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 88 unchanged lines hidden (view full) ---

97 */
98#define MSIX_TABLE_ENTRY_SIZE 16
99#define MAX_MSIX_TABLE_SIZE 2048
100
101struct pci_devinst {
102 struct pci_devemu *pi_d;
103 struct vmctx *pi_vmctx;
104 uint8_t pi_bus, pi_slot, pi_func;
105 uint8_t pi_lintr_pin;
105 char pi_name[PI_NAMESZ];
106 uint16_t pi_iobase;
107 int pi_bar_getsize;
108
109 struct {
110 int enabled;
111 int cpu;
112 int vector;

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144struct msixcap {
145 uint8_t capid;
146 uint8_t nextptr;
147 uint16_t msgctrl;
148 uint32_t table_offset;
149 uint32_t pba_offset;
150} __packed;
151
106 char pi_name[PI_NAMESZ];
107 uint16_t pi_iobase;
108 int pi_bar_getsize;
109
110 struct {
111 int enabled;
112 int cpu;
113 int vector;

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145struct msixcap {
146 uint8_t capid;
147 uint8_t nextptr;
148 uint16_t msgctrl;
149 uint32_t table_offset;
150 uint32_t pba_offset;
151} __packed;
152
152void init_pci(struct vmctx *ctx);
153void pci_parse_slot(char *opt);
154void pci_parse_name(char *opt);
155void pci_callback(void);
156int pci_emul_alloc_bar(struct pci_devinst *pdi, int idx, uint64_t hostbase,
157 enum pcibar_type type, uint64_t size);
158int pci_emul_add_msicap(struct pci_devinst *pi, int msgnum);
159void msicap_cfgwrite(struct pci_devinst *pi, int capoff, int offset,
160 int bytes, uint32_t val);
161void msixcap_cfgwrite(struct pci_devinst *pi, int capoff, int offset,
162 int bytes, uint32_t val);
153void init_pci(struct vmctx *ctx);
154void msicap_cfgwrite(struct pci_devinst *pi, int capoff, int offset,
155 int bytes, uint32_t val);
156void msixcap_cfgwrite(struct pci_devinst *pi, int capoff, int offset,
157 int bytes, uint32_t val);
158void pci_callback(void);
159int pci_emul_alloc_bar(struct pci_devinst *pdi, int idx, uint64_t hostbase,
160 enum pcibar_type type, uint64_t size);
161int pci_emul_add_msicap(struct pci_devinst *pi, int msgnum);
162int pci_is_legacy(struct pci_devinst *pi);
163void pci_generate_msi(struct pci_devinst *pi, int msgnum);
164void pci_lintr_assert(struct pci_devinst *pi);
165void pci_lintr_deassert(struct pci_devinst *pi);
166int pci_lintr_request(struct pci_devinst *pi, int ivec);
167int pci_msi_enabled(struct pci_devinst *pi);
168int pci_msi_msgnum(struct pci_devinst *pi);
169void pci_parse_name(char *opt);
170void pci_parse_slot(char *opt, int legacy);
171void pci_populate_msicap(struct msicap *cap, int msgs, int nextptr);
163
172
164void pci_generate_msi(struct pci_devinst *pi, int msgnum);
165int pci_msi_enabled(struct pci_devinst *pi);
166int pci_msi_msgnum(struct pci_devinst *pi);
167void pci_populate_msicap(struct msicap *cap, int msgs, int nextptr);
168
169static __inline void
170pci_set_cfgdata8(struct pci_devinst *pi, int offset, uint8_t val)
171{
172 assert(offset <= PCI_REGMAX);
173 *(uint8_t *)(pi->pi_cfgdata + offset) = val;
174}
175
176static __inline void

--- 35 unchanged lines hidden --- 		173static __inline void
174pci_set_cfgdata8(struct pci_devinst *pi, int offset, uint8_t val)
175{
176 assert(offset <= PCI_REGMAX);
177 *(uint8_t *)(pi->pi_cfgdata + offset) = val;
178}
179
180static __inline void

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