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isa_dma.c (50477) isa_dma.c (57973)
1/*-
2 * Copyright (c) 1991 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to Berkeley by
6 * William Jolitz.
7 *
8 * Redistribution and use in source and binary forms, with or without

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29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91
1/*-
2 * Copyright (c) 1991 The Regents of the University of California.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to Berkeley by
6 * William Jolitz.
7 *
8 * Redistribution and use in source and binary forms, with or without

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29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 * from: @(#)isa.c 7.2 (Berkeley) 5/13/91
37 * $FreeBSD: head/sys/i386/isa/isa_dma.c 50477 1999-08-28 01:08:13Z peter $
37 * $FreeBSD: head/sys/i386/isa/isa_dma.c 57973 2000-03-13 10:19:32Z phk $
38 */
39
40/*
41 * code to manage AT bus
42 *
43 * 92/08/18 Frank P. MacLachlan (fpm@crash.cts.com):
44 * Fixed uninitialized variable problem and added code to deal
45 * with DMA page boundaries in isa_dmarangecheck(). Fixed word
46 * mode DMA count compution and reorganized DMA setup code in
47 * isa_dmastart()
48 */
49
50#include <sys/param.h>
51#include <sys/systm.h>
38 */
39
40/*
41 * code to manage AT bus
42 *
43 * 92/08/18 Frank P. MacLachlan (fpm@crash.cts.com):
44 * Fixed uninitialized variable problem and added code to deal
45 * with DMA page boundaries in isa_dmarangecheck(). Fixed word
46 * mode DMA count compution and reorganized DMA setup code in
47 * isa_dmastart()
48 */
49
50#include <sys/param.h>
51#include <sys/systm.h>
52#include <sys/buf.h> /* B_READ and B_RAW */
53#include <sys/malloc.h>
54#include <vm/vm.h>
55#include <vm/vm_param.h>
56#include <vm/pmap.h>
57#include <i386/isa/isa.h>
58#include <i386/isa/isa_dma.h>
59#include <i386/isa/ic/i8237.h>
60

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239 if (isa_dmarangecheck(addr, nbytes, chan)) {
240 if (dma_bouncebuf[chan] == NULL
241 || dma_bouncebufsize[chan] < nbytes)
242 panic("isa_dmastart: bad bounce buffer");
243 dma_bounced |= (1 << chan);
244 newaddr = dma_bouncebuf[chan];
245
246 /* copy bounce buffer on write */
52#include <sys/malloc.h>
53#include <vm/vm.h>
54#include <vm/vm_param.h>
55#include <vm/pmap.h>
56#include <i386/isa/isa.h>
57#include <i386/isa/isa_dma.h>
58#include <i386/isa/ic/i8237.h>
59

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238 if (isa_dmarangecheck(addr, nbytes, chan)) {
239 if (dma_bouncebuf[chan] == NULL
240 || dma_bouncebufsize[chan] < nbytes)
241 panic("isa_dmastart: bad bounce buffer");
242 dma_bounced |= (1 << chan);
243 newaddr = dma_bouncebuf[chan];
244
245 /* copy bounce buffer on write */
247 if (!(flags & B_READ))
246 if (!(flags & ISADMA_READ))
248 bcopy(addr, newaddr, nbytes);
249 addr = newaddr;
250 }
251
252 /* translate to physical */
253 phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr);
254
247 bcopy(addr, newaddr, nbytes);
248 addr = newaddr;
249 }
250
251 /* translate to physical */
252 phys = pmap_extract(pmap_kernel(), (vm_offset_t)addr);
253
255 if (flags & B_RAW) {
254 if (flags & ISADMA_RAW) {
256 dma_auto_mode |= (1 << chan);
257 } else {
258 dma_auto_mode &= ~(1 << chan);
259 }
260
261 if ((chan & 4) == 0) {
262 /*
263 * Program one of DMA channels 0..3. These are
264 * byte mode channels.
265 */
266 /* set dma channel mode, and reset address ff */
267
255 dma_auto_mode |= (1 << chan);
256 } else {
257 dma_auto_mode &= ~(1 << chan);
258 }
259
260 if ((chan & 4) == 0) {
261 /*
262 * Program one of DMA channels 0..3. These are
263 * byte mode channels.
264 */
265 /* set dma channel mode, and reset address ff */
266
268 /* If B_RAW flag is set, then use autoinitialise mode */
269 if (flags & B_RAW) {
270 if (flags & B_READ)
267 /* If ISADMA_RAW flag is set, then use autoinitialise mode */
268 if (flags & ISADMA_RAW) {
269 if (flags & ISADMA_READ)
271 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan);
272 else
273 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan);
274 }
275 else
270 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_WRITE|chan);
271 else
272 outb(DMA1_MODE, DMA37MD_AUTO|DMA37MD_READ|chan);
273 }
274 else
276 if (flags & B_READ)
275 if (flags & ISADMA_READ)
277 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
278 else
279 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
280 outb(DMA1_FFC, 0);
281
282 /* send start address */
283 waport = DMA1_CHN(chan);
284 outb(waport, phys);

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293 outb(DMA1_SMSK, chan);
294 } else {
295 /*
296 * Program one of DMA channels 4..7. These are
297 * word mode channels.
298 */
299 /* set dma channel mode, and reset address ff */
300
276 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|chan);
277 else
278 outb(DMA1_MODE, DMA37MD_SINGLE|DMA37MD_READ|chan);
279 outb(DMA1_FFC, 0);
280
281 /* send start address */
282 waport = DMA1_CHN(chan);
283 outb(waport, phys);

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292 outb(DMA1_SMSK, chan);
293 } else {
294 /*
295 * Program one of DMA channels 4..7. These are
296 * word mode channels.
297 */
298 /* set dma channel mode, and reset address ff */
299
301 /* If B_RAW flag is set, then use autoinitialise mode */
302 if (flags & B_RAW) {
303 if (flags & B_READ)
300 /* If ISADMA_RAW flag is set, then use autoinitialise mode */
301 if (flags & ISADMA_RAW) {
302 if (flags & ISADMA_READ)
304 outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3));
305 else
306 outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3));
307 }
308 else
303 outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_WRITE|(chan&3));
304 else
305 outb(DMA2_MODE, DMA37MD_AUTO|DMA37MD_READ|(chan&3));
306 }
307 else
309 if (flags & B_READ)
308 if (flags & ISADMA_READ)
310 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3));
311 else
312 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3));
313 outb(DMA2_FFC, 0);
314
315 /* send start address */
316 waport = DMA2_CHN(chan - 4);
317 outb(waport, phys>>1);

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343 (dma_auto_mode & (1 << chan)) == 0 )
344 printf("isa_dmadone: channel %d not busy\n", chan);
345
346 if ((dma_auto_mode & (1 << chan)) == 0)
347 outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4);
348
349 if (dma_bounced & (1 << chan)) {
350 /* copy bounce buffer on read */
309 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_WRITE|(chan&3));
310 else
311 outb(DMA2_MODE, DMA37MD_SINGLE|DMA37MD_READ|(chan&3));
312 outb(DMA2_FFC, 0);
313
314 /* send start address */
315 waport = DMA2_CHN(chan - 4);
316 outb(waport, phys>>1);

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342 (dma_auto_mode & (1 << chan)) == 0 )
343 printf("isa_dmadone: channel %d not busy\n", chan);
344
345 if ((dma_auto_mode & (1 << chan)) == 0)
346 outb(chan & 4 ? DMA2_SMSK : DMA1_SMSK, (chan & 3) | 4);
347
348 if (dma_bounced & (1 << chan)) {
349 /* copy bounce buffer on read */
351 if (flags & B_READ)
350 if (flags & ISADMA_READ)
352 bcopy(dma_bouncebuf[chan], addr, nbytes);
353
354 dma_bounced &= ~(1 << chan);
355 }
356 dma_busy &= ~(1 << chan);
357}
358
359/*

--- 138 unchanged lines hidden --- 		351 bcopy(dma_bouncebuf[chan], addr, nbytes);
352
353 dma_bounced &= ~(1 << chan);
354 }
355 dma_busy &= ~(1 << chan);
356}
357
358/*

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