| icu.h (93024) | icu.h (93945) |
|---|---|
| 1/*- 2 * Copyright (c) 1990 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * William Jolitz. 7 * 8 * Redistribution and use in source and binary forms, with or without --- 20 unchanged lines hidden (view full) --- 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * from: @(#)icu.h 5.6 (Berkeley) 5/9/91 | 1/*- 2 * Copyright (c) 1990 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * William Jolitz. 7 * 8 * Redistribution and use in source and binary forms, with or without --- 20 unchanged lines hidden (view full) --- 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * from: @(#)icu.h 5.6 (Berkeley) 5/9/91 |
| 37 * $FreeBSD: head/sys/i386/isa/icu.h 93024 2002-03-23 16:01:49Z bde $ | 37 * $FreeBSD: head/sys/i386/isa/icu.h 93945 2002-04-06 08:25:05Z nyan $ |
| 38 */ 39 40/* 41 * AT/386 Interrupt Control constants 42 * W. Jolitz 8/89 43 */ 44 45#ifndef _I386_ISA_ICU_H_ --- 29 unchanged lines hidden (view full) --- 75 * The 8259 versions have to be used in SMP for legacy operation 76 * of the drivers. 77 */ 78#endif /* APIC_IO */ 79 80/* 81 * Interrupt enable bits - in normal order of priority (which we change) 82 */ | 38 */ 39 40/* 41 * AT/386 Interrupt Control constants 42 * W. Jolitz 8/89 43 */ 44 45#ifndef _I386_ISA_ICU_H_ --- 29 unchanged lines hidden (view full) --- 75 * The 8259 versions have to be used in SMP for legacy operation 76 * of the drivers. 77 */ 78#endif /* APIC_IO */ 79 80/* 81 * Interrupt enable bits - in normal order of priority (which we change) 82 */ |
| 83#ifdef PC98 84#define IRQ0 0x0001 85#define IRQ1 0x0002 86#define IRQ2 0x0004 87#define IRQ3 0x0008 88#define IRQ4 0x0010 89#define IRQ5 0x0020 90#define IRQ6 0x0040 91#define IRQ7 0x0080 92#define IRQ_SLAVE 0x0080 93#define IRQ8 0x0100 94#define IRQ9 0x0200 95#define IRQ10 0x0400 96#define IRQ11 0x0800 97#define IRQ12 0x1000 98#define IRQ13 0x2000 99#define IRQ14 0x4000 100#define IRQ15 0x8000 101#else |
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| 83#define IRQ0 0x0001 /* highest priority - timer */ 84#define IRQ1 0x0002 85#define IRQ_SLAVE 0x0004 86#define IRQ8 0x0100 87#define IRQ9 0x0200 88#define IRQ2 IRQ9 89#define IRQ10 0x0400 90#define IRQ11 0x0800 91#define IRQ12 0x1000 92#define IRQ13 0x2000 93#define IRQ14 0x4000 94#define IRQ15 0x8000 95#define IRQ3 0x0008 /* this is highest after rotation */ 96#define IRQ4 0x0010 97#define IRQ5 0x0020 98#define IRQ6 0x0040 99#define IRQ7 0x0080 /* lowest - parallel printer */ | 102#define IRQ0 0x0001 /* highest priority - timer */ 103#define IRQ1 0x0002 104#define IRQ_SLAVE 0x0004 105#define IRQ8 0x0100 106#define IRQ9 0x0200 107#define IRQ2 IRQ9 108#define IRQ10 0x0400 109#define IRQ11 0x0800 110#define IRQ12 0x1000 111#define IRQ13 0x2000 112#define IRQ14 0x4000 113#define IRQ15 0x8000 114#define IRQ3 0x0008 /* this is highest after rotation */ 115#define IRQ4 0x0010 116#define IRQ5 0x0020 117#define IRQ6 0x0040 118#define IRQ7 0x0080 /* lowest - parallel printer */ |
| 100 101#ifdef PC98 102#undef IRQ2 103#define IRQ2 0x0004 104#undef IRQ_SLAVE 105#define IRQ_SLAVE 0x0080 | |
| 106#endif 107 108/* 109 * Interrupt Control offset into Interrupt descriptor table (IDT) 110 */ 111#define ICU_OFFSET 32 /* 0-31 are processor exceptions */ 112 | 119#endif 120 121/* 122 * Interrupt Control offset into Interrupt descriptor table (IDT) 123 */ 124#define ICU_OFFSET 32 /* 0-31 are processor exceptions */ 125 |
| 126#ifdef PC98 127#define ICU_IMR_OFFSET 2 128#define ICU_SLAVEID 7 129#else 130#define ICU_IMR_OFFSET 1 131#define ICU_SLAVEID 2 132#endif 133#define ICU_EOI 0x20 134 |
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| 113#ifdef APIC_IO 114 115/* 32-47: ISA IRQ0-IRQ15, 48-63: IO APIC IRQ16-IRQ31 */ 116#define ICU_LEN 32 117#define HWI_MASK 0xffffffff /* bits for h/w interrupts */ 118#define NHWI 32 119 120#else 121 122#define ICU_LEN 16 /* 32-47 are ISA interrupts */ 123#define HWI_MASK 0xffff /* bits for h/w interrupts */ 124#define NHWI 16 125 126#endif /* APIC_IO */ 127 128#define INTRCNT_COUNT (1 + ICU_LEN + 2 * ICU_LEN) 129 130#endif /* !_I386_ISA_ICU_H_ */ | 135#ifdef APIC_IO 136 137/* 32-47: ISA IRQ0-IRQ15, 48-63: IO APIC IRQ16-IRQ31 */ 138#define ICU_LEN 32 139#define HWI_MASK 0xffffffff /* bits for h/w interrupts */ 140#define NHWI 32 141 142#else 143 144#define ICU_LEN 16 /* 32-47 are ISA interrupts */ 145#define HWI_MASK 0xffff /* bits for h/w interrupts */ 146#define NHWI 16 147 148#endif /* APIC_IO */ 149 150#define INTRCNT_COUNT (1 + ICU_LEN + 2 * ICU_LEN) 151 152#endif /* !_I386_ISA_ICU_H_ */ |