Deleted Added
sdiff udiff text old ( 25204 ) new ( 26269 )
full compact
apicreg.h (25204) apicreg.h (26269)
1/*
2 * Copyright (c) 1996, by Peter Wemm and Steve Passe
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 8 unchanged lines hidden (view full) ---

17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 *
1/*
2 * Copyright (c) 1996, by Peter Wemm and Steve Passe
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 8 unchanged lines hidden (view full) ---

17 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
18 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
19 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
20 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
21 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
23 * SUCH DAMAGE.
24 *
25 * $Id: apic.h,v 1.1 1997/04/26 11:45:32 peter Exp $
25 * $Id: apic.h,v 1.1 1997/05/28 19:43:45 smp Exp smp $
26 */
27
28#ifndef _MACHINE_APIC_H_
29#define _MACHINE_APIC_H_
30
31/*
32 * Local && I/O APIC definitions.
33 */

--- 82 unchanged lines hidden (view full) ---

116/**
117 * this enables code concerned with handling more than one IO APIC.
118 * Note: this is NOT READY for use!
119 *
120#define MULTIPLE_IOAPICS
121 */
122
123/******************************************************************************
26 */
27
28#ifndef _MACHINE_APIC_H_
29#define _MACHINE_APIC_H_
30
31/*
32 * Local && I/O APIC definitions.
33 */

--- 82 unchanged lines hidden (view full) ---

116/**
117 * this enables code concerned with handling more than one IO APIC.
118 * Note: this is NOT READY for use!
119 *
120#define MULTIPLE_IOAPICS
121 */
122
123/******************************************************************************
124 * LOCAL APIC structure
125 */
126
127#ifndef LOCORE
128#include <sys/types.h>
129
130#define PAD3 int : 32; int : 32; int : 32
131#define PAD4 int : 32; int : 32; int : 32; int : 32
132
133struct LAPIC {
134 /* reserved */ PAD4;
135 /* reserved */ PAD4;
136 u_int32_t id; PAD3;
137 u_int32_t version; PAD3;
138 /* reserved */ PAD4;
139 /* reserved */ PAD4;
140 /* reserved */ PAD4;
141 /* reserved */ PAD4;
142 u_int32_t tpr; PAD3;
143 u_int32_t apr; PAD3;
144 u_int32_t ppr; PAD3;
145 u_int32_t eoi; PAD3;
146 /* reserved */ PAD4;
147 u_int32_t ldr; PAD3;
148 u_int32_t dfr; PAD3;
149 u_int32_t svr; PAD3;
150 u_int32_t isr0; PAD3;
151 u_int32_t isr1; PAD3;
152 u_int32_t isr2; PAD3;
153 u_int32_t isr3; PAD3;
154 u_int32_t isr4; PAD3;
155 u_int32_t isr5; PAD3;
156 u_int32_t isr6; PAD3;
157 u_int32_t isr7; PAD3;
158 u_int32_t tmr0; PAD3;
159 u_int32_t tmr1; PAD3;
160 u_int32_t tmr2; PAD3;
161 u_int32_t tmr3; PAD3;
162 u_int32_t tmr4; PAD3;
163 u_int32_t tmr5; PAD3;
164 u_int32_t tmr6; PAD3;
165 u_int32_t tmr7; PAD3;
166 u_int32_t irr0; PAD3;
167 u_int32_t irr1; PAD3;
168 u_int32_t irr2; PAD3;
169 u_int32_t irr3; PAD3;
170 u_int32_t irr4; PAD3;
171 u_int32_t irr5; PAD3;
172 u_int32_t irr6; PAD3;
173 u_int32_t irr7; PAD3;
174 u_int32_t esr; PAD3;
175 /* reserved */ PAD4;
176 /* reserved */ PAD4;
177 /* reserved */ PAD4;
178 /* reserved */ PAD4;
179 /* reserved */ PAD4;
180 /* reserved */ PAD4;
181 /* reserved */ PAD4;
182 u_int32_t icr_lo; PAD3;
183 u_int32_t icr_hi; PAD3;
184 u_int32_t lvt_timer; PAD3;
185 /* reserved */ PAD4;
186 u_int32_t lvt_pcint; PAD3;
187 u_int32_t lvt_lint0; PAD3;
188 u_int32_t lvt_lint1; PAD3;
189 u_int32_t lvt_error; PAD3;
190 u_int32_t icr_timer; PAD3;
191 u_int32_t ccr_timer; PAD3;
192 /* reserved */ PAD4;
193 /* reserved */ PAD4;
194 /* reserved */ PAD4;
195 /* reserved */ PAD4;
196 u_int32_t dcr_timer; PAD3;
197 /* reserved */ PAD4;
198};
199
200typedef struct LAPIC lapic_t;
201
202/******************************************************************************
203 * I/O APIC structure
204 */
205
206struct IOAPIC {
207 u_int32_t ioregsel; PAD3;
208 u_int32_t iowin; PAD3;
209};
210
211typedef struct IOAPIC ioapic_t;
212
213#undef PAD4
214#undef PAD3
215
216#endif /* LOCORE */
217
218
219/******************************************************************************
124 * LOCAL APIC defines
125 */
126
127/* default physical locations of LOCAL (CPU) APICs */
128#define DEFAULT_APIC_BASE 0xfee00000
129
130# if defined(LOCORE)
131

--- 24 unchanged lines hidden (view full) ---

156#define APIC_LVT2 0x360
157#define APIC_LVT3 0x370
158#define APIC_TICR 0x380
159#define APIC_TCCR 0x390
160#define APIC_TDCR 0x3e0
161
162# else /* !LOCORE */
163
220 * LOCAL APIC defines
221 */
222
223/* default physical locations of LOCAL (CPU) APICs */
224#define DEFAULT_APIC_BASE 0xfee00000
225
226# if defined(LOCORE)
227

--- 24 unchanged lines hidden (view full) ---

252#define APIC_LVT2 0x360
253#define APIC_LVT3 0x370
254#define APIC_TICR 0x380
255#define APIC_TCCR 0x390
256#define APIC_TDCR 0x3e0
257
258# else /* !LOCORE */
259
260#if 0 /** XXX APIC_STRUCT */
164/* offsets in apic_base[] */
165#define APIC_ID (0x020/4)
166#define APIC_VER (0x030/4)
167#define APIC_TPR (0x080/4)
168#define APIC_APR (0x090/4)
169#define APIC_PPR (0x0a0/4)
170#define APIC_EOI (0x0b0/4)
171#define APIC_RR (0x0c0/4)

--- 14 unchanged lines hidden (view full) ---

186#define APIC_ICR_HI (0x310/4)
187#define APIC_LVTT (0x320/4)
188#define APIC_LVT1 (0x350/4)
189#define APIC_LVT2 (0x360/4)
190#define APIC_LVT3 (0x370/4)
191#define APIC_TICR (0x380/4)
192#define APIC_TCCR (0x390/4)
193#define APIC_TDCR (0x3e0/4)
261/* offsets in apic_base[] */
262#define APIC_ID (0x020/4)
263#define APIC_VER (0x030/4)
264#define APIC_TPR (0x080/4)
265#define APIC_APR (0x090/4)
266#define APIC_PPR (0x0a0/4)
267#define APIC_EOI (0x0b0/4)
268#define APIC_RR (0x0c0/4)

--- 14 unchanged lines hidden (view full) ---

283#define APIC_ICR_HI (0x310/4)
284#define APIC_LVTT (0x320/4)
285#define APIC_LVT1 (0x350/4)
286#define APIC_LVT2 (0x360/4)
287#define APIC_LVT3 (0x370/4)
288#define APIC_TICR (0x380/4)
289#define APIC_TCCR (0x390/4)
290#define APIC_TDCR (0x3e0/4)
291#endif /** XXX APIC_STRUCT */
194
195# endif /* LOCORE */
196
197
198/* fields in VER */
199#define APIC_VER_VERSION 0x000000ff
200#define APIC_VER_MAXLVT 0x00ff0000
201#define MAXLVTSHIFT 16

--- 196 unchanged lines hidden (view full) ---

398# define IOART_DELRSV1 0x00000300 /* reserved */
399# define IOART_DELNMI 0x00000400 /* NMI signal */
400# define IOART_DELINIT 0x00000500 /* INIT signal */
401# define IOART_DELRSV2 0x00000600 /* reserved */
402# define IOART_DELEXINT 0x00000700 /* External INTerrupt */
403
404#define IOART_INTVEC 0x000000ff /* R/W: INTerrupt vector field */
405
292
293# endif /* LOCORE */
294
295
296/* fields in VER */
297#define APIC_VER_VERSION 0x000000ff
298#define APIC_VER_MAXLVT 0x00ff0000
299#define MAXLVTSHIFT 16

--- 196 unchanged lines hidden (view full) ---

496# define IOART_DELRSV1 0x00000300 /* reserved */
497# define IOART_DELNMI 0x00000400 /* NMI signal */
498# define IOART_DELINIT 0x00000500 /* INIT signal */
499# define IOART_DELRSV2 0x00000600 /* reserved */
500# define IOART_DELEXINT 0x00000700 /* External INTerrupt */
501
502#define IOART_INTVEC 0x000000ff /* R/W: INTerrupt vector field */
503
504/**
505 * XXX FIXME: temproary defines till we get private pages...
506 */
507#if 1 /** XXX APIC_STRUCT */
508
509/* XXX when automatically mapped to a virtual page */
510#define lapic__id lapic->id
511#define lapic__version lapic->version
512#define lapic__eoi lapic->eoi
513#define lapic__irr1 lapic->irr1
514#define lapic__lvt_lint0 lapic->lvt_lint0
515#define lapic__lvt_lint1 lapic->lvt_lint1
516#define lapic__tpr lapic->tpr
517#define lapic__svr lapic->svr
518#define lapic__icr_lo lapic->icr_lo
519#define lapic__icr_hi lapic->icr_hi
520#define lapic__dcr_timer lapic->dcr_timer
521#define lapic__lvt_timer lapic->lvt_timer
522#define lapic__icr_timer lapic->icr_timer
523#define lapic__ccr_timer lapic->ccr_timer
524
525#else
526
527/* XXX when mapped to a known virtual address */
528#define lapic__id lapic.id
529#define lapic__version lapic.version
530#define lapic__eoi lapic.eoi
531#define lapic__irr1 lapic.irr1
532#define lapic__lvt_lint0 lapic.lvt_lint0
533#define lapic__lvt_lint1 lapic.lvt_lint1
534#define lapic__tpr lapic.tpr
535#define lapic__svr lapic.svr
536#define lapic__icr_lo lapic.icr_lo
537#define lapic__icr_hi lapic.icr_hi
538#define lapic__dcr_timer lapic.dcr_timer
539#define lapic__lvt_timer lapic.lvt_timer
540#define lapic__icr_timer lapic.icr_timer
541#define lapic__ccr_timer lapic.ccr_timer
542
543#endif /** XXX APIC_STRUCT */
544
406#endif /* _MACHINE_APIC_H_ */
545#endif /* _MACHINE_APIC_H_ */