| est.c (176714) | est.c (177040) |
|---|---|
| 1/*- 2 * Copyright (c) 2004 Colin Percival 3 * Copyright (c) 2005 Nate Lawson 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted providing that the following conditions 8 * are met: --- 12 unchanged lines hidden (view full) --- 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 23 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 24 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2004 Colin Percival 3 * Copyright (c) 2005 Nate Lawson 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted providing that the following conditions 8 * are met: --- 12 unchanged lines hidden (view full) --- 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 23 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 24 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 25 * POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28#include <sys/cdefs.h> |
| 29__FBSDID("$FreeBSD: head/sys/i386/cpufreq/est.c 176714 2008-03-01 21:58:34Z gibbs $"); | 29__FBSDID("$FreeBSD: head/sys/i386/cpufreq/est.c 177040 2008-03-10 22:00:35Z jhb $"); |
| 30 31#include <sys/param.h> 32#include <sys/bus.h> 33#include <sys/cpu.h> 34#include <sys/kernel.h> 35#include <sys/malloc.h> 36#include <sys/module.h> 37#include <sys/smp.h> 38#include <sys/systm.h> 39 40#include "cpufreq_if.h" 41#include <machine/md_var.h> | 30 31#include <sys/param.h> 32#include <sys/bus.h> 33#include <sys/cpu.h> 34#include <sys/kernel.h> 35#include <sys/malloc.h> 36#include <sys/module.h> 37#include <sys/smp.h> 38#include <sys/systm.h> 39 40#include "cpufreq_if.h" 41#include <machine/md_var.h> |
| 42#include <machine/specialreg.h> |
|
| 42 43#include <contrib/dev/acpica/acpi.h> 44#include <dev/acpica/acpivar.h> 45#include "acpi_if.h" 46 47/* Status/control registers (from the IA-32 System Programming Guide). */ 48#define MSR_PERF_STATUS 0x198 49#define MSR_PERF_CTL 0x199 --- 891 unchanged lines hidden (view full) --- 941 *features = ACPI_CAP_PERF_MSRS; 942 return (0); 943} 944 945static void 946est_identify(driver_t *driver, device_t parent) 947{ 948 device_t child; | 43 44#include <contrib/dev/acpica/acpi.h> 45#include <dev/acpica/acpivar.h> 46#include "acpi_if.h" 47 48/* Status/control registers (from the IA-32 System Programming Guide). */ 49#define MSR_PERF_STATUS 0x198 50#define MSR_PERF_CTL 0x199 --- 891 unchanged lines hidden (view full) --- 942 *features = ACPI_CAP_PERF_MSRS; 943 return (0); 944} 945 946static void 947est_identify(driver_t *driver, device_t parent) 948{ 949 device_t child; |
| 949 u_int p[4]; | |
| 950 951 /* Make sure we're not being doubly invoked. */ 952 if (device_find_child(parent, "est", -1) != NULL) 953 return; 954 955 /* Check that CPUID is supported and the vendor is Intel.*/ 956 if (cpu_high == 0 || (strcmp(cpu_vendor, intel_id) != 0 && 957 strcmp(cpu_vendor, centaur_id) != 0)) 958 return; 959 960 /* | 950 951 /* Make sure we're not being doubly invoked. */ 952 if (device_find_child(parent, "est", -1) != NULL) 953 return; 954 955 /* Check that CPUID is supported and the vendor is Intel.*/ 956 if (cpu_high == 0 || (strcmp(cpu_vendor, intel_id) != 0 && 957 strcmp(cpu_vendor, centaur_id) != 0)) 958 return; 959 960 /* |
| 961 * Read capability bits and check if the CPU supports EST. 962 * This is indicated by bit 7 of ECX. | 961 * Check if the CPU supports EST. |
| 963 */ | 962 */ |
| 964 do_cpuid(1, p); 965 if ((p[2] & 0x80) == 0) | 963 if (!(cpu_feature2 & CPUID2_EST)) |
| 966 return; 967 968 /* 969 * We add a child for each CPU since settings must be performed 970 * on each CPU in the SMP case. 971 */ 972 child = BUS_ADD_CHILD(parent, 0, "est", -1); 973 if (child == NULL) --- 54 unchanged lines hidden (view full) --- 1028 1029 cpufreq_register(dev); 1030 return (0); 1031} 1032 1033static int 1034est_detach(device_t dev) 1035{ | 964 return; 965 966 /* 967 * We add a child for each CPU since settings must be performed 968 * on each CPU in the SMP case. 969 */ 970 child = BUS_ADD_CHILD(parent, 0, "est", -1); 971 if (child == NULL) --- 54 unchanged lines hidden (view full) --- 1026 1027 cpufreq_register(dev); 1028 return (0); 1029} 1030 1031static int 1032est_detach(device_t dev) 1033{ |
| 1034#if 0 |
|
| 1036 struct est_softc *sc; 1037 1038 sc = device_get_softc(dev); 1039 if (sc->acpi_settings) 1040 free(sc->freq_list, M_DEVBUF); | 1035 struct est_softc *sc; 1036 1037 sc = device_get_softc(dev); 1038 if (sc->acpi_settings) 1039 free(sc->freq_list, M_DEVBUF); |
| 1040#endif |
|
| 1041 return (ENXIO); 1042} 1043 1044/* 1045 * Probe for supported CPU settings. First, check our static table of 1046 * settings. If no match, try using the ones offered by acpi_perf 1047 * (i.e., _PSS). We use ACPI second because some systems (IBM R/T40 1048 * series) export both legacy SMM IO-based access and direct MSR access --- 249 unchanged lines hidden --- | 1041 return (ENXIO); 1042} 1043 1044/* 1045 * Probe for supported CPU settings. First, check our static table of 1046 * settings. If no match, try using the ones offered by acpi_perf 1047 * (i.e., _PSS). We use ACPI second because some systems (IBM R/T40 1048 * series) export both legacy SMM IO-based access and direct MSR access --- 249 unchanged lines hidden --- |