| mp_exception.S (89051) | mp_exception.S (91783) |
|---|---|
| 1/*- 2 * Copyright (c) 2002 Jake Burkholder. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * | 1/*- 2 * Copyright (c) 2002 Jake Burkholder. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * |
| 26 * $FreeBSD: head/sys/sparc64/sparc64/mp_exception.S 89051 2002-01-08 05:50:26Z jake $ | 26 * $FreeBSD: head/sys/sparc64/sparc64/mp_exception.S 91783 2002-03-07 06:01:40Z jake $ |
| 27 */ 28 29#include <machine/asi.h> 30#include <machine/ktr.h> 31#include <machine/asmacros.h> 32#include <machine/pstate.h> 33 34#include "assym.s" 35 36 .register %g2, #ignore 37 .register %g3, #ignore 38 | 27 */ 28 29#include <machine/asi.h> 30#include <machine/ktr.h> 31#include <machine/asmacros.h> 32#include <machine/pstate.h> 33 34#include "assym.s" 35 36 .register %g2, #ignore 37 .register %g3, #ignore 38 |
| 39#if 0 |
|
| 39#define IPI_WAIT(r1, r2, r3) \ 40 ATOMIC_DEC_INT(r1, r2, r3) ; \ | 40#define IPI_WAIT(r1, r2, r3) \ 41 ATOMIC_DEC_INT(r1, r2, r3) ; \ |
| 419: membar #StoreLoad ; \ 42 lduw [r1], r2 ; \ | 429: lduw [r1], r2 ; \ |
| 43 brnz,a,pn r2, 9b ; \ 44 nop | 43 brnz,a,pn r2, 9b ; \ 44 nop |
| 45#else 46#define IPI_WAIT(r1, r2, r3) 47#endif |
|
| 45 46/* 47 * Trigger a softint at the desired level. 48 */ 49ENTRY(tl_ipi_level) 50 lduw [%g5 + ILA_LEVEL], %g2 51 52 mov 1, %g1 --- 18 unchanged lines hidden (view full) --- 71#endif 72 retry 73END(tl_ipi_test) 74 75/* 76 * Demap a page from the dtlb and/or itlb. 77 */ 78ENTRY(tl_ipi_tlb_page_demap) | 48 49/* 50 * Trigger a softint at the desired level. 51 */ 52ENTRY(tl_ipi_level) 53 lduw [%g5 + ILA_LEVEL], %g2 54 55 mov 1, %g1 --- 18 unchanged lines hidden (view full) --- 74#endif 75 retry 76END(tl_ipi_test) 77 78/* 79 * Demap a page from the dtlb and/or itlb. 80 */ 81ENTRY(tl_ipi_tlb_page_demap) |
| 79 ldx [%g5 + ITA_TLB], %g1 80 ldx [%g5 + ITA_CTX], %g2 81 ldx [%g5 + ITA_VA], %g3 | 82#if KTR_COMPILE & KTR_SMP 83 CATR(KTR_SMP, "ipi_tlb_page_demap: pm=%p va=%#lx" 84 , %g1, %g2, %g3, 7, 8, 9) 85 ldx [%g5 + ITA_PMAP], %g2 86 stx %g2, [%g1 + KTR_PARM1] 87 ldx [%g5 + ITA_VA], %g2 88 stx %g2, [%g1 + KTR_PARM2] 899: 90#endif |
| 82 | 91 |
| 83 wr %g0, ASI_DMMU, %asi | 92 ldx [%g5 + ITA_PMAP], %g1 |
| 84 | 93 |
| 85 brz,a,pt %g2, 1f 86 or %g3, TLB_DEMAP_NUCLEUS | TLB_DEMAP_PAGE, %g3 | 94 SET(kernel_pmap_store, %g3, %g2) 95 mov TLB_DEMAP_NUCLEUS | TLB_DEMAP_PAGE, %g3 |
| 87 | 96 |
| 88 stxa %g2, [%g0 + AA_DMMU_SCXR] %asi 89 membar #Sync 90 or %g3, TLB_DEMAP_SECONDARY | TLB_DEMAP_PAGE, %g3 | 97 cmp %g1, %g2 98 movne %xcc, TLB_DEMAP_PRIMARY | TLB_DEMAP_PAGE, %g3 |
| 91 | 99 |
| 921: andcc %g1, TLB_DTLB, %g0 93 bz,a,pn %xcc, 2f 94 nop 95 stxa %g0, [%g3] ASI_DMMU_DEMAP | 100 ldx [%g5 + ITA_TLB], %g1 101 ldx [%g5 + ITA_VA], %g2 102 or %g2, %g3, %g2 |
| 96 | 103 |
| 972: andcc %g1, TLB_ITLB, %g0 98 bz,a,pn %xcc, 3f | 104 andcc %g1, TLB_DTLB, %g0 105 bz,a,pn %xcc, 1f |
| 99 nop | 106 nop |
| 100 stxa %g0, [%g3] ASI_IMMU_DEMAP | 107 stxa %g0, [%g2] ASI_DMMU_DEMAP 108 membar #Sync |
| 101 | 109 |
| 1023: brz,a,pt %g2, 4f | 1101: andcc %g1, TLB_ITLB, %g0 111 bz,a,pn %xcc, 2f |
| 103 nop | 112 nop |
| 104 stxa %g0, [%g0 + AA_DMMU_SCXR] %asi | 113 stxa %g0, [%g2] ASI_IMMU_DEMAP 114 membar #Sync |
| 105 | 115 |
| 1064: membar #Sync 107 108 IPI_WAIT(%g5, %g1, %g2) | 1162: IPI_WAIT(%g5, %g1, %g2) |
| 109 retry 110END(tl_ipi_tlb_page_demap) 111 112/* 113 * Demap a range of pages from the dtlb and itlb. 114 */ 115ENTRY(tl_ipi_tlb_range_demap) | 117 retry 118END(tl_ipi_tlb_page_demap) 119 120/* 121 * Demap a range of pages from the dtlb and itlb. 122 */ 123ENTRY(tl_ipi_tlb_range_demap) |
| 116 ldx [%g5 + ITA_CTX], %g1 | 124#if KTR_COMPILE & KTR_SMP 125 CATR(KTR_SMP, "ipi_tlb_range_demap: pm=%p start=%#lx end=%#lx" 126 , %g1, %g2, %g3, 7, 8, 9) 127 ldx [%g5 + ITA_PMAP], %g2 128 stx %g2, [%g1 + KTR_PARM1] |
| 117 ldx [%g5 + ITA_START], %g2 | 129 ldx [%g5 + ITA_START], %g2 |
| 118 ldx [%g5 + ITA_END], %g3 | 130 stx %g2, [%g1 + KTR_PARM2] 131 ldx [%g5 + ITA_END], %g2 132 stx %g2, [%g1 + KTR_PARM3] 1339: 134#endif |
| 119 | 135 |
| 120 wr %g0, ASI_DMMU, %asi | 136 ldx [%g5 + ITA_PMAP], %g1 |
| 121 | 137 |
| 122 brz,a,pt %g1, 1f 123 mov TLB_DEMAP_NUCLEUS | TLB_DEMAP_PAGE, %g4 | 138 SET(kernel_pmap_store, %g3, %g2) 139 mov TLB_DEMAP_NUCLEUS | TLB_DEMAP_PAGE, %g3 |
| 124 | 140 |
| 125 stxa %g1, [%g0 + AA_DMMU_SCXR] %asi 126 membar #Sync 127 mov TLB_DEMAP_SECONDARY | TLB_DEMAP_PAGE, %g4 | 141 cmp %g1, %g2 142 movne %xcc, TLB_DEMAP_PRIMARY | TLB_DEMAP_PAGE, %g3 |
| 128 | 143 |
| 1291: set PAGE_SIZE, %g5 | 144 ldx [%g5 + ITA_START], %g1 145 ldx [%g5 + ITA_END], %g2 |
| 130 | 146 |
| 1312: or %g4, %g2, %g4 | 147 set PAGE_SIZE, %g6 148 1491: or %g1, %g3, %g4 |
| 132 stxa %g0, [%g4] ASI_DMMU_DEMAP 133 stxa %g0, [%g4] ASI_IMMU_DEMAP | 150 stxa %g0, [%g4] ASI_DMMU_DEMAP 151 stxa %g0, [%g4] ASI_IMMU_DEMAP |
| 152 membar #Sync |
|
| 134 | 153 |
| 135 add %g2, %g5, %g2 136 cmp %g2, %g3 137 bne,a,pt %xcc, 2b | 154 add %g1, %g6, %g1 155 cmp %g1, %g2 156 blt,a,pt %xcc, 1b |
| 138 nop 139 | 157 nop 158 |
| 140 brz,a,pt %g1, 3f 141 nop 142 stxa %g0, [%g0 + AA_DMMU_SCXR] %asi 143 1443: membar #Sync 145 | |
| 146 IPI_WAIT(%g5, %g1, %g2) 147 retry 148END(tl_ipi_tlb_range_demap) 149 150/* | 159 IPI_WAIT(%g5, %g1, %g2) 160 retry 161END(tl_ipi_tlb_range_demap) 162 163/* |
| 151 * Demap an entire context from the dtlb and itlb. | 164 * Demap the primary context from the dtlb and itlb. |
| 152 */ 153ENTRY(tl_ipi_tlb_context_demap) | 165 */ 166ENTRY(tl_ipi_tlb_context_demap) |
| 154 ldx [%g5 + ITA_CTX], %g1 | 167#if KTR_COMPILE & KTR_SMP 168 CATR(KTR_SMP, "ipi_tlb_page_demap: pm=%p va=%#lx" 169 , %g1, %g2, %g3, 7, 8, 9) 170 ldx [%g5 + ITA_PMAP], %g2 171 stx %g2, [%g1 + KTR_PARM1] 172 ldx [%g5 + ITA_VA], %g2 173 stx %g2, [%g1 + KTR_PARM2] 1749: 175#endif |
| 155 | 176 |
| 156 mov AA_DMMU_SCXR, %g2 157 stxa %g1, [%g2] ASI_DMMU | 177 mov TLB_DEMAP_PRIMARY | TLB_DEMAP_CONTEXT, %g1 178 stxa %g0, [%g1] ASI_DMMU_DEMAP 179 stxa %g0, [%g1] ASI_IMMU_DEMAP |
| 158 membar #Sync 159 | 180 membar #Sync 181 |
| 160 mov TLB_DEMAP_SECONDARY | TLB_DEMAP_CONTEXT, %g3 161 stxa %g0, [%g3] ASI_DMMU_DEMAP 162 stxa %g0, [%g3] ASI_IMMU_DEMAP 163 164 stxa %g0, [%g2] ASI_DMMU 165 membar #Sync 166 | |
| 167 IPI_WAIT(%g5, %g1, %g2) 168 retry 169END(tl_ipi_tlb_context_demap) | 182 IPI_WAIT(%g5, %g1, %g2) 183 retry 184END(tl_ipi_tlb_context_demap) |