psycho.c (139825) | psycho.c (152696) |
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1/*- 2 * Copyright (c) 1999, 2000 Matthew R. Green 3 * Copyright (c) 2001 - 2003 by Thomas Moestl <tmm@FreeBSD.org> 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 13 unchanged lines hidden (view full) --- 22 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 23 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 24 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * from: NetBSD: psycho.c,v 1.39 2001/10/07 20:30:41 eeh Exp | 1/*- 2 * Copyright (c) 1999, 2000 Matthew R. Green 3 * Copyright (c) 2001 - 2003 by Thomas Moestl <tmm@FreeBSD.org> 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 13 unchanged lines hidden (view full) --- 22 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 23 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 24 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * from: NetBSD: psycho.c,v 1.39 2001/10/07 20:30:41 eeh Exp |
30 * 31 * $FreeBSD: head/sys/sparc64/pci/psycho.c 139825 2005-01-07 02:29:27Z imp $ | |
32 */ 33 | 30 */ 31 |
32#include <sys/cdefs.h> 33__FBSDID("$FreeBSD: head/sys/sparc64/pci/psycho.c 152696 2005-11-22 21:34:26Z marius $"); 34 |
|
34/* | 35/* |
35 * Support for `psycho' and `psycho+' UPA to PCI bridge and 36 * UltraSPARC IIi and IIe `sabre' PCI controllers. | 36 * Support for `Psycho' and `Psycho+' UPA to PCI bridge and 37 * UltraSPARC IIi and IIe `Sabre' PCI controllers |
37 */ 38 39#include "opt_ofw_pci.h" 40#include "opt_psycho.h" 41 42#include <sys/param.h> 43#include <sys/systm.h> 44#include <sys/bus.h> --- 6 unchanged lines hidden (view full) --- 51#include <dev/ofw/ofw_bus.h> 52#include <dev/ofw/ofw_pci.h> 53#include <dev/ofw/openfirm.h> 54 55#include <machine/bus.h> 56#include <machine/bus_private.h> 57#include <machine/iommureg.h> 58#include <machine/bus_common.h> | 38 */ 39 40#include "opt_ofw_pci.h" 41#include "opt_psycho.h" 42 43#include <sys/param.h> 44#include <sys/systm.h> 45#include <sys/bus.h> --- 6 unchanged lines hidden (view full) --- 52#include <dev/ofw/ofw_bus.h> 53#include <dev/ofw/ofw_pci.h> 54#include <dev/ofw/openfirm.h> 55 56#include <machine/bus.h> 57#include <machine/bus_private.h> 58#include <machine/iommureg.h> 59#include <machine/bus_common.h> |
59#include <machine/frame.h> 60#include <machine/intr_machdep.h> | |
61#include <machine/nexusvar.h> 62#include <machine/ofw_bus.h> 63#include <machine/ofw_upa.h> 64#include <machine/resource.h> 65 66#include <sys/rman.h> 67 68#include <machine/iommuvar.h> 69 70#include <dev/pci/pcivar.h> | 60#include <machine/nexusvar.h> 61#include <machine/ofw_bus.h> 62#include <machine/ofw_upa.h> 63#include <machine/resource.h> 64 65#include <sys/rman.h> 66 67#include <machine/iommuvar.h> 68 69#include <dev/pci/pcivar.h> |
71#include <dev/pci/pcireg.h> | |
72 73#include <sparc64/pci/ofw_pci.h> 74#include <sparc64/pci/psychoreg.h> 75#include <sparc64/pci/psychovar.h> 76 77#include "pcib_if.h" 78 | 70 71#include <sparc64/pci/ofw_pci.h> 72#include <sparc64/pci/psychoreg.h> 73#include <sparc64/pci/psychovar.h> 74 75#include "pcib_if.h" 76 |
77static const struct psycho_desc *psycho_find_desc(const struct psycho_desc *, 78 const char *); 79static const struct psycho_desc *psycho_get_desc(phandle_t, const char *); |
|
79static void psycho_set_intr(struct psycho_softc *, int, device_t, bus_addr_t, 80 int, driver_intr_t); 81static int psycho_find_intrmap(struct psycho_softc *, int, bus_addr_t *, 82 bus_addr_t *, u_long *); 83static void psycho_intr_stub(void *); 84static bus_space_tag_t psycho_alloc_bus_tag(struct psycho_softc *, int); 85 86/* Interrupt handlers */ --- 5 unchanged lines hidden (view full) --- 92#ifdef PSYCHO_MAP_WAKEUP 93static void psycho_wakeup(void *); 94#endif 95 96/* IOMMU support */ 97static void psycho_iommu_init(struct psycho_softc *, int); 98 99/* | 80static void psycho_set_intr(struct psycho_softc *, int, device_t, bus_addr_t, 81 int, driver_intr_t); 82static int psycho_find_intrmap(struct psycho_softc *, int, bus_addr_t *, 83 bus_addr_t *, u_long *); 84static void psycho_intr_stub(void *); 85static bus_space_tag_t psycho_alloc_bus_tag(struct psycho_softc *, int); 86 87/* Interrupt handlers */ --- 5 unchanged lines hidden (view full) --- 93#ifdef PSYCHO_MAP_WAKEUP 94static void psycho_wakeup(void *); 95#endif 96 97/* IOMMU support */ 98static void psycho_iommu_init(struct psycho_softc *, int); 99 100/* |
100 * Methods. | 101 * Methods |
101 */ 102static device_probe_t psycho_probe; 103static device_attach_t psycho_attach; 104static bus_read_ivar_t psycho_read_ivar; 105static bus_setup_intr_t psycho_setup_intr; 106static bus_teardown_intr_t psycho_teardown_intr; 107static bus_alloc_resource_t psycho_alloc_resource; 108static bus_activate_resource_t psycho_activate_resource; --- 11 unchanged lines hidden (view full) --- 120static device_method_t psycho_methods[] = { 121 /* Device interface */ 122 DEVMETHOD(device_probe, psycho_probe), 123 DEVMETHOD(device_attach, psycho_attach), 124 125 /* Bus interface */ 126 DEVMETHOD(bus_print_child, bus_generic_print_child), 127 DEVMETHOD(bus_read_ivar, psycho_read_ivar), | 102 */ 103static device_probe_t psycho_probe; 104static device_attach_t psycho_attach; 105static bus_read_ivar_t psycho_read_ivar; 106static bus_setup_intr_t psycho_setup_intr; 107static bus_teardown_intr_t psycho_teardown_intr; 108static bus_alloc_resource_t psycho_alloc_resource; 109static bus_activate_resource_t psycho_activate_resource; --- 11 unchanged lines hidden (view full) --- 121static device_method_t psycho_methods[] = { 122 /* Device interface */ 123 DEVMETHOD(device_probe, psycho_probe), 124 DEVMETHOD(device_attach, psycho_attach), 125 126 /* Bus interface */ 127 DEVMETHOD(bus_print_child, bus_generic_print_child), 128 DEVMETHOD(bus_read_ivar, psycho_read_ivar), |
128 DEVMETHOD(bus_setup_intr, psycho_setup_intr), | 129 DEVMETHOD(bus_setup_intr, psycho_setup_intr), |
129 DEVMETHOD(bus_teardown_intr, psycho_teardown_intr), 130 DEVMETHOD(bus_alloc_resource, psycho_alloc_resource), 131 DEVMETHOD(bus_activate_resource, psycho_activate_resource), 132 DEVMETHOD(bus_deactivate_resource, psycho_deactivate_resource), 133 DEVMETHOD(bus_release_resource, psycho_release_resource), 134 135 /* pcib interface */ 136 DEVMETHOD(pcib_maxslots, psycho_maxslots), --- 22 unchanged lines hidden (view full) --- 159 160DRIVER_MODULE(psycho, nexus, psycho_driver, psycho_devclass, 0, 0); 161 162SLIST_HEAD(, psycho_softc) psycho_softcs = 163 SLIST_HEAD_INITIALIZER(psycho_softcs); 164 165struct psycho_clr { 166 struct psycho_softc *pci_sc; | 130 DEVMETHOD(bus_teardown_intr, psycho_teardown_intr), 131 DEVMETHOD(bus_alloc_resource, psycho_alloc_resource), 132 DEVMETHOD(bus_activate_resource, psycho_activate_resource), 133 DEVMETHOD(bus_deactivate_resource, psycho_deactivate_resource), 134 DEVMETHOD(bus_release_resource, psycho_release_resource), 135 136 /* pcib interface */ 137 DEVMETHOD(pcib_maxslots, psycho_maxslots), --- 22 unchanged lines hidden (view full) --- 160 161DRIVER_MODULE(psycho, nexus, psycho_driver, psycho_devclass, 0, 0); 162 163SLIST_HEAD(, psycho_softc) psycho_softcs = 164 SLIST_HEAD_INITIALIZER(psycho_softcs); 165 166struct psycho_clr { 167 struct psycho_softc *pci_sc; |
167 bus_addr_t pci_clr; /* clear register */ 168 driver_intr_t *pci_handler; /* handler to call */ 169 void *pci_arg; /* argument for the handler */ 170 void *pci_cookie; /* interrupt cookie of parent bus */ | 168 bus_addr_t pci_clr; /* clear register */ 169 driver_intr_t *pci_handler; /* handler to call */ 170 void *pci_arg; /* argument for the handler */ 171 void *pci_cookie; /* parent bus int. cookie */ |
171}; 172 | 172}; 173 |
173struct psycho_strayclr { 174 struct psycho_softc *psc_sc; 175 bus_addr_t psc_clr; /* clear register */ 176}; 177 | |
178#define PSYCHO_READ8(sc, off) \ 179 bus_space_read_8((sc)->sc_bustag, (sc)->sc_bushandle, (off)) 180#define PSYCHO_WRITE8(sc, off, v) \ 181 bus_space_write_8((sc)->sc_bustag, (sc)->sc_bushandle, (off), (v)) 182#define PCICTL_READ8(sc, off) \ 183 PSYCHO_READ8((sc), (sc)->sc_pcictl + (off)) 184#define PCICTL_WRITE8(sc, off, v) \ 185 PSYCHO_WRITE8((sc), (sc)->sc_pcictl + (off), (v)) 186 187/* | 174#define PSYCHO_READ8(sc, off) \ 175 bus_space_read_8((sc)->sc_bustag, (sc)->sc_bushandle, (off)) 176#define PSYCHO_WRITE8(sc, off, v) \ 177 bus_space_write_8((sc)->sc_bustag, (sc)->sc_bushandle, (off), (v)) 178#define PCICTL_READ8(sc, off) \ 179 PSYCHO_READ8((sc), (sc)->sc_pcictl + (off)) 180#define PCICTL_WRITE8(sc, off, v) \ 181 PSYCHO_WRITE8((sc), (sc)->sc_pcictl + (off), (v)) 182 183/* |
188 * "sabre" is the UltraSPARC IIi onboard UPA to PCI bridge. It manages a | 184 * "Sabre" is the UltraSPARC IIi onboard UPA to PCI bridge. It manages a |
189 * single PCI bus and does not have a streaming buffer. It often has an APB 190 * (advanced PCI bridge) connected to it, which was designed specifically for 191 * the IIi. The APB let's the IIi handle two independednt PCI buses, and | 185 * single PCI bus and does not have a streaming buffer. It often has an APB 186 * (advanced PCI bridge) connected to it, which was designed specifically for 187 * the IIi. The APB let's the IIi handle two independednt PCI buses, and |
192 * appears as two "simba"'s underneath the sabre. | 188 * appears as two "Simba"'s underneath the Sabre. |
193 * | 189 * |
194 * "psycho" and "psycho+" are dual UPA to PCI bridges. They sit on the UPA bus 195 * and manage two PCI buses. "psycho" has two 64-bit 33MHz buses, while 196 * "psycho+" controls both a 64-bit 33Mhz and a 64-bit 66Mhz PCI bus. You 197 * will usually find a "psycho+" since I don't think the original "psycho" | 190 * "Psycho" and "Psycho+" are dual UPA to PCI bridges. They sit on the UPA bus 191 * and manage two PCI buses. "Psycho" has two 64-bit 33MHz buses, while 192 * "Psycho+" controls both a 64-bit 33Mhz and a 64-bit 66Mhz PCI bus. You 193 * will usually find a "Psycho+" since I don't think the original "Psycho" |
198 * ever shipped, and if it did it would be in the U30. 199 * | 194 * ever shipped, and if it did it would be in the U30. 195 * |
200 * Each "psycho" PCI bus appears as a separate OFW node, but since they are | 196 * Each "Psycho" PCI bus appears as a separate OFW node, but since they are |
201 * both part of the same IC, they only have a single register space. As such, 202 * they need to be configured together, even though the autoconfiguration will 203 * attach them separately. 204 * | 197 * both part of the same IC, they only have a single register space. As such, 198 * they need to be configured together, even though the autoconfiguration will 199 * attach them separately. 200 * |
205 * On UltraIIi machines, "sabre" itself usually takes pci0, with "simba" often | 201 * On UltraIIi machines, "Sabre" itself usually takes pci0, with "Simba" often |
206 * as pci1 and pci2, although they have been implemented with other PCI bus 207 * numbers on some machines. 208 * | 202 * as pci1 and pci2, although they have been implemented with other PCI bus 203 * numbers on some machines. 204 * |
209 * On UltraII machines, there can be any number of "psycho+" ICs, each | 205 * On UltraII machines, there can be any number of "Psycho+" ICs, each |
210 * providing two PCI buses. 211 */ 212#ifdef DEBUGGER_ON_POWERFAIL 213#define PSYCHO_PWRFAIL_INT_FLAGS INTR_FAST 214#else 215#define PSYCHO_PWRFAIL_INT_FLAGS 0 216#endif 217 218#define OFW_PCI_TYPE "pci" 219 220struct psycho_desc { | 206 * providing two PCI buses. 207 */ 208#ifdef DEBUGGER_ON_POWERFAIL 209#define PSYCHO_PWRFAIL_INT_FLAGS INTR_FAST 210#else 211#define PSYCHO_PWRFAIL_INT_FLAGS 0 212#endif 213 214#define OFW_PCI_TYPE "pci" 215 216struct psycho_desc { |
221 char *pd_string; 222 int pd_mode; 223 char *pd_name; | 217 const char *pd_string; 218 int pd_mode; 219 const char *pd_name; |
224}; 225 | 220}; 221 |
226static struct psycho_desc psycho_compats[] = { | 222static const struct psycho_desc psycho_compats[] = { |
227 { "pci108e,8000", PSYCHO_MODE_PSYCHO, "Psycho compatible" }, 228 { "pci108e,a000", PSYCHO_MODE_SABRE, "Sabre (US-IIi) compatible" }, 229 { "pci108e,a001", PSYCHO_MODE_SABRE, "Sabre (US-IIe) compatible" }, 230 { NULL, 0, NULL } 231}; 232 | 223 { "pci108e,8000", PSYCHO_MODE_PSYCHO, "Psycho compatible" }, 224 { "pci108e,a000", PSYCHO_MODE_SABRE, "Sabre (US-IIi) compatible" }, 225 { "pci108e,a001", PSYCHO_MODE_SABRE, "Sabre (US-IIe) compatible" }, 226 { NULL, 0, NULL } 227}; 228 |
233static struct psycho_desc psycho_models[] = { | 229static const struct psycho_desc psycho_models[] = { |
234 { "SUNW,psycho", PSYCHO_MODE_PSYCHO, "Psycho" }, 235 { "SUNW,sabre", PSYCHO_MODE_SABRE, "Sabre" }, 236 { NULL, 0, NULL } 237}; 238 | 230 { "SUNW,psycho", PSYCHO_MODE_PSYCHO, "Psycho" }, 231 { "SUNW,sabre", PSYCHO_MODE_SABRE, "Sabre" }, 232 { NULL, 0, NULL } 233}; 234 |
239static struct psycho_desc * 240psycho_find_desc(struct psycho_desc *table, char *string) | 235static const struct psycho_desc * 236psycho_find_desc(const struct psycho_desc *table, const char *string) |
241{ | 237{ |
242 struct psycho_desc *desc; | 238 const struct psycho_desc *desc; |
243 244 for (desc = table; desc->pd_string != NULL; desc++) { 245 if (strcmp(desc->pd_string, string) == 0) 246 return (desc); 247 } 248 return (NULL); 249} 250 | 239 240 for (desc = table; desc->pd_string != NULL; desc++) { 241 if (strcmp(desc->pd_string, string) == 0) 242 return (desc); 243 } 244 return (NULL); 245} 246 |
251static struct psycho_desc * 252psycho_get_desc(phandle_t node, char *model) | 247static const struct psycho_desc * 248psycho_get_desc(phandle_t node, const char *model) |
253{ | 249{ |
254 struct psycho_desc *rv; | 250 const struct psycho_desc *rv; |
255 char compat[32]; 256 257 rv = NULL; 258 if (model != NULL) 259 rv = psycho_find_desc(psycho_models, model); 260 if (rv == NULL && 261 OF_getprop(node, "compatible", compat, sizeof(compat)) != -1) 262 rv = psycho_find_desc(psycho_compats, compat); 263 return (rv); 264} 265 266static int 267psycho_probe(device_t dev) 268{ | 251 char compat[32]; 252 253 rv = NULL; 254 if (model != NULL) 255 rv = psycho_find_desc(psycho_models, model); 256 if (rv == NULL && 257 OF_getprop(node, "compatible", compat, sizeof(compat)) != -1) 258 rv = psycho_find_desc(psycho_compats, compat); 259 return (rv); 260} 261 262static int 263psycho_probe(device_t dev) 264{ |
269 phandle_t node; 270 char *dtype; | 265 const char *dtype; |
271 | 266 |
272 node = nexus_get_node(dev); | |
273 dtype = nexus_get_device_type(dev); 274 if (nexus_get_reg(dev) != NULL && dtype != NULL && 275 strcmp(dtype, OFW_PCI_TYPE) == 0 && | 267 dtype = nexus_get_device_type(dev); 268 if (nexus_get_reg(dev) != NULL && dtype != NULL && 269 strcmp(dtype, OFW_PCI_TYPE) == 0 && |
276 psycho_get_desc(node, nexus_get_model(dev)) != NULL) { | 270 psycho_get_desc(nexus_get_node(dev), 271 nexus_get_model(dev)) != NULL) { |
277 device_set_desc(dev, "U2P UPA-PCI bridge"); 278 return (0); 279 } 280 281 return (ENXIO); 282} 283 284static int 285psycho_attach(device_t dev) 286{ 287 struct psycho_softc *sc; 288 struct psycho_softc *osc = NULL; 289 struct psycho_softc *asc; 290 struct upa_regs *reg; | 272 device_set_desc(dev, "U2P UPA-PCI bridge"); 273 return (0); 274 } 275 276 return (ENXIO); 277} 278 279static int 280psycho_attach(device_t dev) 281{ 282 struct psycho_softc *sc; 283 struct psycho_softc *osc = NULL; 284 struct psycho_softc *asc; 285 struct upa_regs *reg; |
291 struct psycho_desc *desc; | 286 const struct psycho_desc *desc; |
292 phandle_t node; | 287 phandle_t node; |
293 u_int64_t csr; | 288 uint64_t csr; |
294 u_long mlen; 295 int psycho_br[2]; 296 int n, i, nreg, rid; 297#ifdef PSYCHO_DEBUG 298 bus_addr_t map, clr; | 289 u_long mlen; 290 int psycho_br[2]; 291 int n, i, nreg, rid; 292#ifdef PSYCHO_DEBUG 293 bus_addr_t map, clr; |
299 u_int64_t mr; | 294 uint64_t mr; |
300#endif 301 302 node = nexus_get_node(dev); 303 sc = device_get_softc(dev); 304 desc = psycho_get_desc(node, nexus_get_model(dev)); 305 306 sc->sc_node = node; 307 sc->sc_dev = dev; 308 sc->sc_dmatag = nexus_get_dmatag(dev); 309 sc->sc_mode = desc->pd_mode; 310 311 /* | 295#endif 296 297 node = nexus_get_node(dev); 298 sc = device_get_softc(dev); 299 desc = psycho_get_desc(node, nexus_get_model(dev)); 300 301 sc->sc_node = node; 302 sc->sc_dev = dev; 303 sc->sc_dmatag = nexus_get_dmatag(dev); 304 sc->sc_mode = desc->pd_mode; 305 306 /* |
312 * The psycho gets three register banks: | 307 * The Psycho gets three register banks: |
313 * (0) per-PBM configuration and status registers 314 * (1) per-PBM PCI configuration space, containing only the 315 * PBM 256-byte PCI header | 308 * (0) per-PBM configuration and status registers 309 * (1) per-PBM PCI configuration space, containing only the 310 * PBM 256-byte PCI header |
316 * (2) the shared psycho configuration registers | 311 * (2) the shared Psycho configuration registers |
317 */ 318 reg = nexus_get_reg(dev); 319 nreg = nexus_get_nreg(dev); 320 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) { 321 if (nreg <= 2) | 312 */ 313 reg = nexus_get_reg(dev); 314 nreg = nexus_get_nreg(dev); 315 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) { 316 if (nreg <= 2) |
322 panic("psycho_attach: %d not enough registers", nreg); | 317 panic("%s: %d not enough registers", __func__, nreg); |
323 sc->sc_basepaddr = (vm_paddr_t)UPA_REG_PHYS(®[2]); 324 mlen = UPA_REG_SIZE(®[2]); 325 sc->sc_pcictl = UPA_REG_PHYS(®[0]) - sc->sc_basepaddr; 326 switch (sc->sc_pcictl) { 327 case PSR_PCICTL0: 328 sc->sc_half = 0; 329 break; 330 case PSR_PCICTL1: 331 sc->sc_half = 1; 332 break; 333 default: | 318 sc->sc_basepaddr = (vm_paddr_t)UPA_REG_PHYS(®[2]); 319 mlen = UPA_REG_SIZE(®[2]); 320 sc->sc_pcictl = UPA_REG_PHYS(®[0]) - sc->sc_basepaddr; 321 switch (sc->sc_pcictl) { 322 case PSR_PCICTL0: 323 sc->sc_half = 0; 324 break; 325 case PSR_PCICTL1: 326 sc->sc_half = 1; 327 break; 328 default: |
334 panic("psycho_attach: bogus pci control register " 335 "location"); | 329 panic("%s: bogus PCI control register location", 330 __func__); |
336 } 337 } else { 338 if (nreg <= 0) | 331 } 332 } else { 333 if (nreg <= 0) |
339 panic("psycho_attach: %d not enough registers", nreg); | 334 panic("%s: %d not enough registers", __func__, nreg); |
340 sc->sc_basepaddr = (vm_paddr_t)UPA_REG_PHYS(®[0]); 341 mlen = UPA_REG_SIZE(reg); 342 sc->sc_pcictl = PSR_PCICTL0; 343 sc->sc_half = 0; 344 } 345 346 /* | 335 sc->sc_basepaddr = (vm_paddr_t)UPA_REG_PHYS(®[0]); 336 mlen = UPA_REG_SIZE(reg); 337 sc->sc_pcictl = PSR_PCICTL0; 338 sc->sc_half = 0; 339 } 340 341 /* |
347 * Match other psycho's that are already configured against | 342 * Match other Psycho's that are already configured against |
348 * the base physical address. This will be the same for a 349 * pair of devices that share register space. 350 */ 351 SLIST_FOREACH(asc, &psycho_softcs, sc_link) { 352 if (asc->sc_basepaddr == sc->sc_basepaddr) { | 343 * the base physical address. This will be the same for a 344 * pair of devices that share register space. 345 */ 346 SLIST_FOREACH(asc, &psycho_softcs, sc_link) { 347 if (asc->sc_basepaddr == sc->sc_basepaddr) { |
353 /* Found partner */ | 348 /* Found partner. */ |
354 osc = asc; 355 break; 356 } 357 } 358 359 if (osc == NULL) { 360 rid = 0; 361 sc->sc_mem_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, 362 sc->sc_basepaddr, sc->sc_basepaddr + mlen - 1, mlen, 363 RF_ACTIVE); 364 if (sc->sc_mem_res == NULL || 365 rman_get_start(sc->sc_mem_res) != sc->sc_basepaddr) | 349 osc = asc; 350 break; 351 } 352 } 353 354 if (osc == NULL) { 355 rid = 0; 356 sc->sc_mem_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, 357 sc->sc_basepaddr, sc->sc_basepaddr + mlen - 1, mlen, 358 RF_ACTIVE); 359 if (sc->sc_mem_res == NULL || 360 rman_get_start(sc->sc_mem_res) != sc->sc_basepaddr) |
366 panic("psycho_attach: can't allocate device memory"); | 361 panic("%s: could not allocate device memory", __func__); |
367 sc->sc_bustag = rman_get_bustag(sc->sc_mem_res); 368 sc->sc_bushandle = rman_get_bushandle(sc->sc_mem_res); 369 } else { 370 /* | 362 sc->sc_bustag = rman_get_bustag(sc->sc_mem_res); 363 sc->sc_bushandle = rman_get_bushandle(sc->sc_mem_res); 364 } else { 365 /* |
371 * There's another psycho using the same register space. Copy the 372 * relevant stuff. | 366 * There's another Psycho using the same register space. 367 * Copy the relevant stuff. |
373 */ 374 sc->sc_mem_res = NULL; 375 sc->sc_bustag = osc->sc_bustag; 376 sc->sc_bushandle = osc->sc_bushandle; 377 } 378 csr = PSYCHO_READ8(sc, PSR_CS); 379 sc->sc_ign = 0x7c0; /* APB IGN is always 0x7c */ 380 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) | 368 */ 369 sc->sc_mem_res = NULL; 370 sc->sc_bustag = osc->sc_bustag; 371 sc->sc_bushandle = osc->sc_bushandle; 372 } 373 csr = PSYCHO_READ8(sc, PSR_CS); 374 sc->sc_ign = 0x7c0; /* APB IGN is always 0x7c */ 375 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) |
381 sc->sc_ign = PSYCHO_GCSR_IGN(csr) << 6; | 376 sc->sc_ign = PSYCHO_GCSR_IGN(csr) << INTMAP_IGN_SHIFT; |
382 383 device_printf(dev, "%s, impl %d, version %d, ign %#x, bus %c\n", 384 desc->pd_name, (int)PSYCHO_GCSR_IMPL(csr), 385 (int)PSYCHO_GCSR_VERS(csr), sc->sc_ign, 'A' + sc->sc_half); 386 387 /* Setup the PCI control register. */ 388 csr = PCICTL_READ8(sc, PCR_CS); 389 csr |= PCICTL_MRLM | PCICTL_ARB_PARK | PCICTL_ERRINTEN | PCICTL_4ENABLE; 390 csr &= ~(PCICTL_SERR | PCICTL_CPU_PRIO | PCICTL_ARB_PRIO | 391 PCICTL_RTRYWAIT); 392 PCICTL_WRITE8(sc, PCR_CS, csr); 393 394 if (sc->sc_mode == PSYCHO_MODE_SABRE) { 395 /* Use the PROM preset for now. */ 396 csr = PCICTL_READ8(sc, PCR_TAS); 397 if (csr == 0) | 377 378 device_printf(dev, "%s, impl %d, version %d, ign %#x, bus %c\n", 379 desc->pd_name, (int)PSYCHO_GCSR_IMPL(csr), 380 (int)PSYCHO_GCSR_VERS(csr), sc->sc_ign, 'A' + sc->sc_half); 381 382 /* Setup the PCI control register. */ 383 csr = PCICTL_READ8(sc, PCR_CS); 384 csr |= PCICTL_MRLM | PCICTL_ARB_PARK | PCICTL_ERRINTEN | PCICTL_4ENABLE; 385 csr &= ~(PCICTL_SERR | PCICTL_CPU_PRIO | PCICTL_ARB_PRIO | 386 PCICTL_RTRYWAIT); 387 PCICTL_WRITE8(sc, PCR_CS, csr); 388 389 if (sc->sc_mode == PSYCHO_MODE_SABRE) { 390 /* Use the PROM preset for now. */ 391 csr = PCICTL_READ8(sc, PCR_TAS); 392 if (csr == 0) |
398 panic("psycho_attach: sabre TAS not initialized."); | 393 panic("%s: Sabre TAS not initialized.", __func__); |
399 sc->sc_dvmabase = (ffs(csr) - 1) << PCITAS_ADDR_SHIFT; 400 } else 401 sc->sc_dvmabase = -1; 402 | 394 sc->sc_dvmabase = (ffs(csr) - 1) << PCITAS_ADDR_SHIFT; 395 } else 396 sc->sc_dvmabase = -1; 397 |
403 /* Initialize memory and i/o rmans */ 404 sc->sc_io_rman.rm_type = RMAN_ARRAY; 405 sc->sc_io_rman.rm_descr = "Psycho PCI I/O Ports"; 406 if (rman_init(&sc->sc_io_rman) != 0 || 407 rman_manage_region(&sc->sc_io_rman, 0, PSYCHO_IO_SIZE) != 0) 408 panic("psycho_probe: failed to set up i/o rman"); 409 sc->sc_mem_rman.rm_type = RMAN_ARRAY; 410 sc->sc_mem_rman.rm_descr = "Psycho PCI Memory"; 411 if (rman_init(&sc->sc_mem_rman) != 0 || 412 rman_manage_region(&sc->sc_mem_rman, 0, PSYCHO_MEM_SIZE) != 0) 413 panic("psycho_probe: failed to set up memory rman"); | 398 /* Initialize memory and I/O rmans. */ 399 sc->sc_pci_io_rman.rm_type = RMAN_ARRAY; 400 sc->sc_pci_io_rman.rm_descr = "Psycho PCI I/O Ports"; 401 if (rman_init(&sc->sc_pci_io_rman) != 0 || 402 rman_manage_region(&sc->sc_pci_io_rman, 0, PSYCHO_IO_SIZE) != 0) 403 panic("%s: failed to set up I/O rman", __func__); 404 sc->sc_pci_mem_rman.rm_type = RMAN_ARRAY; 405 sc->sc_pci_mem_rman.rm_descr = "Psycho PCI Memory"; 406 if (rman_init(&sc->sc_pci_mem_rman) != 0 || 407 rman_manage_region(&sc->sc_pci_mem_rman, 0, PSYCHO_MEM_SIZE) != 0) 408 panic("%s: failed to set up memory rman", __func__); |
414 | 409 |
415 sc->sc_nrange = OF_getprop_alloc(sc->sc_node, "ranges", 416 sizeof(*sc->sc_range), (void **)&sc->sc_range); | 410 sc->sc_nrange = OF_getprop_alloc(node, "ranges", sizeof(*sc->sc_range), 411 (void **)&sc->sc_range); |
417 if (sc->sc_nrange == -1) | 412 if (sc->sc_nrange == -1) |
418 panic("could not get psycho ranges"); | 413 panic("%s: could not get Psycho ranges", __func__); |
419 /* 420 * Find the addresses of the various bus spaces. 421 * There should not be multiple ones of one kind. 422 * The physical start addresses of the ranges are the configuration, | 414 /* 415 * Find the addresses of the various bus spaces. 416 * There should not be multiple ones of one kind. 417 * The physical start addresses of the ranges are the configuration, |
423 * memory and IO handles. | 418 * memory and I/O handles. |
424 */ 425 for (n = 0; n < sc->sc_nrange; n++) { 426 i = UPA_RANGE_CS(&sc->sc_range[n]); | 419 */ 420 for (n = 0; n < sc->sc_nrange; n++) { 421 i = UPA_RANGE_CS(&sc->sc_range[n]); |
427 if (sc->sc_bh[i] != 0) 428 panic("psycho_attach: duplicate range for space %d", i); 429 sc->sc_bh[i] = UPA_RANGE_PHYS(&sc->sc_range[n]); | 422 if (sc->sc_pci_bh[i] != 0) 423 panic("%s: duplicate range for space %d", __func__, i); 424 sc->sc_pci_bh[i] = UPA_RANGE_PHYS(&sc->sc_range[n]); |
430 } 431 /* 432 * Check that all needed handles are present. The PCI_CS_MEM64 one is 433 * not currently used. 434 */ 435 for (n = 0; n < 3; n++) { | 425 } 426 /* 427 * Check that all needed handles are present. The PCI_CS_MEM64 one is 428 * not currently used. 429 */ 430 for (n = 0; n < 3; n++) { |
436 if (sc->sc_bh[n] == 0) 437 panic("psycho_attach: range %d missing", n); | 431 if (sc->sc_pci_bh[n] == 0) 432 panic("%s: range %d missing", __func__, n); |
438 } 439 | 433 } 434 |
440 /* Register the softc, this is needed for paired psychos. */ | 435 /* Register the softc, this is needed for paired Psychos. */ |
441 SLIST_INSERT_HEAD(&psycho_softcs, sc, sc_link); 442 443 /* | 436 SLIST_INSERT_HEAD(&psycho_softcs, sc, sc_link); 437 438 /* |
444 * If we're a sabre or the first of a pair of psycho's to arrive here, | 439 * If we're a Sabre or the first of a pair of Psycho's to arrive here, |
445 * start up the IOMMU. 446 */ 447 if (osc == NULL) { 448 /* | 440 * start up the IOMMU. 441 */ 442 if (osc == NULL) { 443 /* |
449 * Establish handlers for interesting interrupts.... | 444 * Establish handlers for interesting interrupts... |
450 * 451 * XXX We need to remember these and remove this to support 452 * hotplug on the UPA/FHC bus. 453 * 454 * XXX Not all controllers have these, but installing them 455 * is better than trying to sort through this mess. 456 */ 457 psycho_set_intr(sc, 0, dev, PSR_UE_INT_MAP, INTR_FAST, 458 psycho_ue); 459 psycho_set_intr(sc, 1, dev, PSR_CE_INT_MAP, 0, psycho_ce); 460 psycho_set_intr(sc, 2, dev, PSR_PCIAERR_INT_MAP, INTR_FAST, 461 psycho_bus_a); 462 psycho_set_intr(sc, 4, dev, PSR_POWER_INT_MAP, 463 PSYCHO_PWRFAIL_INT_FLAGS, psycho_powerfail); | 445 * 446 * XXX We need to remember these and remove this to support 447 * hotplug on the UPA/FHC bus. 448 * 449 * XXX Not all controllers have these, but installing them 450 * is better than trying to sort through this mess. 451 */ 452 psycho_set_intr(sc, 0, dev, PSR_UE_INT_MAP, INTR_FAST, 453 psycho_ue); 454 psycho_set_intr(sc, 1, dev, PSR_CE_INT_MAP, 0, psycho_ce); 455 psycho_set_intr(sc, 2, dev, PSR_PCIAERR_INT_MAP, INTR_FAST, 456 psycho_bus_a); 457 psycho_set_intr(sc, 4, dev, PSR_POWER_INT_MAP, 458 PSYCHO_PWRFAIL_INT_FLAGS, psycho_powerfail); |
464 /* Psycho-specific initialization. */ | 459 /* Psycho-specific initialization */ |
465 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) { 466 /* 467 * Sabres do not have the following two interrupts. 468 */ 469 psycho_set_intr(sc, 3, dev, PSR_PCIBERR_INT_MAP, 470 INTR_FAST, psycho_bus_b); 471#ifdef PSYCHO_MAP_WAKEUP 472 /* --- 6 unchanged lines hidden (view full) --- 479 480 /* Initialize the counter-timer. */ 481 sparc64_counter_init(sc->sc_bustag, sc->sc_bushandle, 482 PSR_TC0); 483 } 484 485 /* 486 * Setup IOMMU and PCI configuration if we're the first | 460 if (sc->sc_mode == PSYCHO_MODE_PSYCHO) { 461 /* 462 * Sabres do not have the following two interrupts. 463 */ 464 psycho_set_intr(sc, 3, dev, PSR_PCIBERR_INT_MAP, 465 INTR_FAST, psycho_bus_b); 466#ifdef PSYCHO_MAP_WAKEUP 467 /* --- 6 unchanged lines hidden (view full) --- 474 475 /* Initialize the counter-timer. */ 476 sparc64_counter_init(sc->sc_bustag, sc->sc_bushandle, 477 PSR_TC0); 478 } 479 480 /* 481 * Setup IOMMU and PCI configuration if we're the first |
487 * of a pair of psycho's to arrive here. | 482 * of a pair of Psycho's to arrive here. |
488 * 489 * We should calculate a TSB size based on amount of RAM 490 * and number of bus controllers and number and type of 491 * child devices. 492 * 493 * For the moment, 32KB should be more than enough. 494 */ 495 sc->sc_is = malloc(sizeof(struct iommu_state), M_DEVBUF, 496 M_NOWAIT); 497 if (sc->sc_is == NULL) | 483 * 484 * We should calculate a TSB size based on amount of RAM 485 * and number of bus controllers and number and type of 486 * child devices. 487 * 488 * For the moment, 32KB should be more than enough. 489 */ 490 sc->sc_is = malloc(sizeof(struct iommu_state), M_DEVBUF, 491 M_NOWAIT); 492 if (sc->sc_is == NULL) |
498 panic("psycho_attach: malloc iommu_state failed"); | 493 panic("%s: malloc iommu_state failed", __func__); |
499 sc->sc_is->is_sb[0] = 0; 500 sc->sc_is->is_sb[1] = 0; | 494 sc->sc_is->is_sb[0] = 0; 495 sc->sc_is->is_sb[1] = 0; |
501 if (OF_getproplen(sc->sc_node, "no-streaming-cache") < 0) | 496 if (OF_getproplen(node, "no-streaming-cache") < 0) |
502 sc->sc_is->is_sb[0] = sc->sc_pcictl + PCR_STRBUF; 503 psycho_iommu_init(sc, 3); 504 } else { 505 /* Just copy IOMMU state, config tag and address */ 506 sc->sc_is = osc->sc_is; | 497 sc->sc_is->is_sb[0] = sc->sc_pcictl + PCR_STRBUF; 498 psycho_iommu_init(sc, 3); 499 } else { 500 /* Just copy IOMMU state, config tag and address */ 501 sc->sc_is = osc->sc_is; |
507 if (OF_getproplen(sc->sc_node, "no-streaming-cache") < 0) | 502 if (OF_getproplen(node, "no-streaming-cache") < 0) |
508 sc->sc_is->is_sb[1] = sc->sc_pcictl + PCR_STRBUF; 509 iommu_reset(sc->sc_is); 510 } 511 512 /* Allocate our tags. */ | 503 sc->sc_is->is_sb[1] = sc->sc_pcictl + PCR_STRBUF; 504 iommu_reset(sc->sc_is); 505 } 506 507 /* Allocate our tags. */ |
513 sc->sc_memt = psycho_alloc_bus_tag(sc, PCI_MEMORY_BUS_SPACE); 514 sc->sc_iot = psycho_alloc_bus_tag(sc, PCI_IO_BUS_SPACE); 515 sc->sc_cfgt = psycho_alloc_bus_tag(sc, PCI_CONFIG_BUS_SPACE); 516 if (bus_dma_tag_create(sc->sc_dmatag, 8, 1, 0, 0x3ffffffff, NULL, NULL, 517 0x3ffffffff, 0xff, 0xffffffff, 0, NULL, NULL, &sc->sc_dmat) != 0) 518 panic("psycho_attach: bus_dma_tag_create failed"); | 508 sc->sc_pci_memt = psycho_alloc_bus_tag(sc, PCI_MEMORY_BUS_SPACE); 509 sc->sc_pci_iot = psycho_alloc_bus_tag(sc, PCI_IO_BUS_SPACE); 510 sc->sc_pci_cfgt = psycho_alloc_bus_tag(sc, PCI_CONFIG_BUS_SPACE); 511 if (bus_dma_tag_create(sc->sc_dmatag, 8, 1, 0, 0x3ffffffff, 512 NULL, NULL, 0x3ffffffff, 0xff, 0xffffffff, 0, NULL, NULL, 513 &sc->sc_pci_dmat) != 0) 514 panic("%s: bus_dma_tag_create failed", __func__); |
519 /* Customize the tag. */ | 515 /* Customize the tag. */ |
520 sc->sc_dmat->dt_cookie = sc->sc_is; 521 sc->sc_dmat->dt_mt = &iommu_dma_methods; 522 /* XXX: register as root dma tag (kludge). */ 523 sparc64_root_dma_tag = sc->sc_dmat; | 516 sc->sc_pci_dmat->dt_cookie = sc->sc_is; 517 sc->sc_pci_dmat->dt_mt = &iommu_dma_methods; 518 /* XXX: register as root DMA tag (kludge). */ 519 sparc64_root_dma_tag = sc->sc_pci_dmat; |
524 525#ifdef PSYCHO_DEBUG 526 /* 527 * Enable all interrupts and clear all interrupt states. 528 * This aids the debugging of interrupt routing problems. 529 */ 530 for (map = PSR_PCIA0_INT_MAP, clr = PSR_PCIA0_INT_CLR, n = 0; 531 map <= PSR_PCIB3_INT_MAP; map += 8, clr += 32, n++) { --- 16 unchanged lines hidden (view full) --- 548#endif /* PSYCHO_DEBUG */ 549 550 /* 551 * Get the bus range from the firmware; it is used solely for obtaining 552 * the inital bus number, and cannot be trusted on all machines. 553 */ 554 n = OF_getprop(node, "bus-range", (void *)psycho_br, sizeof(psycho_br)); 555 if (n == -1) | 520 521#ifdef PSYCHO_DEBUG 522 /* 523 * Enable all interrupts and clear all interrupt states. 524 * This aids the debugging of interrupt routing problems. 525 */ 526 for (map = PSR_PCIA0_INT_MAP, clr = PSR_PCIA0_INT_CLR, n = 0; 527 map <= PSR_PCIB3_INT_MAP; map += 8, clr += 32, n++) { --- 16 unchanged lines hidden (view full) --- 544#endif /* PSYCHO_DEBUG */ 545 546 /* 547 * Get the bus range from the firmware; it is used solely for obtaining 548 * the inital bus number, and cannot be trusted on all machines. 549 */ 550 n = OF_getprop(node, "bus-range", (void *)psycho_br, sizeof(psycho_br)); 551 if (n == -1) |
556 panic("could not get psycho bus-range"); | 552 panic("%s: could not get Psycho bus-range", __func__); |
557 if (n != sizeof(psycho_br)) | 553 if (n != sizeof(psycho_br)) |
558 panic("broken psycho bus-range (%d)", n); | 554 panic("%s: broken Psycho bus-range (%d)", __func__, n); |
559 | 555 |
560 sc->sc_secbus = sc->sc_subbus = ofw_pci_alloc_busno(sc->sc_node); | 556 sc->sc_pci_secbus = sc->sc_pci_subbus = ofw_pci_alloc_busno(node); |
561 /* 562 * Program the bus range registers. | 557 /* 558 * Program the bus range registers. |
563 * NOTE: for the psycho, the second write changes the bus number the 564 * psycho itself uses for it's configuration space, so these | 559 * NOTE: for the Psycho, the second write changes the bus number the 560 * Psycho itself uses for it's configuration space, so these |
565 * writes must be kept in this order! | 561 * writes must be kept in this order! |
566 * The sabre always uses bus 0, but there only can be one sabre per | 562 * The Sabre always uses bus 0, but there only can be one Sabre per |
567 * machine. 568 */ 569 PCIB_WRITE_CONFIG(dev, psycho_br[0], PCS_DEVICE, PCS_FUNC, PCSR_SUBBUS, | 563 * machine. 564 */ 565 PCIB_WRITE_CONFIG(dev, psycho_br[0], PCS_DEVICE, PCS_FUNC, PCSR_SUBBUS, |
570 sc->sc_subbus, 1); | 566 sc->sc_pci_subbus, 1); |
571 PCIB_WRITE_CONFIG(dev, psycho_br[0], PCS_DEVICE, PCS_FUNC, PCSR_SECBUS, | 567 PCIB_WRITE_CONFIG(dev, psycho_br[0], PCS_DEVICE, PCS_FUNC, PCSR_SECBUS, |
572 sc->sc_secbus, 1); | 568 sc->sc_pci_secbus, 1); |
573 | 569 |
574 ofw_bus_setup_iinfo(node, &sc->sc_iinfo, sizeof(ofw_pci_intr_t)); | 570 ofw_bus_setup_iinfo(node, &sc->sc_pci_iinfo, sizeof(ofw_pci_intr_t)); |
575 | 571 |
576 device_add_child(dev, "pci", sc->sc_secbus); | 572 device_add_child(dev, "pci", sc->sc_pci_secbus); |
577 return (bus_generic_attach(dev)); 578} 579 580static void | 573 return (bus_generic_attach(dev)); 574} 575 576static void |
581psycho_set_intr(struct psycho_softc *sc, int index, 582 device_t dev, bus_addr_t map, int iflags, driver_intr_t handler) | 577psycho_set_intr(struct psycho_softc *sc, int index, device_t dev, 578 bus_addr_t map, int iflags, driver_intr_t handler) |
583{ 584 int rid, vec; | 579{ 580 int rid, vec; |
585 u_int64_t mr; | 581 uint64_t mr; |
586 587 mr = PSYCHO_READ8(sc, map); 588 vec = INTVEC(mr); 589 sc->sc_irq_res[index] = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 590 vec, vec, 1, RF_ACTIVE); 591 if (sc->sc_irq_res[index] == NULL) | 582 583 mr = PSYCHO_READ8(sc, map); 584 vec = INTVEC(mr); 585 sc->sc_irq_res[index] = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 586 vec, vec, 1, RF_ACTIVE); 587 if (sc->sc_irq_res[index] == NULL) |
592 panic("psycho_set_intr: failed to get interrupt"); | 588 panic("%s: failed to get interrupt", __func__); |
593 bus_setup_intr(dev, sc->sc_irq_res[index], INTR_TYPE_MISC | iflags, 594 handler, sc, &sc->sc_ihand[index]); 595 PSYCHO_WRITE8(sc, map, INTMAP_ENABLE(mr, PCPU_GET(mid))); 596} 597 598static int 599psycho_find_intrmap(struct psycho_softc *sc, int ino, bus_addr_t *intrmapptr, 600 bus_addr_t *intrclrptr, bus_addr_t *intrdiagptr) 601{ 602 bus_addr_t intrmap, intrclr; | 589 bus_setup_intr(dev, sc->sc_irq_res[index], INTR_TYPE_MISC | iflags, 590 handler, sc, &sc->sc_ihand[index]); 591 PSYCHO_WRITE8(sc, map, INTMAP_ENABLE(mr, PCPU_GET(mid))); 592} 593 594static int 595psycho_find_intrmap(struct psycho_softc *sc, int ino, bus_addr_t *intrmapptr, 596 bus_addr_t *intrclrptr, bus_addr_t *intrdiagptr) 597{ 598 bus_addr_t intrmap, intrclr; |
603 u_int64_t im; | 599 uint64_t im; |
604 u_long diag; 605 int found; 606 607 found = 0; 608 /* Hunt thru obio first */ 609 diag = PSYCHO_READ8(sc, PSR_OBIO_INT_DIAG); 610 for (intrmap = PSR_SCSI_INT_MAP, intrclr = PSR_SCSI_INT_CLR; 611 intrmap <= PSR_SERIAL_INT_MAP; intrmap += 8, intrclr += 8, --- 30 unchanged lines hidden (view full) --- 642 if (intrclrptr != NULL) 643 *intrclrptr = intrclr; 644 if (intrdiagptr != NULL) 645 *intrdiagptr = diag; 646 return (found); 647} 648 649/* | 600 u_long diag; 601 int found; 602 603 found = 0; 604 /* Hunt thru obio first */ 605 diag = PSYCHO_READ8(sc, PSR_OBIO_INT_DIAG); 606 for (intrmap = PSR_SCSI_INT_MAP, intrclr = PSR_SCSI_INT_CLR; 607 intrmap <= PSR_SERIAL_INT_MAP; intrmap += 8, intrclr += 8, --- 30 unchanged lines hidden (view full) --- 638 if (intrclrptr != NULL) 639 *intrclrptr = intrclr; 640 if (intrdiagptr != NULL) 641 *intrdiagptr = diag; 642 return (found); 643} 644 645/* |
650 * Interrupt handlers. | 646 * Interrupt handlers |
651 */ 652static void 653psycho_ue(void *arg) 654{ | 647 */ 648static void 649psycho_ue(void *arg) 650{ |
655 struct psycho_softc *sc = (struct psycho_softc *)arg; 656 u_int64_t afar, afsr; | 651 struct psycho_softc *sc = arg; 652 uint64_t afar, afsr; |
657 658 afar = PSYCHO_READ8(sc, PSR_UE_AFA); 659 afsr = PSYCHO_READ8(sc, PSR_UE_AFS); 660 /* 661 * On the UltraSPARC-IIi/IIe, IOMMU misses/protection faults cause 662 * the AFAR to be set to the physical address of the TTE entry that 663 * was invalid/write protected. Call into the iommu code to have 664 * them decoded to virtual IO addresses. 665 */ 666 if ((afsr & UEAFSR_P_DTE) != 0) 667 iommu_decode_fault(sc->sc_is, afar); 668 panic("%s: uncorrectable DMA error AFAR %#lx AFSR %#lx", 669 device_get_name(sc->sc_dev), (u_long)afar, (u_long)afsr); 670} 671 672static void 673psycho_ce(void *arg) 674{ | 653 654 afar = PSYCHO_READ8(sc, PSR_UE_AFA); 655 afsr = PSYCHO_READ8(sc, PSR_UE_AFS); 656 /* 657 * On the UltraSPARC-IIi/IIe, IOMMU misses/protection faults cause 658 * the AFAR to be set to the physical address of the TTE entry that 659 * was invalid/write protected. Call into the iommu code to have 660 * them decoded to virtual IO addresses. 661 */ 662 if ((afsr & UEAFSR_P_DTE) != 0) 663 iommu_decode_fault(sc->sc_is, afar); 664 panic("%s: uncorrectable DMA error AFAR %#lx AFSR %#lx", 665 device_get_name(sc->sc_dev), (u_long)afar, (u_long)afsr); 666} 667 668static void 669psycho_ce(void *arg) 670{ |
675 struct psycho_softc *sc = (struct psycho_softc *)arg; 676 u_int64_t afar, afsr; | 671 struct psycho_softc *sc = arg; 672 uint64_t afar, afsr; |
677 678 afar = PSYCHO_READ8(sc, PSR_CE_AFA); 679 afsr = PSYCHO_READ8(sc, PSR_CE_AFS); 680 device_printf(sc->sc_dev, "correctable DMA error AFAR %#lx " 681 "AFSR %#lx\n", (u_long)afar, (u_long)afsr); 682 /* Clear the error bits that we caught. */ 683 PSYCHO_WRITE8(sc, PSR_CE_AFS, afsr & CEAFSR_ERRMASK); 684 PSYCHO_WRITE8(sc, PSR_CE_INT_CLR, 0); 685} 686 687static void 688psycho_bus_a(void *arg) 689{ | 673 674 afar = PSYCHO_READ8(sc, PSR_CE_AFA); 675 afsr = PSYCHO_READ8(sc, PSR_CE_AFS); 676 device_printf(sc->sc_dev, "correctable DMA error AFAR %#lx " 677 "AFSR %#lx\n", (u_long)afar, (u_long)afsr); 678 /* Clear the error bits that we caught. */ 679 PSYCHO_WRITE8(sc, PSR_CE_AFS, afsr & CEAFSR_ERRMASK); 680 PSYCHO_WRITE8(sc, PSR_CE_INT_CLR, 0); 681} 682 683static void 684psycho_bus_a(void *arg) 685{ |
690 struct psycho_softc *sc = (struct psycho_softc *)arg; 691 u_int64_t afar, afsr; | 686 struct psycho_softc *sc = arg; 687 uint64_t afar, afsr; |
692 693 afar = PSYCHO_READ8(sc, PSR_PCICTL0 + PCR_AFA); 694 afsr = PSYCHO_READ8(sc, PSR_PCICTL0 + PCR_AFS); 695 panic("%s: PCI bus A error AFAR %#lx AFSR %#lx", 696 device_get_name(sc->sc_dev), (u_long)afar, (u_long)afsr); 697} 698 699static void 700psycho_bus_b(void *arg) 701{ | 688 689 afar = PSYCHO_READ8(sc, PSR_PCICTL0 + PCR_AFA); 690 afsr = PSYCHO_READ8(sc, PSR_PCICTL0 + PCR_AFS); 691 panic("%s: PCI bus A error AFAR %#lx AFSR %#lx", 692 device_get_name(sc->sc_dev), (u_long)afar, (u_long)afsr); 693} 694 695static void 696psycho_bus_b(void *arg) 697{ |
702 struct psycho_softc *sc = (struct psycho_softc *)arg; 703 u_int64_t afar, afsr; | 698 struct psycho_softc *sc = arg; 699 uint64_t afar, afsr; |
704 705 afar = PSYCHO_READ8(sc, PSR_PCICTL1 + PCR_AFA); 706 afsr = PSYCHO_READ8(sc, PSR_PCICTL1 + PCR_AFS); 707 panic("%s: PCI bus B error AFAR %#lx AFSR %#lx", 708 device_get_name(sc->sc_dev), (u_long)afar, (u_long)afsr); 709} 710 711static void 712psycho_powerfail(void *arg) 713{ 714 715#ifdef DEBUGGER_ON_POWERFAIL | 700 701 afar = PSYCHO_READ8(sc, PSR_PCICTL1 + PCR_AFA); 702 afsr = PSYCHO_READ8(sc, PSR_PCICTL1 + PCR_AFS); 703 panic("%s: PCI bus B error AFAR %#lx AFSR %#lx", 704 device_get_name(sc->sc_dev), (u_long)afar, (u_long)afsr); 705} 706 707static void 708psycho_powerfail(void *arg) 709{ 710 711#ifdef DEBUGGER_ON_POWERFAIL |
716 struct psycho_softc *sc = (struct psycho_softc *)arg; | 712 struct psycho_softc *sc = arg; |
717 718 kdb_enter("powerfail"); 719 PSYCHO_WRITE8(sc, PSR_POWER_INT_CLR, 0); 720#else 721 printf("Power Failure Detected: Shutting down NOW.\n"); 722 shutdown_nice(0); 723#endif 724} 725 726#ifdef PSYCHO_MAP_WAKEUP 727static void 728psycho_wakeup(void *arg) 729{ | 713 714 kdb_enter("powerfail"); 715 PSYCHO_WRITE8(sc, PSR_POWER_INT_CLR, 0); 716#else 717 printf("Power Failure Detected: Shutting down NOW.\n"); 718 shutdown_nice(0); 719#endif 720} 721 722#ifdef PSYCHO_MAP_WAKEUP 723static void 724psycho_wakeup(void *arg) 725{ |
730 struct psycho_softc *sc = (struct psycho_softc *)arg; | 726 struct psycho_softc *sc = arg; |
731 732 PSYCHO_WRITE8(sc, PSR_PWRMGT_INT_CLR, 0); 733 /* Gee, we don't really have a framework to deal with this properly. */ 734 device_printf(sc->sc_dev, "power management wakeup\n"); 735} 736#endif /* PSYCHO_MAP_WAKEUP */ 737 | 727 728 PSYCHO_WRITE8(sc, PSR_PWRMGT_INT_CLR, 0); 729 /* Gee, we don't really have a framework to deal with this properly. */ 730 device_printf(sc->sc_dev, "power management wakeup\n"); 731} 732#endif /* PSYCHO_MAP_WAKEUP */ 733 |
738void | 734static void |
739psycho_iommu_init(struct psycho_softc *sc, int tsbsize) 740{ 741 char *name; 742 struct iommu_state *is = sc->sc_is; 743 | 735psycho_iommu_init(struct psycho_softc *sc, int tsbsize) 736{ 737 char *name; 738 struct iommu_state *is = sc->sc_is; 739 |
744 /* punch in our copies */ | 740 /* Punch in our copies. */ |
745 is->is_bustag = sc->sc_bustag; 746 is->is_bushandle = sc->sc_bushandle; 747 is->is_iommu = PSR_IOMMU; 748 is->is_dtag = PSR_IOMMU_TLB_TAG_DIAG; 749 is->is_ddram = PSR_IOMMU_TLB_DATA_DIAG; 750 is->is_dqueue = PSR_IOMMU_QUEUE_DIAG; 751 is->is_dva = PSR_IOMMU_SVADIAG; 752 is->is_dtcmp = PSR_IOMMU_TLB_CMP_DIAG; 753 | 741 is->is_bustag = sc->sc_bustag; 742 is->is_bushandle = sc->sc_bushandle; 743 is->is_iommu = PSR_IOMMU; 744 is->is_dtag = PSR_IOMMU_TLB_TAG_DIAG; 745 is->is_ddram = PSR_IOMMU_TLB_DATA_DIAG; 746 is->is_dqueue = PSR_IOMMU_QUEUE_DIAG; 747 is->is_dva = PSR_IOMMU_SVADIAG; 748 is->is_dtcmp = PSR_IOMMU_TLB_CMP_DIAG; 749 |
754 /* give us a nice name.. */ | 750 /* Give us a nice name... */ |
755 name = (char *)malloc(32, M_DEVBUF, M_NOWAIT); 756 if (name == 0) | 751 name = (char *)malloc(32, M_DEVBUF, M_NOWAIT); 752 if (name == 0) |
757 panic("couldn't malloc iommu name"); | 753 panic("%s: could not malloc iommu name", __func__); |
758 snprintf(name, 32, "%s dvma", device_get_nameunit(sc->sc_dev)); 759 760 iommu_init(name, is, tsbsize, sc->sc_dvmabase, 0); 761} 762 763static int 764psycho_maxslots(device_t dev) 765{ 766 767 /* XXX: is this correct? */ 768 return (PCI_SLOTMAX); 769} 770 | 754 snprintf(name, 32, "%s dvma", device_get_nameunit(sc->sc_dev)); 755 756 iommu_init(name, is, tsbsize, sc->sc_dvmabase, 0); 757} 758 759static int 760psycho_maxslots(device_t dev) 761{ 762 763 /* XXX: is this correct? */ 764 return (PCI_SLOTMAX); 765} 766 |
771static u_int32_t | 767static uint32_t |
772psycho_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, | 768psycho_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, |
773 int width) | 769 int width) |
774{ 775 struct psycho_softc *sc; 776 bus_space_handle_t bh; 777 u_long offset = 0; | 770{ 771 struct psycho_softc *sc; 772 bus_space_handle_t bh; 773 u_long offset = 0; |
778 u_int8_t byte; 779 u_int16_t shrt; 780 u_int32_t wrd; 781 u_int32_t r; | 774 uint8_t byte; 775 uint16_t shrt; 776 uint32_t wrd; 777 uint32_t r; |
782 int i; 783 | 778 int i; 779 |
784 sc = (struct psycho_softc *)device_get_softc(dev); | 780 sc = device_get_softc(dev); |
785 offset = PSYCHO_CONF_OFF(bus, slot, func, reg); | 781 offset = PSYCHO_CONF_OFF(bus, slot, func, reg); |
786 bh = sc->sc_bh[PCI_CS_CONFIG]; | 782 bh = sc->sc_pci_bh[PCI_CS_CONFIG]; |
787 switch (width) { 788 case 1: | 783 switch (width) { 784 case 1: |
789 i = bus_space_peek_1(sc->sc_cfgt, bh, offset, &byte); | 785 i = bus_space_peek_1(sc->sc_pci_cfgt, bh, offset, &byte); |
790 r = byte; 791 break; 792 case 2: | 786 r = byte; 787 break; 788 case 2: |
793 i = bus_space_peek_2(sc->sc_cfgt, bh, offset, &shrt); | 789 i = bus_space_peek_2(sc->sc_pci_cfgt, bh, offset, &shrt); |
794 r = shrt; 795 break; 796 case 4: | 790 r = shrt; 791 break; 792 case 4: |
797 i = bus_space_peek_4(sc->sc_cfgt, bh, offset, &wrd); | 793 i = bus_space_peek_4(sc->sc_pci_cfgt, bh, offset, &wrd); |
798 r = wrd; 799 break; 800 default: | 794 r = wrd; 795 break; 796 default: |
801 panic("psycho_read_config: bad width"); | 797 panic("%s: bad width", __func__); |
802 } 803 804 if (i) { 805#ifdef PSYCHO_DEBUG | 798 } 799 800 if (i) { 801#ifdef PSYCHO_DEBUG |
806 printf("psycho read data error reading: %d.%d.%d: 0x%x\n", | 802 printf("Psycho read data error reading: %d.%d.%d: 0x%x\n", |
807 bus, slot, func, reg); 808#endif 809 r = -1; 810 } 811 return (r); 812} 813 814static void | 803 bus, slot, func, reg); 804#endif 805 r = -1; 806 } 807 return (r); 808} 809 810static void |
815psycho_write_config(device_t dev, u_int bus, u_int slot, u_int func, 816 u_int reg, u_int32_t val, int width) | 811psycho_write_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, 812 uint32_t val, int width) |
817{ 818 struct psycho_softc *sc; 819 bus_space_handle_t bh; 820 u_long offset = 0; 821 | 813{ 814 struct psycho_softc *sc; 815 bus_space_handle_t bh; 816 u_long offset = 0; 817 |
822 sc = (struct psycho_softc *)device_get_softc(dev); | 818 sc = device_get_softc(dev); |
823 offset = PSYCHO_CONF_OFF(bus, slot, func, reg); | 819 offset = PSYCHO_CONF_OFF(bus, slot, func, reg); |
824 bh = sc->sc_bh[PCI_CS_CONFIG]; | 820 bh = sc->sc_pci_bh[PCI_CS_CONFIG]; |
825 switch (width) { 826 case 1: | 821 switch (width) { 822 case 1: |
827 bus_space_write_1(sc->sc_cfgt, bh, offset, val); | 823 bus_space_write_1(sc->sc_pci_cfgt, bh, offset, val); |
828 break; 829 case 2: | 824 break; 825 case 2: |
830 bus_space_write_2(sc->sc_cfgt, bh, offset, val); | 826 bus_space_write_2(sc->sc_pci_cfgt, bh, offset, val); |
831 break; 832 case 4: | 827 break; 828 case 4: |
833 bus_space_write_4(sc->sc_cfgt, bh, offset, val); | 829 bus_space_write_4(sc->sc_pci_cfgt, bh, offset, val); |
834 break; 835 default: | 830 break; 831 default: |
836 panic("psycho_write_config: bad width"); | 832 panic("%s: bad width", __func__); |
837 } 838} 839 840static int 841psycho_route_interrupt(device_t bridge, device_t dev, int pin) 842{ | 833 } 834} 835 836static int 837psycho_route_interrupt(device_t bridge, device_t dev, int pin) 838{ |
843 struct psycho_softc *sc = device_get_softc(bridge); | 839 struct psycho_softc *sc; |
844 struct ofw_pci_register reg; 845 bus_addr_t intrmap; 846 phandle_t node = ofw_bus_get_node(dev); 847 ofw_pci_intr_t pintr, mintr; | 840 struct ofw_pci_register reg; 841 bus_addr_t intrmap; 842 phandle_t node = ofw_bus_get_node(dev); 843 ofw_pci_intr_t pintr, mintr; |
848 u_int8_t maskbuf[sizeof(reg) + sizeof(pintr)]; | 844 uint8_t maskbuf[sizeof(reg) + sizeof(pintr)]; |
849 | 845 |
846 sc = device_get_softc(bridge); |
|
850 pintr = pin; | 847 pintr = pin; |
851 if (ofw_bus_lookup_imap(node, &sc->sc_iinfo, ®, sizeof(reg), | 848 if (ofw_bus_lookup_imap(node, &sc->sc_pci_iinfo, ®, sizeof(reg), |
852 &pintr, sizeof(pintr), &mintr, sizeof(mintr), maskbuf)) 853 return (mintr); 854 /* 855 * If this is outside of the range for an intpin, it's likely a full | 849 &pintr, sizeof(pintr), &mintr, sizeof(mintr), maskbuf)) 850 return (mintr); 851 /* 852 * If this is outside of the range for an intpin, it's likely a full |
856 * INO, and no mapping is required at all; this happens on the u30, 857 * where there's no interrupt map at the psycho node. Fortunately, | 853 * INO, and no mapping is required at all; this happens on the U30, 854 * where there's no interrupt map at the Psycho node. Fortunately, |
858 * there seem to be no INOs in the intpin range on this boxen, so 859 * this easy heuristics will do. 860 */ 861 if (pin > 4) 862 return (pin); 863 /* 864 * Guess the INO; we always assume that this is a non-OBIO 865 * device, and that pin is a "real" intpin number. Determine 866 * the mapping register to be used by the slot number. | 855 * there seem to be no INOs in the intpin range on this boxen, so 856 * this easy heuristics will do. 857 */ 858 if (pin > 4) 859 return (pin); 860 /* 861 * Guess the INO; we always assume that this is a non-OBIO 862 * device, and that pin is a "real" intpin number. Determine 863 * the mapping register to be used by the slot number. |
867 * We only need to do this on e450s, it seems; here, the slot numbers | 864 * We only need to do this on E450s, it seems; here, the slot numbers |
868 * for bus A are one-based, while those for bus B seemingly have an 869 * offset of 2 (hence the factor of 3 below). 870 */ 871 intrmap = PSR_PCIA0_INT_MAP + 872 8 * (pci_get_slot(dev) - 1 + 3 * sc->sc_half); 873 mintr = INTINO(PSYCHO_READ8(sc, intrmap)) + pin - 1; 874 device_printf(bridge, "guessing interrupt %d for device %d/%d pin %d\n", 875 (int)mintr, pci_get_slot(dev), pci_get_function(dev), pin); 876 return (mintr); 877} 878 879static int 880psycho_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 881{ 882 struct psycho_softc *sc; 883 | 865 * for bus A are one-based, while those for bus B seemingly have an 866 * offset of 2 (hence the factor of 3 below). 867 */ 868 intrmap = PSR_PCIA0_INT_MAP + 869 8 * (pci_get_slot(dev) - 1 + 3 * sc->sc_half); 870 mintr = INTINO(PSYCHO_READ8(sc, intrmap)) + pin - 1; 871 device_printf(bridge, "guessing interrupt %d for device %d/%d pin %d\n", 872 (int)mintr, pci_get_slot(dev), pci_get_function(dev), pin); 873 return (mintr); 874} 875 876static int 877psycho_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 878{ 879 struct psycho_softc *sc; 880 |
884 sc = (struct psycho_softc *)device_get_softc(dev); | 881 sc = device_get_softc(dev); |
885 switch (which) { 886 case PCIB_IVAR_BUS: | 882 switch (which) { 883 case PCIB_IVAR_BUS: |
887 *result = sc->sc_secbus; | 884 *result = sc->sc_pci_secbus; |
888 return (0); 889 } 890 return (ENOENT); 891} 892 893/* Write to the correct clr register, and call the actual handler. */ 894static void 895psycho_intr_stub(void *arg) 896{ | 885 return (0); 886 } 887 return (ENOENT); 888} 889 890/* Write to the correct clr register, and call the actual handler. */ 891static void 892psycho_intr_stub(void *arg) 893{ |
897 struct psycho_clr *pc; | 894 struct psycho_clr *pc = arg; |
898 | 895 |
899 pc = (struct psycho_clr *)arg; | |
900 pc->pci_handler(pc->pci_arg); 901 PSYCHO_WRITE8(pc->pci_sc, pc->pci_clr, 0); 902} 903 904static int | 896 pc->pci_handler(pc->pci_arg); 897 PSYCHO_WRITE8(pc->pci_sc, pc->pci_clr, 0); 898} 899 900static int |
905psycho_setup_intr(device_t dev, device_t child, 906 struct resource *ires, int flags, driver_intr_t *intr, void *arg, 907 void **cookiep) | 901psycho_setup_intr(device_t dev, device_t child, struct resource *ires, 902 int flags, driver_intr_t *intr, void *arg, void **cookiep) |
908{ 909 struct psycho_softc *sc; 910 struct psycho_clr *pc; 911 bus_addr_t intrmapptr, intrclrptr; 912 long vec = rman_get_start(ires); | 903{ 904 struct psycho_softc *sc; 905 struct psycho_clr *pc; 906 bus_addr_t intrmapptr, intrclrptr; 907 long vec = rman_get_start(ires); |
913 u_int64_t mr; | 908 uint64_t mr; |
914 int ino, error; 915 | 909 int ino, error; 910 |
916 sc = (struct psycho_softc *)device_get_softc(dev); | 911 sc = device_get_softc(dev); |
917 pc = (struct psycho_clr *)malloc(sizeof(*pc), M_DEVBUF, M_NOWAIT); 918 if (pc == NULL) 919 return (0); 920 921 /* 922 * Hunt through all the interrupt mapping regs to look for our 923 * interrupt vector. 924 * --- 6 unchanged lines hidden (view full) --- 931 932 if (!psycho_find_intrmap(sc, ino, &intrmapptr, &intrclrptr, NULL)) { 933 device_printf(dev, "Cannot find interrupt vector %lx\n", vec); 934 free(pc, M_DEVBUF); 935 return (0); 936 } 937 938#ifdef PSYCHO_DEBUG | 912 pc = (struct psycho_clr *)malloc(sizeof(*pc), M_DEVBUF, M_NOWAIT); 913 if (pc == NULL) 914 return (0); 915 916 /* 917 * Hunt through all the interrupt mapping regs to look for our 918 * interrupt vector. 919 * --- 6 unchanged lines hidden (view full) --- 926 927 if (!psycho_find_intrmap(sc, ino, &intrmapptr, &intrclrptr, NULL)) { 928 device_printf(dev, "Cannot find interrupt vector %lx\n", vec); 929 free(pc, M_DEVBUF); 930 return (0); 931 } 932 933#ifdef PSYCHO_DEBUG |
939 device_printf(dev, "psycho_setup_intr: INO %d, map %#lx, clr %#lx\n", 940 ino, (u_long)intrmapptr, (u_long)intrclrptr); | 934 device_printf(dev, "%s: INO %d, map %#lx, clr %#lx\n", __func__, ino, 935 (u_long)intrmapptr, (u_long)intrclrptr); |
941#endif 942 pc->pci_sc = sc; 943 pc->pci_arg = arg; 944 pc->pci_handler = intr; 945 pc->pci_clr = intrclrptr; 946 /* Disable the interrupt while we fiddle with it */ 947 mr = PSYCHO_READ8(sc, intrmapptr); 948 PSYCHO_WRITE8(sc, intrmapptr, mr & ~INTMAP_V); --- 15 unchanged lines hidden (view full) --- 964 * Enable the interrupt and program the target module now we have the 965 * handler installed. 966 */ 967 PSYCHO_WRITE8(sc, intrmapptr, INTMAP_ENABLE(mr, PCPU_GET(mid))); 968 return (error); 969} 970 971static int | 936#endif 937 pc->pci_sc = sc; 938 pc->pci_arg = arg; 939 pc->pci_handler = intr; 940 pc->pci_clr = intrclrptr; 941 /* Disable the interrupt while we fiddle with it */ 942 mr = PSYCHO_READ8(sc, intrmapptr); 943 PSYCHO_WRITE8(sc, intrmapptr, mr & ~INTMAP_V); --- 15 unchanged lines hidden (view full) --- 959 * Enable the interrupt and program the target module now we have the 960 * handler installed. 961 */ 962 PSYCHO_WRITE8(sc, intrmapptr, INTMAP_ENABLE(mr, PCPU_GET(mid))); 963 return (error); 964} 965 966static int |
972psycho_teardown_intr(device_t dev, device_t child, 973 struct resource *vec, void *cookie) | 967psycho_teardown_intr(device_t dev, device_t child, struct resource *vec, 968 void *cookie) |
974{ | 969{ |
975 struct psycho_clr *pc; | 970 struct psycho_clr *pc = cookie; |
976 int error; 977 | 971 int error; 972 |
978 pc = (struct psycho_clr *)cookie; | |
979 error = BUS_TEARDOWN_INTR(device_get_parent(dev), child, vec, 980 pc->pci_cookie); 981 /* 982 * Don't disable the interrupt for now, so that stray interupts get 983 * detected... 984 */ 985 if (error != 0) 986 free(pc, M_DEVBUF); --- 8 unchanged lines hidden (view full) --- 995 struct resource *rv; 996 struct rman *rm; 997 bus_space_tag_t bt; 998 bus_space_handle_t bh; 999 int needactivate = flags & RF_ACTIVE; 1000 1001 flags &= ~RF_ACTIVE; 1002 | 973 error = BUS_TEARDOWN_INTR(device_get_parent(dev), child, vec, 974 pc->pci_cookie); 975 /* 976 * Don't disable the interrupt for now, so that stray interupts get 977 * detected... 978 */ 979 if (error != 0) 980 free(pc, M_DEVBUF); --- 8 unchanged lines hidden (view full) --- 989 struct resource *rv; 990 struct rman *rm; 991 bus_space_tag_t bt; 992 bus_space_handle_t bh; 993 int needactivate = flags & RF_ACTIVE; 994 995 flags &= ~RF_ACTIVE; 996 |
1003 sc = (struct psycho_softc *)device_get_softc(bus); | 997 sc = device_get_softc(bus); |
1004 if (type == SYS_RES_IRQ) { 1005 /* 1006 * XXX: Don't accept blank ranges for now, only single | 998 if (type == SYS_RES_IRQ) { 999 /* 1000 * XXX: Don't accept blank ranges for now, only single |
1007 * interrupts. The other case should not happen with the MI pci 1008 * code... 1009 * XXX: This may return a resource that is out of the range 1010 * that was specified. Is this correct...? | 1001 * interrupts. The other case should not happen with the 1002 * MI PCI code... 1003 * XXX: This may return a resource that is out of the 1004 * range that was specified. Is this correct...? |
1011 */ 1012 if (start != end) | 1005 */ 1006 if (start != end) |
1013 panic("psycho_alloc_resource: XXX: interrupt range"); | 1007 panic("%s: XXX: interrupt range", __func__); |
1014 start = end |= sc->sc_ign; 1015 return (BUS_ALLOC_RESOURCE(device_get_parent(bus), child, type, 1016 rid, start, end, count, flags)); 1017 } 1018 switch (type) { 1019 case SYS_RES_MEMORY: | 1008 start = end |= sc->sc_ign; 1009 return (BUS_ALLOC_RESOURCE(device_get_parent(bus), child, type, 1010 rid, start, end, count, flags)); 1011 } 1012 switch (type) { 1013 case SYS_RES_MEMORY: |
1020 rm = &sc->sc_mem_rman; 1021 bt = sc->sc_memt; 1022 bh = sc->sc_bh[PCI_CS_MEM32]; | 1014 rm = &sc->sc_pci_mem_rman; 1015 bt = sc->sc_pci_memt; 1016 bh = sc->sc_pci_bh[PCI_CS_MEM32]; |
1023 break; 1024 case SYS_RES_IOPORT: | 1017 break; 1018 case SYS_RES_IOPORT: |
1025 rm = &sc->sc_io_rman; 1026 bt = sc->sc_iot; 1027 bh = sc->sc_bh[PCI_CS_IO]; | 1019 rm = &sc->sc_pci_io_rman; 1020 bt = sc->sc_pci_iot; 1021 bh = sc->sc_pci_bh[PCI_CS_IO]; |
1028 break; 1029 default: 1030 return (NULL); 1031 } 1032 1033 rv = rman_reserve_resource(rm, start, end, count, flags, child); 1034 if (rv == NULL) 1035 return (NULL); --- 69 unchanged lines hidden (view full) --- 1105} 1106 1107static int 1108psycho_intr_pending(device_t dev, ofw_pci_intr_t intr) 1109{ 1110 struct psycho_softc *sc; 1111 u_long diag; 1112 | 1022 break; 1023 default: 1024 return (NULL); 1025 } 1026 1027 rv = rman_reserve_resource(rm, start, end, count, flags, child); 1028 if (rv == NULL) 1029 return (NULL); --- 69 unchanged lines hidden (view full) --- 1099} 1100 1101static int 1102psycho_intr_pending(device_t dev, ofw_pci_intr_t intr) 1103{ 1104 struct psycho_softc *sc; 1105 u_long diag; 1106 |
1113 sc = (struct psycho_softc *)device_get_softc(dev); | 1107 sc = device_get_softc(dev); |
1114 if (!psycho_find_intrmap(sc, intr, NULL, NULL, &diag)) { | 1108 if (!psycho_find_intrmap(sc, intr, NULL, NULL, &diag)) { |
1115 device_printf(dev, "psycho_intr_pending: mapping not found for" 1116 " %d\n", intr); | 1109 device_printf(dev, "%s: mapping not found for %d\n", __func__, 1110 intr); |
1117 return (0); 1118 } 1119 return (diag != 0); 1120} 1121 1122static bus_space_handle_t 1123psycho_get_bus_handle(device_t dev, int type, bus_space_handle_t childhdl, 1124 bus_space_tag_t *tag) 1125{ 1126 struct psycho_softc *sc; 1127 | 1111 return (0); 1112 } 1113 return (diag != 0); 1114} 1115 1116static bus_space_handle_t 1117psycho_get_bus_handle(device_t dev, int type, bus_space_handle_t childhdl, 1118 bus_space_tag_t *tag) 1119{ 1120 struct psycho_softc *sc; 1121 |
1128 sc = (struct psycho_softc *)device_get_softc(dev); | 1122 sc = device_get_softc(dev); |
1129 switch (type) { 1130 case SYS_RES_IOPORT: | 1123 switch (type) { 1124 case SYS_RES_IOPORT: |
1131 *tag = sc->sc_iot; 1132 return (sc->sc_bh[PCI_CS_IO] + childhdl); | 1125 *tag = sc->sc_pci_iot; 1126 return (sc->sc_pci_bh[PCI_CS_IO] + childhdl); |
1133 case SYS_RES_MEMORY: | 1127 case SYS_RES_MEMORY: |
1134 *tag = sc->sc_memt; 1135 return (sc->sc_bh[PCI_CS_MEM32] + childhdl); | 1128 *tag = sc->sc_pci_memt; 1129 return (sc->sc_pci_bh[PCI_CS_MEM32] + childhdl); |
1136 default: | 1130 default: |
1137 panic("psycho_get_bus_handle: illegal space\n"); | 1131 panic("%s: illegal space (%d)\n", __func__, type); |
1138 } 1139} 1140 1141static phandle_t 1142psycho_get_node(device_t bus, device_t dev) 1143{ | 1132 } 1133} 1134 1135static phandle_t 1136psycho_get_node(device_t bus, device_t dev) 1137{ |
1144 struct psycho_softc *sc = device_get_softc(bus); | 1138 struct psycho_softc *sc; |
1145 | 1139 |
1140 sc = device_get_softc(bus); |
|
1146 /* We only have one child, the PCI bus, which needs our own node. */ 1147 return (sc->sc_node); 1148} 1149 1150static void 1151psycho_adjust_busrange(device_t dev, u_int subbus) 1152{ | 1141 /* We only have one child, the PCI bus, which needs our own node. */ 1142 return (sc->sc_node); 1143} 1144 1145static void 1146psycho_adjust_busrange(device_t dev, u_int subbus) 1147{ |
1153 struct psycho_softc *sc = device_get_softc(dev); | 1148 struct psycho_softc *sc; |
1154 | 1149 |
1150 sc = device_get_softc(dev); |
|
1155 /* If necessary, adjust the subordinate bus number register. */ | 1151 /* If necessary, adjust the subordinate bus number register. */ |
1156 if (subbus > sc->sc_subbus) { | 1152 if (subbus > sc->sc_pci_subbus) { |
1157#ifdef PSYCHO_DEBUG 1158 device_printf(dev, 1159 "adjusting secondary bus number from %d to %d\n", | 1153#ifdef PSYCHO_DEBUG 1154 device_printf(dev, 1155 "adjusting secondary bus number from %d to %d\n", |
1160 sc->sc_subbus, subbus); | 1156 sc->sc_pci_subbus, subbus); |
1161#endif | 1157#endif |
1162 sc->sc_subbus = subbus; 1163 PCIB_WRITE_CONFIG(dev, sc->sc_secbus, PCS_DEVICE, PCS_FUNC, | 1158 sc->sc_pci_subbus = subbus; 1159 PCIB_WRITE_CONFIG(dev, sc->sc_pci_secbus, PCS_DEVICE, PCS_FUNC, |
1164 PCSR_SUBBUS, subbus, 1); 1165 } 1166} 1167 1168static bus_space_tag_t 1169psycho_alloc_bus_tag(struct psycho_softc *sc, int type) 1170{ 1171 bus_space_tag_t bt; 1172 1173 bt = (bus_space_tag_t)malloc(sizeof(struct bus_space_tag), M_DEVBUF, 1174 M_NOWAIT | M_ZERO); 1175 if (bt == NULL) | 1160 PCSR_SUBBUS, subbus, 1); 1161 } 1162} 1163 1164static bus_space_tag_t 1165psycho_alloc_bus_tag(struct psycho_softc *sc, int type) 1166{ 1167 bus_space_tag_t bt; 1168 1169 bt = (bus_space_tag_t)malloc(sizeof(struct bus_space_tag), M_DEVBUF, 1170 M_NOWAIT | M_ZERO); 1171 if (bt == NULL) |
1176 panic("psycho_alloc_bus_tag: out of memory"); | 1172 panic("%s: out of memory", __func__); |
1177 | 1173 |
1178 bzero(bt, sizeof *bt); | |
1179 bt->bst_cookie = sc; 1180 bt->bst_parent = sc->sc_bustag; 1181 bt->bst_type = type; 1182 return (bt); 1183} | 1174 bt->bst_cookie = sc; 1175 bt->bst_parent = sc->sc_bustag; 1176 bt->bst_type = type; 1177 return (bt); 1178} |