apb.c (119291) | apb.c (129051) |
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1/*- 2 * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier 3 * Copyright (c) 2000 Michael Smith <msmith@freebsd.org> 4 * Copyright (c) 2000 BSDi 5 * Copyright (c) 2001, 2003 Thomas Moestl <tmm@FreeBSD.org> 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without --- 16 unchanged lines hidden (view full) --- 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * from: FreeBSD: src/sys/dev/pci/pci_pci.c,v 1.3 2000/12/13 32 * | 1/*- 2 * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier 3 * Copyright (c) 2000 Michael Smith <msmith@freebsd.org> 4 * Copyright (c) 2000 BSDi 5 * Copyright (c) 2001, 2003 Thomas Moestl <tmm@FreeBSD.org> 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without --- 16 unchanged lines hidden (view full) --- 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * from: FreeBSD: src/sys/dev/pci/pci_pci.c,v 1.3 2000/12/13 32 * |
33 * $FreeBSD: head/sys/sparc64/pci/apb.c 119291 2003-08-22 07:39:05Z imp $ | 33 * $FreeBSD: head/sys/sparc64/pci/apb.c 129051 2004-05-08 13:53:47Z marius $ |
34 */ 35 36/* 37 * Support for the Sun APB (Advanced PCI Bridge) PCI-PCI bridge. 38 * This bridge does not fully comply to the PCI bridge specification, and is 39 * therefore not supported by the generic driver. | 34 */ 35 36/* 37 * Support for the Sun APB (Advanced PCI Bridge) PCI-PCI bridge. 38 * This bridge does not fully comply to the PCI bridge specification, and is 39 * therefore not supported by the generic driver. |
40 * We can use some pf the pcib methods anyway. | 40 * We can use some of the pcib methods anyway. |
41 */ 42 43#include "opt_ofw_pci.h" 44 45#include <sys/param.h> 46#include <sys/systm.h> 47#include <sys/kernel.h> | 41 */ 42 43#include "opt_ofw_pci.h" 44 45#include <sys/param.h> 46#include <sys/systm.h> 47#include <sys/kernel.h> |
48#include <sys/malloc.h> | |
49#include <sys/bus.h> 50 51#include <dev/ofw/openfirm.h> | 48#include <sys/bus.h> 49 50#include <dev/ofw/openfirm.h> |
52#include <dev/ofw/ofw_pci.h> | |
53 54#include <machine/bus.h> 55#include <machine/ofw_bus.h> 56#include <machine/resource.h> 57 58#include <dev/pci/pcireg.h> 59#include <dev/pci/pcivar.h> 60#include <dev/pci/pcib_private.h> --- 10 unchanged lines hidden (view full) --- 71 struct ofw_pcib_gen_softc sc_bsc; 72 u_int8_t sc_iomap; 73 u_int8_t sc_memmap; 74}; 75 76static device_probe_t apb_probe; 77static device_attach_t apb_attach; 78static bus_alloc_resource_t apb_alloc_resource; | 51 52#include <machine/bus.h> 53#include <machine/ofw_bus.h> 54#include <machine/resource.h> 55 56#include <dev/pci/pcireg.h> 57#include <dev/pci/pcivar.h> 58#include <dev/pci/pcib_private.h> --- 10 unchanged lines hidden (view full) --- 69 struct ofw_pcib_gen_softc sc_bsc; 70 u_int8_t sc_iomap; 71 u_int8_t sc_memmap; 72}; 73 74static device_probe_t apb_probe; 75static device_attach_t apb_attach; 76static bus_alloc_resource_t apb_alloc_resource; |
79#ifndef OFW_NEWPCI 80static pcib_route_interrupt_t apb_route_interrupt; 81#endif | |
82 83static device_method_t apb_methods[] = { 84 /* Device interface */ 85 DEVMETHOD(device_probe, apb_probe), 86 DEVMETHOD(device_attach, apb_attach), 87 DEVMETHOD(device_shutdown, bus_generic_shutdown), 88 DEVMETHOD(device_suspend, bus_generic_suspend), 89 DEVMETHOD(device_resume, bus_generic_resume), --- 8 unchanged lines hidden (view full) --- 98 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 99 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 100 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 101 102 /* pcib interface */ 103 DEVMETHOD(pcib_maxslots, pcib_maxslots), 104 DEVMETHOD(pcib_read_config, pcib_read_config), 105 DEVMETHOD(pcib_write_config, pcib_write_config), | 77 78static device_method_t apb_methods[] = { 79 /* Device interface */ 80 DEVMETHOD(device_probe, apb_probe), 81 DEVMETHOD(device_attach, apb_attach), 82 DEVMETHOD(device_shutdown, bus_generic_shutdown), 83 DEVMETHOD(device_suspend, bus_generic_suspend), 84 DEVMETHOD(device_resume, bus_generic_resume), --- 8 unchanged lines hidden (view full) --- 93 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 94 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 95 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 96 97 /* pcib interface */ 98 DEVMETHOD(pcib_maxslots, pcib_maxslots), 99 DEVMETHOD(pcib_read_config, pcib_read_config), 100 DEVMETHOD(pcib_write_config, pcib_write_config), |
106#ifdef OFW_NEWPCI | |
107 DEVMETHOD(pcib_route_interrupt, ofw_pcib_gen_route_interrupt), | 101 DEVMETHOD(pcib_route_interrupt, ofw_pcib_gen_route_interrupt), |
108#else 109 DEVMETHOD(pcib_route_interrupt, apb_route_interrupt), 110#endif | |
111 112 /* ofw_pci interface */ | 102 103 /* ofw_pci interface */ |
113#ifdef OFW_NEWPCI | |
114 DEVMETHOD(ofw_pci_get_node, ofw_pcib_gen_get_node), 115 DEVMETHOD(ofw_pci_adjust_busrange, ofw_pcib_gen_adjust_busrange), | 104 DEVMETHOD(ofw_pci_get_node, ofw_pcib_gen_get_node), 105 DEVMETHOD(ofw_pci_adjust_busrange, ofw_pcib_gen_adjust_busrange), |
116#endif | |
117 118 { 0, 0 } 119}; 120 121static driver_t apb_driver = { 122 "pcib", 123 apb_methods, 124 sizeof(struct apb_softc), --- 60 unchanged lines hidden (view full) --- 185 186 sc = device_get_softc(dev); 187 188 /* 189 * Get current bridge configuration. 190 */ 191 sc->sc_iomap = pci_read_config(dev, APBR_IOMAP, 1); 192 sc->sc_memmap = pci_read_config(dev, APBR_MEMMAP, 1); | 106 107 { 0, 0 } 108}; 109 110static driver_t apb_driver = { 111 "pcib", 112 apb_methods, 113 sizeof(struct apb_softc), --- 60 unchanged lines hidden (view full) --- 174 175 sc = device_get_softc(dev); 176 177 /* 178 * Get current bridge configuration. 179 */ 180 sc->sc_iomap = pci_read_config(dev, APBR_IOMAP, 1); 181 sc->sc_memmap = pci_read_config(dev, APBR_MEMMAP, 1); |
193#ifdef OFW_NEWPCI | |
194 ofw_pcib_gen_setup(dev); | 182 ofw_pcib_gen_setup(dev); |
195#else 196 sc->sc_bsc.ops_pcib_sc.dev = dev; 197 sc->sc_bsc.ops_pcib_sc.secbus = pci_read_config(dev, PCIR_SECBUS_1, 1); 198 sc->sc_bsc.ops_pcib_sc.subbus = pci_read_config(dev, PCIR_SUBBUS_1, 1); 199#endif | |
200 201 if (bootverbose) { 202 device_printf(dev, " secondary bus %d\n", 203 sc->sc_bsc.ops_pcib_sc.secbus); 204 device_printf(dev, " subordinate bus %d\n", 205 sc->sc_bsc.ops_pcib_sc.subbus); 206 device_printf(dev, " I/O decode "); 207 apb_map_print(sc->sc_iomap, APB_IO_SCALE); 208 printf("\n"); 209 device_printf(dev, " memory decode "); 210 apb_map_print(sc->sc_memmap, APB_MEM_SCALE); 211 printf("\n"); 212 } 213 | 183 184 if (bootverbose) { 185 device_printf(dev, " secondary bus %d\n", 186 sc->sc_bsc.ops_pcib_sc.secbus); 187 device_printf(dev, " subordinate bus %d\n", 188 sc->sc_bsc.ops_pcib_sc.subbus); 189 device_printf(dev, " I/O decode "); 190 apb_map_print(sc->sc_iomap, APB_IO_SCALE); 191 printf("\n"); 192 device_printf(dev, " memory decode "); 193 apb_map_print(sc->sc_memmap, APB_MEM_SCALE); 194 printf("\n"); 195 } 196 |
214#ifndef OFW_NEWPCI 215 if (sc->sc_bsc.ops_pcib_sc.secbus == 0) 216 panic("apb_attach: APB with uninitialized secbus"); 217#endif 218 | |
219 device_add_child(dev, "pci", sc->sc_bsc.ops_pcib_sc.secbus); 220 return (bus_generic_attach(dev)); 221} 222 223/* 224 * We have to trap resource allocation requests and ensure that the bridge 225 * is set up to, or capable of handling them. 226 */ 227static struct resource * 228apb_alloc_resource(device_t dev, device_t child, int type, int *rid, 229 u_long start, u_long end, u_long count, u_int flags) 230{ 231 struct apb_softc *sc; 232 233 sc = device_get_softc(dev); 234 /* 235 * If this is a "default" allocation against this rid, we can't work | 197 device_add_child(dev, "pci", sc->sc_bsc.ops_pcib_sc.secbus); 198 return (bus_generic_attach(dev)); 199} 200 201/* 202 * We have to trap resource allocation requests and ensure that the bridge 203 * is set up to, or capable of handling them. 204 */ 205static struct resource * 206apb_alloc_resource(device_t dev, device_t child, int type, int *rid, 207 u_long start, u_long end, u_long count, u_int flags) 208{ 209 struct apb_softc *sc; 210 211 sc = device_get_softc(dev); 212 /* 213 * If this is a "default" allocation against this rid, we can't work |
236 * out where it's coming from (we should actually never see these) so we 237 * just have to punt. | 214 * out where it's coming from (we should actually never see these) so 215 * we just have to punt. |
238 */ 239 if ((start == 0) && (end == ~0)) { 240 device_printf(dev, "can't decode default resource id %d for " 241 "%s%d, bypassing\n", *rid, device_get_name(child), 242 device_get_unit(child)); 243 } else { 244 /* 245 * Fail the allocation for this range if it's not supported. --- 40 unchanged lines hidden (view full) --- 286 } 287 288 /* 289 * Bridge is OK decoding this resource, so pass it up. 290 */ 291 return (bus_generic_alloc_resource(dev, child, type, rid, start, end, 292 count, flags)); 293} | 216 */ 217 if ((start == 0) && (end == ~0)) { 218 device_printf(dev, "can't decode default resource id %d for " 219 "%s%d, bypassing\n", *rid, device_get_name(child), 220 device_get_unit(child)); 221 } else { 222 /* 223 * Fail the allocation for this range if it's not supported. --- 40 unchanged lines hidden (view full) --- 264 } 265 266 /* 267 * Bridge is OK decoding this resource, so pass it up. 268 */ 269 return (bus_generic_alloc_resource(dev, child, type, rid, start, end, 270 count, flags)); 271} |
294 295#ifndef OFW_NEWPCI 296/* 297 * Route an interrupt across a PCI bridge - we need to rely on the firmware 298 * here. 299 */ 300static int 301apb_route_interrupt(device_t pcib, device_t dev, int pin) 302{ 303 304 /* 305 * XXX: ugly loathsome hack: 306 * We can't use ofw_pci_route_intr() here; the device passed may be 307 * the one of a bridge, so the original device can't be recovered. 308 * 309 * We need to use the firmware to route interrupts, however it has 310 * no interface which could be used to interpret intpins; instead, 311 * all assignments are done by device. 312 * 313 * The MI pci code will try to reroute interrupts of 0, although they 314 * are correct; all other interrupts are preinitialized, so if we 315 * get here, the intline is either 0 (so return 0), or we hit a 316 * device which was not preinitialized (e.g. hotplugged stuff), in 317 * which case we are lost. 318 */ 319 return (0); 320} 321#endif /* !OFW_NEWPCI */ | |