| ver.h (182730) | ver.h (204152) |
|---|---|
| 1/*- 2 * Copyright (c) 2001 Jake Burkholder. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * | 1/*- 2 * Copyright (c) 2001 Jake Burkholder. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * |
| 26 * $FreeBSD: head/sys/sparc64/include/ver.h 182730 2008-09-03 17:39:19Z marius $ | 26 * $FreeBSD: head/sys/sparc64/include/ver.h 204152 2010-02-20 23:24:19Z marius $ |
| 27 */ 28 29#ifndef _MACHINE_VER_H_ 30#define _MACHINE_VER_H_ 31 32#define VER_MANUF_SHIFT (48) 33#define VER_IMPL_SHIFT (32) 34#define VER_MASK_SHIFT (24) 35#define VER_MAXTL_SHIFT (8) 36#define VER_MAXWIN_SHIFT (0) 37 38#define VER_MANUF_SIZE (16) 39#define VER_IMPL_SIZE (16) 40#define VER_MASK_SIZE (8) 41#define VER_MAXTL_SIZE (8) 42#define VER_MAXWIN_SIZE (5) 43 44#ifndef LOCORE 45 | 27 */ 28 29#ifndef _MACHINE_VER_H_ 30#define _MACHINE_VER_H_ 31 32#define VER_MANUF_SHIFT (48) 33#define VER_IMPL_SHIFT (32) 34#define VER_MASK_SHIFT (24) 35#define VER_MAXTL_SHIFT (8) 36#define VER_MAXWIN_SHIFT (0) 37 38#define VER_MANUF_SIZE (16) 39#define VER_IMPL_SIZE (16) 40#define VER_MASK_SIZE (8) 41#define VER_MAXTL_SIZE (8) 42#define VER_MAXWIN_SIZE (5) 43 44#ifndef LOCORE 45 |
| 46#define VER_MANUF_MASK (((1L<<VER_MANUF_SIZE)-1)<<VER_MANUF_SHIFT) 47#define VER_IMPL_MASK (((1L<<VER_IMPL_SIZE)-1)<<VER_IMPL_SHIFT) 48#define VER_MASK_MASK (((1L<<VER_MASK_SIZE)-1)<<VER_MASK_SHIFT) 49#define VER_MAXTL_MASK (((1L<<VER_MAXTL_SIZE)-1)<<VER_MAXTL_SHIFT) 50#define VER_MAXWIN_MASK (((1L<<VER_MAXWIN_SIZE)-1)<<VER_MAXWIN_SHIFT) | 46#define VER_MANUF_MASK \ 47 (((1UL << VER_MANUF_SIZE) - 1) << VER_MANUF_SHIFT) 48#define VER_IMPL_MASK \ 49 (((1UL << VER_IMPL_SIZE) - 1) << VER_IMPL_SHIFT) 50#define VER_MASK_MASK \ 51 (((1UL << VER_MASK_SIZE) - 1) << VER_MASK_SHIFT) 52#define VER_MAXTL_MASK \ 53 (((1UL << VER_MAXTL_SIZE) - 1) << VER_MAXTL_SHIFT) 54#define VER_MAXWIN_MASK \ 55 (((1UL << VER_MAXWIN_SIZE) - 1) << VER_MAXWIN_SHIFT) |
| 51 | 56 |
| 52#define VER_MANUF(ver) \ | 57#define VER_MANUF(ver) \ |
| 53 (((ver) & VER_MANUF_MASK) >> VER_MANUF_SHIFT) | 58 (((ver) & VER_MANUF_MASK) >> VER_MANUF_SHIFT) |
| 54#define VER_IMPL(ver) \ | 59#define VER_IMPL(ver) \ |
| 55 (((ver) & VER_IMPL_MASK) >> VER_IMPL_SHIFT) | 60 (((ver) & VER_IMPL_MASK) >> VER_IMPL_SHIFT) |
| 56#define VER_MASK(ver) \ | 61#define VER_MASK(ver) \ |
| 57 (((ver) & VER_MASK_MASK) >> VER_MASK_SHIFT) | 62 (((ver) & VER_MASK_MASK) >> VER_MASK_SHIFT) |
| 58#define VER_MAXTL(ver) \ | 63#define VER_MAXTL(ver) \ |
| 59 (((ver) & VER_MAXTL_MASK) >> VER_MAXTL_SHIFT) | 64 (((ver) & VER_MAXTL_MASK) >> VER_MAXTL_SHIFT) |
| 60#define VER_MAXWIN(ver) \ | 65#define VER_MAXWIN(ver) \ |
| 61 (((ver) & VER_MAXWIN_MASK) >> VER_MAXWIN_SHIFT) 62 | 66 (((ver) & VER_MAXWIN_MASK) >> VER_MAXWIN_SHIFT) 67 |
| 63extern int cpu_impl; | |
| 64extern char sparc64_model[]; 65 66#endif /* !LOCORE */ 67 68/* Known implementations. */ 69#define CPU_IMPL_SPARC64 0x01 70#define CPU_IMPL_ULTRASPARCI 0x10 71#define CPU_IMPL_ULTRASPARCII 0x11 72#define CPU_IMPL_ULTRASPARCIIi 0x12 73#define CPU_IMPL_ULTRASPARCIIe 0x13 74#define CPU_IMPL_ULTRASPARCIII 0x14 75#define CPU_IMPL_ULTRASPARCIIIp 0x15 76#define CPU_IMPL_ULTRASPARCIIIi 0x16 77#define CPU_IMPL_ULTRASPARCIV 0x18 78#define CPU_IMPL_ULTRASPARCIVp 0x19 79#define CPU_IMPL_ULTRASPARCIIIip 0x22 80 81#endif /* !_MACHINE_VER_H_ */ | 68extern char sparc64_model[]; 69 70#endif /* !LOCORE */ 71 72/* Known implementations. */ 73#define CPU_IMPL_SPARC64 0x01 74#define CPU_IMPL_ULTRASPARCI 0x10 75#define CPU_IMPL_ULTRASPARCII 0x11 76#define CPU_IMPL_ULTRASPARCIIi 0x12 77#define CPU_IMPL_ULTRASPARCIIe 0x13 78#define CPU_IMPL_ULTRASPARCIII 0x14 79#define CPU_IMPL_ULTRASPARCIIIp 0x15 80#define CPU_IMPL_ULTRASPARCIIIi 0x16 81#define CPU_IMPL_ULTRASPARCIV 0x18 82#define CPU_IMPL_ULTRASPARCIVp 0x19 83#define CPU_IMPL_ULTRASPARCIIIip 0x22 84 85#endif /* !_MACHINE_VER_H_ */ |