| cpufunc.h (182078) | cpufunc.h (182730) |
|---|---|
| 1/*- 2 * Copyright (c) 2001 Jake Burkholder. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * | 1/*- 2 * Copyright (c) 2001 Jake Burkholder. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 9 unchanged lines hidden (view full) --- 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * |
| 26 * $FreeBSD: head/sys/sparc64/include/cpufunc.h 182078 2008-08-23 20:53:27Z marius $ | 26 * $FreeBSD: head/sys/sparc64/include/cpufunc.h 182730 2008-09-03 17:39:19Z marius $ |
| 27 */ 28 29#ifndef _MACHINE_CPUFUNC_H_ 30#define _MACHINE_CPUFUNC_H_ 31 32#include <machine/asi.h> 33#include <machine/pstate.h> 34 --- 134 unchanged lines hidden (view full) --- 169}) 170 171#define wrpr(name, val, xor) do { \ 172 __asm __volatile("wrpr %0, %1, %%" #name \ 173 : : "r" (val), "rI" (xor)); \ 174} while (0) 175 176/* | 27 */ 28 29#ifndef _MACHINE_CPUFUNC_H_ 30#define _MACHINE_CPUFUNC_H_ 31 32#include <machine/asi.h> 33#include <machine/pstate.h> 34 --- 134 unchanged lines hidden (view full) --- 169}) 170 171#define wrpr(name, val, xor) do { \ 172 __asm __volatile("wrpr %0, %1, %%" #name \ 173 : : "r" (val), "rI" (xor)); \ 174} while (0) 175 176/* |
| 177 * Trick GAS/GCC into compiling access to STICK/STICK_COMPARE independently 178 * of the selected instruction set. 179 */ 180#define rdstick() rd(asr24) 181#define rdstickcmpr() rd(asr25) 182#define wrstick(val, xor) wr(asr24, (val), (xor)) 183#define wrstickcmpr(val, xor) wr(asr25, (val), (xor)) 184 185/* |
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| 177 * Macro intended to be used instead of wr(asr23, val, xor) for writing to 178 * the TICK_COMPARE register in order to avoid a bug in BlackBird CPUs that 179 * can cause these writes to fail under certain condidtions which in turn 180 * causes the hardclock to stop. The workaround is to read the TICK_COMPARE 181 * register back immediately after writing to it with these two instructions 182 * aligned to a quadword boundary in order to ensure that I$ misses won't 183 * split them up. 184 */ --- 75 unchanged lines hidden --- | 186 * Macro intended to be used instead of wr(asr23, val, xor) for writing to 187 * the TICK_COMPARE register in order to avoid a bug in BlackBird CPUs that 188 * can cause these writes to fail under certain condidtions which in turn 189 * causes the hardclock to stop. The workaround is to read the TICK_COMPARE 190 * register back immediately after writing to it with these two instructions 191 * aligned to a quadword boundary in order to ensure that I$ misses won't 192 * split them up. 193 */ --- 75 unchanged lines hidden --- |