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pmu.c (261177) pmu.c (262675)
1/*-
2 * Copyright (c) 2006 Michael Lorenz
3 * Copyright 2008 by Nathan Whitehorn
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

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22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 */
28
29#include <sys/cdefs.h>
1/*-
2 * Copyright (c) 2006 Michael Lorenz
3 * Copyright 2008 by Nathan Whitehorn
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:

--- 13 unchanged lines hidden (view full) ---

22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 *
27 */
28
29#include <sys/cdefs.h>
30__FBSDID("$FreeBSD: stable/10/sys/powerpc/powermac/pmu.c 261177 2014-01-26 02:23:16Z jhibbits $");
30__FBSDID("$FreeBSD: stable/10/sys/powerpc/powermac/pmu.c 262675 2014-03-02 02:35:46Z jhibbits $");
31
32#include <sys/param.h>
33#include <sys/systm.h>
34#include <sys/module.h>
35#include <sys/bus.h>
36#include <sys/conf.h>
37#include <sys/kernel.h>
38#include <sys/clock.h>
39#include <sys/proc.h>
40#include <sys/reboot.h>
41#include <sys/sysctl.h>
42
43#include <dev/ofw/ofw_bus.h>
44#include <dev/ofw/openfirm.h>
45#include <dev/led/led.h>
46
47#include <machine/_inttypes.h>
31
32#include <sys/param.h>
33#include <sys/systm.h>
34#include <sys/module.h>
35#include <sys/bus.h>
36#include <sys/conf.h>
37#include <sys/kernel.h>
38#include <sys/clock.h>
39#include <sys/proc.h>
40#include <sys/reboot.h>
41#include <sys/sysctl.h>
42
43#include <dev/ofw/ofw_bus.h>
44#include <dev/ofw/openfirm.h>
45#include <dev/led/led.h>
46
47#include <machine/_inttypes.h>
48#include <machine/altivec.h> /* For save_vec() */
49#include <machine/bus.h>
50#include <machine/cpu.h>
48#include <machine/bus.h>
49#include <machine/cpu.h>
51#include <machine/fpu.h> /* For save_fpu() */
52#include <machine/hid.h>
53#include <machine/intr_machdep.h>
54#include <machine/md_var.h>
55#include <machine/pcb.h>
56#include <machine/pio.h>
57#include <machine/resource.h>
50#include <machine/hid.h>
51#include <machine/intr_machdep.h>
52#include <machine/md_var.h>
53#include <machine/pcb.h>
54#include <machine/pio.h>
55#include <machine/resource.h>
58#include <machine/setjmp.h>
59
60#include <vm/vm.h>
61#include <vm/pmap.h>
62
63#include <sys/rman.h>
64
65#include <dev/adb/adb.h>
66

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101
102static void pmu_shutdown(void *xsc, int howto);
103static void pmu_set_sleepled(void *xsc, int onoff);
104static int pmu_server_mode(SYSCTL_HANDLER_ARGS);
105static int pmu_acline_state(SYSCTL_HANDLER_ARGS);
106static int pmu_query_battery(struct pmu_softc *sc, int batt,
107 struct pmu_battstate *info);
108static int pmu_battquery_sysctl(SYSCTL_HANDLER_ARGS);
56
57#include <vm/vm.h>
58#include <vm/pmap.h>
59
60#include <sys/rman.h>
61
62#include <dev/adb/adb.h>
63

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98
99static void pmu_shutdown(void *xsc, int howto);
100static void pmu_set_sleepled(void *xsc, int onoff);
101static int pmu_server_mode(SYSCTL_HANDLER_ARGS);
102static int pmu_acline_state(SYSCTL_HANDLER_ARGS);
103static int pmu_query_battery(struct pmu_softc *sc, int batt,
104 struct pmu_battstate *info);
105static int pmu_battquery_sysctl(SYSCTL_HANDLER_ARGS);
109static void pmu_sleep_int(void);
110
111/*
112 * List of battery-related sysctls we might ask for
113 */
114
115enum {
116 PMU_BATSYSCTL_PRESENT = 1 << 8,
117 PMU_BATSYSCTL_CHARGING = 2 << 8,

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1026
1027 mtx_lock(&sc->sc_mutex);
1028 pmu_send(sc, PMU_SET_RTC, sizeof(sec), (uint8_t *)&sec, 0, NULL);
1029 mtx_unlock(&sc->sc_mutex);
1030
1031 return (0);
1032}
1033
106
107/*
108 * List of battery-related sysctls we might ask for
109 */
110
111enum {
112 PMU_BATSYSCTL_PRESENT = 1 << 8,
113 PMU_BATSYSCTL_CHARGING = 2 << 8,

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1022
1023 mtx_lock(&sc->sc_mutex);
1024 pmu_send(sc, PMU_SET_RTC, sizeof(sec), (uint8_t *)&sec, 0, NULL);
1025 mtx_unlock(&sc->sc_mutex);
1026
1027 return (0);
1028}
1029
1034static register_t sprgs[4];
1035static register_t srrs[2];
1036extern void *ap_pcpu;
1037
1038void pmu_sleep_int(void)
1039{
1040 static u_quad_t timebase = 0;
1041 jmp_buf resetjb;
1042 struct thread *fputd;
1043 struct thread *vectd;
1044 register_t hid0;
1045 register_t msr;
1046 register_t saved_msr;
1047
1048 ap_pcpu = pcpup;
1049
1050 PCPU_SET(restore, &resetjb);
1051
1052 *(unsigned long *)0x80 = 0x100;
1053 saved_msr = mfmsr();
1054 fputd = PCPU_GET(fputhread);
1055 vectd = PCPU_GET(vecthread);
1056 if (fputd != NULL)
1057 save_fpu(fputd);
1058 if (vectd != NULL)
1059 save_vec(vectd);
1060 if (setjmp(resetjb) == 0) {
1061 sprgs[0] = mfspr(SPR_SPRG0);
1062 sprgs[1] = mfspr(SPR_SPRG1);
1063 sprgs[2] = mfspr(SPR_SPRG2);
1064 sprgs[3] = mfspr(SPR_SPRG3);
1065 srrs[0] = mfspr(SPR_SRR0);
1066 srrs[1] = mfspr(SPR_SRR1);
1067 timebase = mftb();
1068 powerpc_sync();
1069 flush_disable_caches();
1070 hid0 = mfspr(SPR_HID0);
1071 hid0 = (hid0 & ~(HID0_DOZE | HID0_NAP)) | HID0_SLEEP;
1072 powerpc_sync();
1073 isync();
1074 msr = mfmsr() | PSL_POW;
1075 mtspr(SPR_HID0, hid0);
1076 powerpc_sync();
1077
1078 while (1)
1079 mtmsr(msr);
1080 }
1081 mttb(timebase);
1082 PCPU_SET(curthread, curthread);
1083 PCPU_SET(curpcb, curthread->td_pcb);
1084 pmap_activate(curthread);
1085 powerpc_sync();
1086 mtspr(SPR_SPRG0, sprgs[0]);
1087 mtspr(SPR_SPRG1, sprgs[1]);
1088 mtspr(SPR_SPRG2, sprgs[2]);
1089 mtspr(SPR_SPRG3, sprgs[3]);
1090 mtspr(SPR_SRR0, srrs[0]);
1091 mtspr(SPR_SRR1, srrs[1]);
1092 mtmsr(saved_msr);
1093 if (fputd == curthread)
1094 enable_fpu(curthread);
1095 if (vectd == curthread)
1096 enable_vec(curthread);
1097 powerpc_sync();
1098}
1099
1100int
1101pmu_set_speed(int low_speed)
1102{
1103 struct pmu_softc *sc;
1104 uint8_t sleepcmd[] = {'W', 'O', 'O', 'F', 0};
1105 uint8_t resp[16];
1106
1107 sc = device_get_softc(pmu);
1108 pmu_write_reg(sc, vIER, 0x10);
1109 spinlock_enter();
1110 mtdec(0x7fffffff);
1111 mb();
1112 mtdec(0x7fffffff);
1113
1114 sleepcmd[4] = low_speed;
1115 pmu_send(sc, PMU_CPU_SPEED, 5, sleepcmd, 16, resp);
1116 unin_chip_sleep(NULL, 1);
1030int
1031pmu_set_speed(int low_speed)
1032{
1033 struct pmu_softc *sc;
1034 uint8_t sleepcmd[] = {'W', 'O', 'O', 'F', 0};
1035 uint8_t resp[16];
1036
1037 sc = device_get_softc(pmu);
1038 pmu_write_reg(sc, vIER, 0x10);
1039 spinlock_enter();
1040 mtdec(0x7fffffff);
1041 mb();
1042 mtdec(0x7fffffff);
1043
1044 sleepcmd[4] = low_speed;
1045 pmu_send(sc, PMU_CPU_SPEED, 5, sleepcmd, 16, resp);
1046 unin_chip_sleep(NULL, 1);
1117 pmu_sleep_int();
1047 platform_sleep();
1118 unin_chip_wake(NULL);
1119
1120 mtdec(1); /* Force a decrementer exception */
1121 spinlock_exit();
1122 pmu_write_reg(sc, vIER, 0x90);
1123
1124 return (0);
1125}
1048 unin_chip_wake(NULL);
1049
1050 mtdec(1); /* Force a decrementer exception */
1051 spinlock_exit();
1052 pmu_write_reg(sc, vIER, 0x90);
1053
1054 return (0);
1055}