1/*- 2 * Copyright (c) 2006-2008, Juniper Networks, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 *
| 1/*- 2 * Copyright (c) 2006-2008, Juniper Networks, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 *
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26 * $FreeBSD: head/sys/powerpc/mpc85xx/lbc.h 195799 2009-07-21 08:38:45Z raj $
| 26 * $FreeBSD: head/sys/powerpc/mpc85xx/lbc.h 209908 2010-07-11 21:08:29Z raj $
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27 */ 28 29#ifndef _MACHINE_LBC_H_ 30#define _MACHINE_LBC_H_ 31
| 27 */ 28 29#ifndef _MACHINE_LBC_H_ 30#define _MACHINE_LBC_H_ 31
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32#define LBC_IVAR_DEVTYPE 1 33
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34/* Maximum number of devices on Local Bus */ 35#define LBC_DEV_MAX 8 36
| 32/* Maximum number of devices on Local Bus */ 33#define LBC_DEV_MAX 8 34
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37/* Device types. */ 38#define LBC_DEVTYPE_CFI 1 39#define LBC_DEVTYPE_RTC 2 40
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41/* Local access registers */ 42#define LBC85XX_BR(n) (8 * n) 43#define LBC85XX_OR(n) (4 + (8 * n)) 44#define LBC85XX_LBCR (0xd0) 45#define LBC85XX_LCRR (0xd4) 46 47/* LBC machine select */ 48#define LBCRES_MSEL_GPCM 0 49#define LBCRES_MSEL_FCM 1 50#define LBCRES_MSEL_UPMA 8 51#define LBCRES_MSEL_UPMB 9 52#define LBCRES_MSEL_UPMC 10 53 54/* LBC data error checking modes */ 55#define LBCRES_DECC_DISABLED 0 56#define LBCRES_DECC_NORMAL 1 57#define LBCRES_DECC_RMW 2 58 59/* LBC atomic operation modes */ 60#define LBCRES_ATOM_DISABLED 0 61#define LBCRES_ATOM_RAWA 1 62#define LBCRES_ATOM_WARA 2 63
| 35/* Local access registers */ 36#define LBC85XX_BR(n) (8 * n) 37#define LBC85XX_OR(n) (4 + (8 * n)) 38#define LBC85XX_LBCR (0xd0) 39#define LBC85XX_LCRR (0xd4) 40 41/* LBC machine select */ 42#define LBCRES_MSEL_GPCM 0 43#define LBCRES_MSEL_FCM 1 44#define LBCRES_MSEL_UPMA 8 45#define LBCRES_MSEL_UPMB 9 46#define LBCRES_MSEL_UPMC 10 47 48/* LBC data error checking modes */ 49#define LBCRES_DECC_DISABLED 0 50#define LBCRES_DECC_NORMAL 1 51#define LBCRES_DECC_RMW 2 52 53/* LBC atomic operation modes */ 54#define LBCRES_ATOM_DISABLED 0 55#define LBCRES_ATOM_RAWA 1 56#define LBCRES_ATOM_WARA 2 57
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64struct lbc_resource { 65 int lbr_devtype; /* LBC device type */ 66 int lbr_unit; /* Resource table entry number */ 67 vm_paddr_t lbr_base_addr; /* Device mem region base address */ 68 size_t lbr_size; /* Device mem region size */ 69 int lbr_port_size; /* Data bus width */ 70 uint8_t lbr_msel; /* LBC machine select */ 71 uint8_t lbr_decc; /* Data error checking mode */ 72 uint8_t lbr_atom; /* Atomic operation mode */ 73 uint8_t lbr_wp; /* Write protect */
| 58struct lbc_bank { 59 u_long pa; /* physical addr of the bank */ 60 u_long size; /* bank size */ 61 vm_offset_t va; /* VA of the bank */ 62 63 /* 64 * XXX the following bank attributes do not have properties specified 65 * in the LBC DTS bindings yet (11.2009), so they are mainly a 66 * placeholder for future extensions. 67 */ 68 int width; /* data bus width */ 69 uint8_t msel; /* machine select */ 70 uint8_t atom; /* atomic op mode */ 71 uint8_t wp; /* write protect */ 72 uint8_t decc; /* data error checking */
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74}; 75
| 73}; 74
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76extern const struct lbc_resource mpc85xx_lbc_resources[];
| 75struct lbc_softc { 76 device_t sc_dev; 77 struct resource *sc_res; 78 bus_space_handle_t sc_bsh; 79 bus_space_tag_t sc_bst; 80 int sc_rid;
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77
| 81
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| 82 struct rman sc_rman; 83 84 int sc_addr_cells; 85 int sc_size_cells; 86 87 struct lbc_bank sc_banks[LBC_DEV_MAX]; 88}; 89 90struct lbc_devinfo { 91 struct ofw_bus_devinfo di_ofw; 92 struct resource_list di_res; 93 int di_bank; 94}; 95
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78#endif /* _MACHINE_LBC_H_ */
| 96#endif /* _MACHINE_LBC_H_ */
|