| platform_bare.c (236325) | platform_bare.c (242526) |
|---|---|
| 1/*- 2 * Copyright (c) 2008-2012 Semihalf. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * --- 11 unchanged lines hidden (view full) --- 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2008-2012 Semihalf. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * --- 11 unchanged lines hidden (view full) --- 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> |
| 28__FBSDID("$FreeBSD: head/sys/powerpc/booke/platform_bare.c 236325 2012-05-30 18:05:48Z raj $"); | 28__FBSDID("$FreeBSD: head/sys/powerpc/booke/platform_bare.c 242526 2012-11-03 22:02:12Z marcel $"); |
| 29 30#include <sys/param.h> 31#include <sys/systm.h> 32#include <sys/kernel.h> 33#include <sys/bus.h> 34#include <sys/pcpu.h> 35#include <sys/proc.h> 36#include <sys/smp.h> --- 13 unchanged lines hidden (view full) --- 50#include <dev/ofw/openfirm.h> 51 52#include <powerpc/mpc85xx/mpc85xx.h> 53 54#include "platform_if.h" 55 56#ifdef SMP 57extern void *ap_pcpu; | 29 30#include <sys/param.h> 31#include <sys/systm.h> 32#include <sys/kernel.h> 33#include <sys/bus.h> 34#include <sys/pcpu.h> 35#include <sys/proc.h> 36#include <sys/smp.h> --- 13 unchanged lines hidden (view full) --- 50#include <dev/ofw/openfirm.h> 51 52#include <powerpc/mpc85xx/mpc85xx.h> 53 54#include "platform_if.h" 55 56#ifdef SMP 57extern void *ap_pcpu; |
| 58extern vm_paddr_t kernload; /* Kernel physical load address */ |
|
| 58extern uint8_t __boot_page[]; /* Boot page body */ | 59extern uint8_t __boot_page[]; /* Boot page body */ |
| 59extern uint32_t bp_kernload; /* Kernel physical load address */ 60extern uint32_t bp_trace; /* AP boot trace field */ | 60extern uint32_t bp_ntlb1s; 61extern uint32_t bp_tlb1[]; 62extern uint32_t bp_tlb1_end[]; |
| 61#endif 62 63extern uint32_t *bootinfo; 64 65static int cpu, maxcpu; 66 67static int bare_probe(platform_t); 68static void bare_mem_regions(platform_t, struct mem_region **phys, int *physsz, --- 174 unchanged lines hidden (view full) --- 243 244 return (0); 245} 246 247static int 248bare_smp_start_cpu(platform_t plat, struct pcpu *pc) 249{ 250#ifdef SMP | 63#endif 64 65extern uint32_t *bootinfo; 66 67static int cpu, maxcpu; 68 69static int bare_probe(platform_t); 70static void bare_mem_regions(platform_t, struct mem_region **phys, int *physsz, --- 174 unchanged lines hidden (view full) --- 245 246 return (0); 247} 248 249static int 250bare_smp_start_cpu(platform_t plat, struct pcpu *pc) 251{ 252#ifdef SMP |
| 253 uint32_t *tlb1; |
|
| 251 uint32_t bptr, eebpcr; | 254 uint32_t bptr, eebpcr; |
| 252 int timeout; | 255 int i, timeout; |
| 253 254 eebpcr = ccsr_read4(OCP85XX_EEBPCR); 255 if ((eebpcr & (1 << (pc->pc_cpuid + 24))) != 0) { 256 printf("SMP: CPU %d already out of hold-off state!\n", 257 pc->pc_cpuid); 258 return (ENXIO); 259 } 260 261 ap_pcpu = pc; | 256 257 eebpcr = ccsr_read4(OCP85XX_EEBPCR); 258 if ((eebpcr & (1 << (pc->pc_cpuid + 24))) != 0) { 259 printf("SMP: CPU %d already out of hold-off state!\n", 260 pc->pc_cpuid); 261 return (ENXIO); 262 } 263 264 ap_pcpu = pc; |
| 262 __asm __volatile("msync; isync"); | |
| 263 | 265 |
| 266 i = 0; 267 tlb1 = bp_tlb1; 268 while (i < bp_ntlb1s && tlb1 < bp_tlb1_end) { 269 mtspr(SPR_MAS0, MAS0_TLBSEL(1) | MAS0_ESEL(i)); 270 __asm __volatile("isync; tlbre"); 271 tlb1[0] = mfspr(SPR_MAS1); 272 tlb1[1] = mfspr(SPR_MAS2); 273 tlb1[2] = mfspr(SPR_MAS3); 274 i++; 275 tlb1 += 3; 276 } 277 if (i < bp_ntlb1s) 278 bp_ntlb1s = i; 279 |
|
| 264 /* 265 * Set BPTR to the physical address of the boot page 266 */ | 280 /* 281 * Set BPTR to the physical address of the boot page 282 */ |
| 267 bptr = ((uint32_t)__boot_page - KERNBASE) + bp_kernload; 268 ccsr_write4(OCP85XX_BPTR, (bptr >> 12) | 0x80000000); | 283 bptr = ((uint32_t)__boot_page - KERNBASE) + kernload; 284 KASSERT((bptr & 0xfff) == 0, 285 ("%s: boot page is not aligned (%#x)", __func__, bptr)); 286 bptr = (bptr >> 12) | 0x80000000u; 287 ccsr_write4(OCP85XX_BPTR, bptr); 288 __asm __volatile("isync; msync"); |
| 269 | 289 |
| 290 /* Flush caches to have our changes hit DRAM. */ 291 cpu_flush_dcache(__boot_page, 4096); 292 |
|
| 270 /* 271 * Release AP from hold-off state 272 */ | 293 /* 294 * Release AP from hold-off state 295 */ |
| 273 bp_trace = 0; | |
| 274 eebpcr |= (1 << (pc->pc_cpuid + 24)); 275 ccsr_write4(OCP85XX_EEBPCR, eebpcr); 276 __asm __volatile("isync; msync"); 277 278 timeout = 500; 279 while (!pc->pc_awake && timeout--) 280 DELAY(1000); /* wait 1ms */ 281 282 /* 283 * Disable boot page translation so that the 4K page at the default 284 * address (= 0xfffff000) isn't permanently remapped and thus not 285 * usable otherwise. 286 */ 287 ccsr_write4(OCP85XX_BPTR, 0); | 296 eebpcr |= (1 << (pc->pc_cpuid + 24)); 297 ccsr_write4(OCP85XX_EEBPCR, eebpcr); 298 __asm __volatile("isync; msync"); 299 300 timeout = 500; 301 while (!pc->pc_awake && timeout--) 302 DELAY(1000); /* wait 1ms */ 303 304 /* 305 * Disable boot page translation so that the 4K page at the default 306 * address (= 0xfffff000) isn't permanently remapped and thus not 307 * usable otherwise. 308 */ 309 ccsr_write4(OCP85XX_BPTR, 0); |
| 310 __asm __volatile("isync; msync"); |
|
| 288 289 if (!pc->pc_awake) | 311 312 if (!pc->pc_awake) |
| 290 printf("SMP: CPU %d didn't wake up (trace code %#x).\n", 291 pc->pc_awake, bp_trace); | 313 printf("SMP: CPU %d didn't wake up.\n", pc->pc_cpuid); |
| 292 return ((pc->pc_awake) ? 0 : EBUSY); 293#else 294 /* No SMP support */ 295 return (ENXIO); 296#endif 297} 298 299static void --- 25 unchanged lines hidden --- | 314 return ((pc->pc_awake) ? 0 : EBUSY); 315#else 316 /* No SMP support */ 317 return (ENXIO); 318#endif 319} 320 321static void --- 25 unchanged lines hidden --- |