| platform_bare.c (228201) | platform_bare.c (235932) |
|---|---|
| 1/*- 2 * Copyright (c) 2008-2009 Semihalf, Rafal Jaworowski 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * --- 11 unchanged lines hidden (view full) --- 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2008-2009 Semihalf, Rafal Jaworowski 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * --- 11 unchanged lines hidden (view full) --- 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> |
| 28__FBSDID("$FreeBSD: head/sys/powerpc/booke/platform_bare.c 228201 2011-12-02 15:24:39Z jchandra $"); | 28__FBSDID("$FreeBSD: head/sys/powerpc/booke/platform_bare.c 235932 2012-05-24 20:58:40Z marcel $"); |
| 29 30#include <sys/param.h> 31#include <sys/systm.h> 32#include <sys/kernel.h> 33#include <sys/bus.h> 34#include <sys/pcpu.h> 35#include <sys/proc.h> 36#include <sys/smp.h> --- 14 unchanged lines hidden (view full) --- 51 52#include <powerpc/mpc85xx/mpc85xx.h> 53 54#include "platform_if.h" 55 56#ifdef SMP 57extern void *ap_pcpu; 58extern uint8_t __boot_page[]; /* Boot page body */ | 29 30#include <sys/param.h> 31#include <sys/systm.h> 32#include <sys/kernel.h> 33#include <sys/bus.h> 34#include <sys/pcpu.h> 35#include <sys/proc.h> 36#include <sys/smp.h> --- 14 unchanged lines hidden (view full) --- 51 52#include <powerpc/mpc85xx/mpc85xx.h> 53 54#include "platform_if.h" 55 56#ifdef SMP 57extern void *ap_pcpu; 58extern uint8_t __boot_page[]; /* Boot page body */ |
| 59extern uint32_t kernload_ap; /* Kernel physical load address */ | 59extern uint32_t bp_kernload; /* Kernel physical load address */ 60extern uint32_t bp_trace; /* AP boot trace field */ |
| 60#endif 61 62extern uint32_t *bootinfo; 63 64static int cpu, maxcpu; 65 66static int bare_probe(platform_t); 67static void bare_mem_regions(platform_t, struct mem_region **phys, int *physsz, --- 189 unchanged lines hidden (view full) --- 257bare_smp_start_cpu(platform_t plat, struct pcpu *pc) 258{ 259#ifdef SMP 260 uint32_t bptr, eebpcr; 261 int timeout; 262 263 eebpcr = ccsr_read4(OCP85XX_EEBPCR); 264 if ((eebpcr & (1 << (pc->pc_cpuid + 24))) != 0) { | 61#endif 62 63extern uint32_t *bootinfo; 64 65static int cpu, maxcpu; 66 67static int bare_probe(platform_t); 68static void bare_mem_regions(platform_t, struct mem_region **phys, int *physsz, --- 189 unchanged lines hidden (view full) --- 258bare_smp_start_cpu(platform_t plat, struct pcpu *pc) 259{ 260#ifdef SMP 261 uint32_t bptr, eebpcr; 262 int timeout; 263 264 eebpcr = ccsr_read4(OCP85XX_EEBPCR); 265 if ((eebpcr & (1 << (pc->pc_cpuid + 24))) != 0) { |
| 265 printf("%s: CPU=%d already out of hold-off state!\n", 266 __func__, pc->pc_cpuid); | 266 printf("SMP: CPU %d already out of hold-off state!\n", 267 pc->pc_cpuid); |
| 267 return (ENXIO); 268 } 269 270 ap_pcpu = pc; 271 __asm __volatile("msync; isync"); 272 273 /* 274 * Set BPTR to the physical address of the boot page 275 */ | 268 return (ENXIO); 269 } 270 271 ap_pcpu = pc; 272 __asm __volatile("msync; isync"); 273 274 /* 275 * Set BPTR to the physical address of the boot page 276 */ |
| 276 bptr = ((uint32_t)__boot_page - KERNBASE) + kernload_ap; | 277 bptr = ((uint32_t)__boot_page - KERNBASE) + bp_kernload; |
| 277 ccsr_write4(OCP85XX_BPTR, (bptr >> 12) | 0x80000000); 278 279 /* 280 * Release AP from hold-off state 281 */ | 278 ccsr_write4(OCP85XX_BPTR, (bptr >> 12) | 0x80000000); 279 280 /* 281 * Release AP from hold-off state 282 */ |
| 283 bp_trace = 0; |
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| 282 eebpcr |= (1 << (pc->pc_cpuid + 24)); 283 ccsr_write4(OCP85XX_EEBPCR, eebpcr); 284 __asm __volatile("isync; msync"); 285 286 timeout = 500; 287 while (!pc->pc_awake && timeout--) 288 DELAY(1000); /* wait 1ms */ 289 | 284 eebpcr |= (1 << (pc->pc_cpuid + 24)); 285 ccsr_write4(OCP85XX_EEBPCR, eebpcr); 286 __asm __volatile("isync; msync"); 287 288 timeout = 500; 289 while (!pc->pc_awake && timeout--) 290 DELAY(1000); /* wait 1ms */ 291 |
| 292 /* 293 * Disable boot page translation so that the 4K page at the default 294 * address (= 0xfffff000) isn't permanently remapped and thus not 295 * usable otherwise. 296 */ 297 ccsr_write4(OCP85XX_BPTR, 0); 298 299 if (!pc->pc_awake) 300 printf("SMP: CPU %d didn't wake up (trace code %#x).\n", 301 pc->pc_awake, bp_trace); |
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| 290 return ((pc->pc_awake) ? 0 : EBUSY); 291#else 292 /* No SMP support */ 293 return (ENXIO); 294#endif 295} 296 297static void --- 24 unchanged lines hidden --- | 302 return ((pc->pc_awake) ? 0 : EBUSY); 303#else 304 /* No SMP support */ 305 return (ENXIO); 306#endif 307} 308 309static void --- 24 unchanged lines hidden --- |