| if_rlreg.h (72813) | if_rlreg.h (81713) |
|---|---|
| 1/* 2 * Copyright (c) 1997, 1998 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * | 1/* 2 * Copyright (c) 1997, 1998 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * |
| 32 * $FreeBSD: head/sys/pci/if_rlreg.h 72813 2001-02-21 20:54:22Z wpaul $ | 32 * $FreeBSD: head/sys/pci/if_rlreg.h 81713 2001-08-15 17:38:43Z wpaul $ |
| 33 */ 34 35/* 36 * RealTek 8129/8139 register offsets 37 */ 38#define RL_IDR0 0x0000 /* ID register 0 (station addr) */ 39#define RL_IDR1 0x0001 /* Must use 32-bit accesses (?) */ 40#define RL_IDR2 0x0002 --- 257 unchanged lines hidden (view full) --- 298 299#define RL_RX_BUF_SZ RL_RXBUF_64 300#define RL_RXBUFLEN (1 << ((RL_RX_BUF_SZ >> 11) + 13)) 301#define RL_TX_LIST_CNT 4 302#define RL_MIN_FRAMELEN 60 303#define RL_TXTHRESH(x) ((x) << 11) 304#define RL_TX_THRESH_INIT 96 305#define RL_RX_FIFOTHRESH RL_RXFIFO_256BYTES | 33 */ 34 35/* 36 * RealTek 8129/8139 register offsets 37 */ 38#define RL_IDR0 0x0000 /* ID register 0 (station addr) */ 39#define RL_IDR1 0x0001 /* Must use 32-bit accesses (?) */ 40#define RL_IDR2 0x0002 --- 257 unchanged lines hidden (view full) --- 298 299#define RL_RX_BUF_SZ RL_RXBUF_64 300#define RL_RXBUFLEN (1 << ((RL_RX_BUF_SZ >> 11) + 13)) 301#define RL_TX_LIST_CNT 4 302#define RL_MIN_FRAMELEN 60 303#define RL_TXTHRESH(x) ((x) << 11) 304#define RL_TX_THRESH_INIT 96 305#define RL_RX_FIFOTHRESH RL_RXFIFO_256BYTES |
| 306#define RL_RX_MAXDMA RL_RXDMA_UNLIMITED | 306#define RL_RX_MAXDMA RL_RXDMA_1024BYTES /*RL_RXDMA_UNLIMITED*/ |
| 307#define RL_TX_MAXDMA RL_TXDMA_2048BYTES 308 309#define RL_RXCFG_CONFIG (RL_RX_FIFOTHRESH|RL_RX_MAXDMA|RL_RX_BUF_SZ) 310#define RL_TXCFG_CONFIG (RL_TXCFG_IFG|RL_TX_MAXDMA) 311 312#define RL_ETHER_ALIGN 2 313 314struct rl_chain_data { 315 u_int16_t cur_rx; 316 caddr_t rl_rx_buf; 317 caddr_t rl_rx_buf_ptr; | 307#define RL_TX_MAXDMA RL_TXDMA_2048BYTES 308 309#define RL_RXCFG_CONFIG (RL_RX_FIFOTHRESH|RL_RX_MAXDMA|RL_RX_BUF_SZ) 310#define RL_TXCFG_CONFIG (RL_TXCFG_IFG|RL_TX_MAXDMA) 311 312#define RL_ETHER_ALIGN 2 313 314struct rl_chain_data { 315 u_int16_t cur_rx; 316 caddr_t rl_rx_buf; 317 caddr_t rl_rx_buf_ptr; |
| 318 bus_dmamap_t rl_rx_dmamap; |
|
| 318 319 struct mbuf *rl_tx_chain[RL_TX_LIST_CNT]; | 319 320 struct mbuf *rl_tx_chain[RL_TX_LIST_CNT]; |
| 321 bus_dmamap_t rl_tx_dmamap[RL_TX_LIST_CNT]; |
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| 320 u_int8_t last_tx; 321 u_int8_t cur_tx; 322}; 323 324#define RL_INC(x) (x = (x + 1) % RL_TX_LIST_CNT) 325#define RL_CUR_TXADDR(x) ((x->rl_cdata.cur_tx * 4) + RL_TXADDR0) 326#define RL_CUR_TXSTAT(x) ((x->rl_cdata.cur_tx * 4) + RL_TXSTAT0) 327#define RL_CUR_TXMBUF(x) (x->rl_cdata.rl_tx_chain[x->rl_cdata.cur_tx]) | 322 u_int8_t last_tx; 323 u_int8_t cur_tx; 324}; 325 326#define RL_INC(x) (x = (x + 1) % RL_TX_LIST_CNT) 327#define RL_CUR_TXADDR(x) ((x->rl_cdata.cur_tx * 4) + RL_TXADDR0) 328#define RL_CUR_TXSTAT(x) ((x->rl_cdata.cur_tx * 4) + RL_TXSTAT0) 329#define RL_CUR_TXMBUF(x) (x->rl_cdata.rl_tx_chain[x->rl_cdata.cur_tx]) |
| 330#define RL_CUR_DMAMAP(x) (x->rl_cdata.rl_tx_dmamap[x->rl_cdata.cur_tx]) |
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| 328#define RL_LAST_TXADDR(x) ((x->rl_cdata.last_tx * 4) + RL_TXADDR0) 329#define RL_LAST_TXSTAT(x) ((x->rl_cdata.last_tx * 4) + RL_TXSTAT0) 330#define RL_LAST_TXMBUF(x) (x->rl_cdata.rl_tx_chain[x->rl_cdata.last_tx]) | 331#define RL_LAST_TXADDR(x) ((x->rl_cdata.last_tx * 4) + RL_TXADDR0) 332#define RL_LAST_TXSTAT(x) ((x->rl_cdata.last_tx * 4) + RL_TXSTAT0) 333#define RL_LAST_TXMBUF(x) (x->rl_cdata.rl_tx_chain[x->rl_cdata.last_tx]) |
| 334#define RL_LAST_DMAMAP(x) (x->rl_cdata.rl_tx_dmamap[x->rl_cdata.last_tx]) |
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| 331 332struct rl_type { 333 u_int16_t rl_vid; 334 u_int16_t rl_did; 335 char *rl_name; 336}; 337 338struct rl_mii_frame { --- 19 unchanged lines hidden (view full) --- 358struct rl_softc { 359 struct arpcom arpcom; /* interface info */ 360 bus_space_handle_t rl_bhandle; /* bus space handle */ 361 bus_space_tag_t rl_btag; /* bus space tag */ 362 struct resource *rl_res; 363 struct resource *rl_irq; 364 void *rl_intrhand; 365 device_t rl_miibus; | 335 336struct rl_type { 337 u_int16_t rl_vid; 338 u_int16_t rl_did; 339 char *rl_name; 340}; 341 342struct rl_mii_frame { --- 19 unchanged lines hidden (view full) --- 362struct rl_softc { 363 struct arpcom arpcom; /* interface info */ 364 bus_space_handle_t rl_bhandle; /* bus space handle */ 365 bus_space_tag_t rl_btag; /* bus space tag */ 366 struct resource *rl_res; 367 struct resource *rl_irq; 368 void *rl_intrhand; 369 device_t rl_miibus; |
| 370 bus_dma_tag_t rl_parent_tag; 371 bus_dma_tag_t rl_tag; |
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| 366 u_int8_t rl_unit; /* interface number */ 367 u_int8_t rl_type; 368 int rl_eecmd_read; 369 u_int8_t rl_stats_no_timeout; 370 int rl_txthresh; 371 struct rl_chain_data rl_cdata; 372 struct callout_handle rl_stat_ch; 373 struct mtx rl_mtx; --- 104 unchanged lines hidden (view full) --- 478 479#define RL_PSTATE_MASK 0x0003 480#define RL_PSTATE_D0 0x0000 481#define RL_PSTATE_D1 0x0002 482#define RL_PSTATE_D2 0x0002 483#define RL_PSTATE_D3 0x0003 484#define RL_PME_EN 0x0010 485#define RL_PME_STATUS 0x8000 | 372 u_int8_t rl_unit; /* interface number */ 373 u_int8_t rl_type; 374 int rl_eecmd_read; 375 u_int8_t rl_stats_no_timeout; 376 int rl_txthresh; 377 struct rl_chain_data rl_cdata; 378 struct callout_handle rl_stat_ch; 379 struct mtx rl_mtx; --- 104 unchanged lines hidden (view full) --- 484 485#define RL_PSTATE_MASK 0x0003 486#define RL_PSTATE_D0 0x0000 487#define RL_PSTATE_D1 0x0002 488#define RL_PSTATE_D2 0x0002 489#define RL_PSTATE_D3 0x0003 490#define RL_PME_EN 0x0010 491#define RL_PME_STATUS 0x8000 |
| 486 487#ifdef __alpha__ 488#undef vtophys 489#define vtophys(va) alpha_XXX_dmamap((vm_offset_t)va) 490#endif | |