| if_rlreg.h (217246) | if_rlreg.h (217498) |
|---|---|
| 1/*- 2 * Copyright (c) 1997, 1998-2003 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * | 1/*- 2 * Copyright (c) 1997, 1998-2003 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * |
| 32 * $FreeBSD: head/sys/pci/if_rlreg.h 217246 2011-01-10 23:28:46Z yongari $ | 32 * $FreeBSD: head/sys/pci/if_rlreg.h 217498 2011-01-17 02:23:50Z yongari $ |
| 33 */ 34 35/* 36 * RealTek 8129/8139 register offsets 37 */ 38#define RL_IDR0 0x0000 /* ID register 0 (station addr) */ 39#define RL_IDR1 0x0001 /* Must use 32-bit accesses (?) */ 40#define RL_IDR2 0x0002 --- 119 unchanged lines hidden (view full) --- 160#define RL_HWREV_8110S 0x04000000 161#define RL_HWREV_8169_8110SB 0x10000000 162#define RL_HWREV_8169_8110SC 0x18000000 163#define RL_HWREV_8102EL 0x24800000 164#define RL_HWREV_8102EL_SPIN1 0x24C00000 165#define RL_HWREV_8168D 0x28000000 166#define RL_HWREV_8168DP 0x28800000 167#define RL_HWREV_8168E 0x2C000000 | 33 */ 34 35/* 36 * RealTek 8129/8139 register offsets 37 */ 38#define RL_IDR0 0x0000 /* ID register 0 (station addr) */ 39#define RL_IDR1 0x0001 /* Must use 32-bit accesses (?) */ 40#define RL_IDR2 0x0002 --- 119 unchanged lines hidden (view full) --- 160#define RL_HWREV_8110S 0x04000000 161#define RL_HWREV_8169_8110SB 0x10000000 162#define RL_HWREV_8169_8110SC 0x18000000 163#define RL_HWREV_8102EL 0x24800000 164#define RL_HWREV_8102EL_SPIN1 0x24C00000 165#define RL_HWREV_8168D 0x28000000 166#define RL_HWREV_8168DP 0x28800000 167#define RL_HWREV_8168E 0x2C000000 |
| 168#define RL_HWREV_8168E_VL 0x2C800000 |
|
| 168#define RL_HWREV_8168_SPIN1 0x30000000 169#define RL_HWREV_8100E 0x30800000 170#define RL_HWREV_8101E 0x34000000 171#define RL_HWREV_8102E 0x34800000 172#define RL_HWREV_8103E 0x34C00000 173#define RL_HWREV_8168_SPIN2 0x38000000 174#define RL_HWREV_8168_SPIN3 0x38400000 175#define RL_HWREV_8168C 0x3C000000 --- 942 unchanged lines hidden --- | 169#define RL_HWREV_8168_SPIN1 0x30000000 170#define RL_HWREV_8100E 0x30800000 171#define RL_HWREV_8101E 0x34000000 172#define RL_HWREV_8102E 0x34800000 173#define RL_HWREV_8103E 0x34C00000 174#define RL_HWREV_8168_SPIN2 0x38000000 175#define RL_HWREV_8168_SPIN3 0x38400000 176#define RL_HWREV_8168C 0x3C000000 --- 942 unchanged lines hidden --- |