| if_rlreg.h (186214) | if_rlreg.h (187417) |
|---|---|
| 1/*- 2 * Copyright (c) 1997, 1998-2003 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * | 1/*- 2 * Copyright (c) 1997, 1998-2003 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * |
| 32 * $FreeBSD: head/sys/pci/if_rlreg.h 186214 2008-12-17 08:18:11Z yongari $ | 32 * $FreeBSD: head/sys/pci/if_rlreg.h 187417 2009-01-19 02:31:27Z yongari $ |
| 33 */ 34 35/* 36 * RealTek 8129/8139 register offsets 37 */ 38#define RL_IDR0 0x0000 /* ID register 0 (station addr) */ 39#define RL_IDR1 0x0001 /* Must use 32-bit accesses (?) */ 40#define RL_IDR2 0x0002 --- 891 unchanged lines hidden (view full) --- 932 933#define CSR_SETBIT_4(sc, offset, val) \ 934 CSR_WRITE_4(sc, offset, CSR_READ_4(sc, offset) | (val)) 935 936#define CSR_CLRBIT_4(sc, offset, val) \ 937 CSR_WRITE_4(sc, offset, CSR_READ_4(sc, offset) & ~(val)) 938 939#define RL_TIMEOUT 1000 | 33 */ 34 35/* 36 * RealTek 8129/8139 register offsets 37 */ 38#define RL_IDR0 0x0000 /* ID register 0 (station addr) */ 39#define RL_IDR1 0x0001 /* Must use 32-bit accesses (?) */ 40#define RL_IDR2 0x0002 --- 891 unchanged lines hidden (view full) --- 932 933#define CSR_SETBIT_4(sc, offset, val) \ 934 CSR_WRITE_4(sc, offset, CSR_READ_4(sc, offset) | (val)) 935 936#define CSR_CLRBIT_4(sc, offset, val) \ 937 CSR_WRITE_4(sc, offset, CSR_READ_4(sc, offset) & ~(val)) 938 939#define RL_TIMEOUT 1000 |
| 940#define RL_PHY_TIMEOUT 2000 |
|
| 940 941/* 942 * General constants that are fun to know. 943 * 944 * RealTek PCI vendor ID 945 */ 946#define RT_VENDORID 0x10EC 947 --- 197 unchanged lines hidden --- | 941 942/* 943 * General constants that are fun to know. 944 * 945 * RealTek PCI vendor ID 946 */ 947#define RT_VENDORID 0x10EC 948 --- 197 unchanged lines hidden --- |