| if_rlreg.h (185900) | if_rlreg.h (185901) |
|---|---|
| 1/*- 2 * Copyright (c) 1997, 1998-2003 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * | 1/*- 2 * Copyright (c) 1997, 1998-2003 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * |
| 32 * $FreeBSD: head/sys/pci/if_rlreg.h 185900 2008-12-11 01:26:18Z yongari $ | 32 * $FreeBSD: head/sys/pci/if_rlreg.h 185901 2008-12-11 01:41:38Z yongari $ |
| 33 */ 34 35/* 36 * RealTek 8129/8139 register offsets 37 */ 38#define RL_IDR0 0x0000 /* ID register 0 (station addr) */ 39#define RL_IDR1 0x0001 /* Must use 32-bit accesses (?) */ 40#define RL_IDR2 0x0002 --- 839 unchanged lines hidden (view full) --- 880#define RL_FLAG_INVMAR 0x0004 881#define RL_FLAG_PHYWAKE 0x0008 882#define RL_FLAG_NOJUMBO 0x0010 883#define RL_FLAG_PAR 0x0020 884#define RL_FLAG_DESCV2 0x0040 885#define RL_FLAG_MACSTAT 0x0080 886#define RL_FLAG_FASTETHER 0x0100 887#define RL_FLAG_CMDSTOP 0x0200 | 33 */ 34 35/* 36 * RealTek 8129/8139 register offsets 37 */ 38#define RL_IDR0 0x0000 /* ID register 0 (station addr) */ 39#define RL_IDR1 0x0001 /* Must use 32-bit accesses (?) */ 40#define RL_IDR2 0x0002 --- 839 unchanged lines hidden (view full) --- 880#define RL_FLAG_INVMAR 0x0004 881#define RL_FLAG_PHYWAKE 0x0008 882#define RL_FLAG_NOJUMBO 0x0010 883#define RL_FLAG_PAR 0x0020 884#define RL_FLAG_DESCV2 0x0040 885#define RL_FLAG_MACSTAT 0x0080 886#define RL_FLAG_FASTETHER 0x0100 887#define RL_FLAG_CMDSTOP 0x0200 |
| 888#define RL_FLAG_PHY8169 0x0400 889#define RL_FLAG_PHY8110S 0x0800 |
|
| 888#define RL_FLAG_LINK 0x8000 889}; 890 891#define RL_LOCK(_sc) mtx_lock(&(_sc)->rl_mtx) 892#define RL_UNLOCK(_sc) mtx_unlock(&(_sc)->rl_mtx) 893#define RL_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->rl_mtx, MA_OWNED) 894 895/* --- 242 unchanged lines hidden --- | 890#define RL_FLAG_LINK 0x8000 891}; 892 893#define RL_LOCK(_sc) mtx_lock(&(_sc)->rl_mtx) 894#define RL_UNLOCK(_sc) mtx_unlock(&(_sc)->rl_mtx) 895#define RL_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->rl_mtx, MA_OWNED) 896 897/* --- 242 unchanged lines hidden --- |