| if_rlreg.h (180377) | if_rlreg.h (181270) |
|---|---|
| 1/*- 2 * Copyright (c) 1997, 1998-2003 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * | 1/*- 2 * Copyright (c) 1997, 1998-2003 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * |
| 32 * $FreeBSD: head/sys/pci/if_rlreg.h 180377 2008-07-09 01:58:18Z yongari $ | 32 * $FreeBSD: head/sys/pci/if_rlreg.h 181270 2008-08-04 02:05:09Z yongari $ |
| 33 */ 34 35/* 36 * RealTek 8129/8139 register offsets 37 */ 38#define RL_IDR0 0x0000 /* ID register 0 (station addr) */ 39#define RL_IDR1 0x0001 /* Must use 32-bit accesses (?) */ 40#define RL_IDR2 0x0002 --- 704 unchanged lines hidden (view full) --- 745#define RE_RX_DESC_BUFLEN MCLBYTES 746#endif 747 748#define RL_MSI_MESSAGES 2 749 750#define RL_ADDR_LO(y) ((uint64_t) (y) & 0xFFFFFFFF) 751#define RL_ADDR_HI(y) ((uint64_t) (y) >> 32) 752 | 33 */ 34 35/* 36 * RealTek 8129/8139 register offsets 37 */ 38#define RL_IDR0 0x0000 /* ID register 0 (station addr) */ 39#define RL_IDR1 0x0001 /* Must use 32-bit accesses (?) */ 40#define RL_IDR2 0x0002 --- 704 unchanged lines hidden (view full) --- 745#define RE_RX_DESC_BUFLEN MCLBYTES 746#endif 747 748#define RL_MSI_MESSAGES 2 749 750#define RL_ADDR_LO(y) ((uint64_t) (y) & 0xFFFFFFFF) 751#define RL_ADDR_HI(y) ((uint64_t) (y) >> 32) 752 |
| 753/* 754 * The number of bits reserved for MSS in RealTek controllers is 755 * 11bits. This limits the maximum interface MTU size in TSO case 756 * as upper stack should not generate TCP segments with MSS greater 757 * than the limit. 758 */ 759#define RL_TSO_MTU (2047 - ETHER_HDR_LEN - ETHER_CRC_LEN) 760 |
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| 753/* see comment in dev/re/if_re.c */ 754#define RL_JUMBO_FRAMELEN 7440 755#define RL_JUMBO_MTU (RL_JUMBO_FRAMELEN-ETHER_HDR_LEN-ETHER_CRC_LEN) 756#define RL_MAX_FRAMELEN \ 757 (ETHER_MAX_LEN + ETHER_VLAN_ENCAP_LEN - ETHER_HDR_LEN - ETHER_CRC_LEN) 758 759struct rl_txdesc { 760 struct mbuf *tx_m; --- 331 unchanged lines hidden --- | 761/* see comment in dev/re/if_re.c */ 762#define RL_JUMBO_FRAMELEN 7440 763#define RL_JUMBO_MTU (RL_JUMBO_FRAMELEN-ETHER_HDR_LEN-ETHER_CRC_LEN) 764#define RL_MAX_FRAMELEN \ 765 (ETHER_MAX_LEN + ETHER_VLAN_ENCAP_LEN - ETHER_HDR_LEN - ETHER_CRC_LEN) 766 767struct rl_txdesc { 768 struct mbuf *tx_m; --- 331 unchanged lines hidden --- |