| if_rlreg.h (180177) | if_rlreg.h (180377) |
|---|---|
| 1/*- 2 * Copyright (c) 1997, 1998-2003 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * | 1/*- 2 * Copyright (c) 1997, 1998-2003 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * |
| 32 * $FreeBSD: head/sys/pci/if_rlreg.h 180177 2008-07-02 08:00:14Z yongari $ | 32 * $FreeBSD: head/sys/pci/if_rlreg.h 180377 2008-07-09 01:58:18Z yongari $ |
| 33 */ 34 35/* 36 * RealTek 8129/8139 register offsets 37 */ 38#define RL_IDR0 0x0000 /* ID register 0 (station addr) */ 39#define RL_IDR1 0x0001 /* Must use 32-bit accesses (?) */ 40#define RL_IDR2 0x0002 --- 110 unchanged lines hidden (view full) --- 151 152/* Known revision codes. */ 153 154#define RL_HWREV_8169 0x00000000 155#define RL_HWREV_8110S 0x00800000 156#define RL_HWREV_8169S 0x04000000 157#define RL_HWREV_8169_8110SB 0x10000000 158#define RL_HWREV_8169_8110SC 0x18000000 | 33 */ 34 35/* 36 * RealTek 8129/8139 register offsets 37 */ 38#define RL_IDR0 0x0000 /* ID register 0 (station addr) */ 39#define RL_IDR1 0x0001 /* Must use 32-bit accesses (?) */ 40#define RL_IDR2 0x0002 --- 110 unchanged lines hidden (view full) --- 151 152/* Known revision codes. */ 153 154#define RL_HWREV_8169 0x00000000 155#define RL_HWREV_8110S 0x00800000 156#define RL_HWREV_8169S 0x04000000 157#define RL_HWREV_8169_8110SB 0x10000000 158#define RL_HWREV_8169_8110SC 0x18000000 |
| 159#define RL_HWREV_8102EL 0x24800000 |
|
| 159#define RL_HWREV_8168_SPIN1 0x30000000 160#define RL_HWREV_8100E 0x30800000 161#define RL_HWREV_8101E 0x34000000 | 160#define RL_HWREV_8168_SPIN1 0x30000000 161#define RL_HWREV_8100E 0x30800000 162#define RL_HWREV_8101E 0x34000000 |
| 163#define RL_HWREV_8102E 0x34800000 |
|
| 162#define RL_HWREV_8168_SPIN2 0x38000000 163#define RL_HWREV_8168_SPIN3 0x38400000 164#define RL_HWREV_8168C 0x3C000000 165#define RL_HWREV_8168C_SPIN2 0x3C400000 166#define RL_HWREV_8168CP 0x3C800000 167#define RL_HWREV_8139 0x60000000 168#define RL_HWREV_8139A 0x70000000 169#define RL_HWREV_8139AG 0x70800000 --- 920 unchanged lines hidden --- | 164#define RL_HWREV_8168_SPIN2 0x38000000 165#define RL_HWREV_8168_SPIN3 0x38400000 166#define RL_HWREV_8168C 0x3C000000 167#define RL_HWREV_8168C_SPIN2 0x3C400000 168#define RL_HWREV_8168CP 0x3C800000 169#define RL_HWREV_8139 0x60000000 170#define RL_HWREV_8139A 0x70000000 171#define RL_HWREV_8139AG 0x70800000 --- 920 unchanged lines hidden --- |