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if_rl.c (44238) if_rl.c (45633)
1/*
2 * Copyright (c) 1997, 1998
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 15 unchanged lines hidden (view full) ---

24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
1/*
2 * Copyright (c) 1997, 1998
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 15 unchanged lines hidden (view full) ---

24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $Id: if_rl.c,v 1.22 1999/02/23 06:42:42 wpaul Exp $
32 * $Id: if_rl.c,v 1.30 1999/04/12 21:32:17 wpaul Exp $
33 */
34
35/*
36 * RealTek 8129/8139 PCI NIC driver
37 *
38 * Supports several extremely cheap PCI 10/100 adapters based on
39 * the RealTek chipset. Datasheets can be obtained from
40 * www.realtek.com.tw.

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122 * uniprocessor systems though.
123 */
124#define RL_USEIOSPACE
125
126#include <pci/if_rlreg.h>
127
128#ifndef lint
129static const char rcsid[] =
33 */
34
35/*
36 * RealTek 8129/8139 PCI NIC driver
37 *
38 * Supports several extremely cheap PCI 10/100 adapters based on
39 * the RealTek chipset. Datasheets can be obtained from
40 * www.realtek.com.tw.

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122 * uniprocessor systems though.
123 */
124#define RL_USEIOSPACE
125
126#include <pci/if_rlreg.h>
127
128#ifndef lint
129static const char rcsid[] =
130 "$Id: if_rl.c,v 1.22 1999/02/23 06:42:42 wpaul Exp $";
130 "$Id: if_rl.c,v 1.30 1999/04/12 21:32:17 wpaul Exp $";
131#endif
132
133/*
134 * Various supported device vendors/types and their names.
135 */
136static struct rl_type rl_devs[] = {
137 { RT_VENDORID, RT_DEVICEID_8129,
138 "RealTek 8129 10/100BaseTX" },

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162 { SEEQ_PHY_VENDORID, SEEQ_PHY_80220, "<SEEQ 80220>" },
163 { 0, 0, "<MII-compliant physical interface>" }
164};
165
166static unsigned long rl_count = 0;
167static const char *rl_probe __P((pcici_t, pcidi_t));
168static void rl_attach __P((pcici_t, int));
169
131#endif
132
133/*
134 * Various supported device vendors/types and their names.
135 */
136static struct rl_type rl_devs[] = {
137 { RT_VENDORID, RT_DEVICEID_8129,
138 "RealTek 8129 10/100BaseTX" },

--- 23 unchanged lines hidden (view full) ---

162 { SEEQ_PHY_VENDORID, SEEQ_PHY_80220, "<SEEQ 80220>" },
163 { 0, 0, "<MII-compliant physical interface>" }
164};
165
166static unsigned long rl_count = 0;
167static const char *rl_probe __P((pcici_t, pcidi_t));
168static void rl_attach __P((pcici_t, int));
169
170static int rl_encap __P((struct rl_softc *, struct rl_chain *,
171 struct mbuf * ));
170static int rl_encap __P((struct rl_softc *, struct mbuf * ));
172
173static void rl_rxeof __P((struct rl_softc *));
174static void rl_txeof __P((struct rl_softc *));
171
172static void rl_rxeof __P((struct rl_softc *));
173static void rl_txeof __P((struct rl_softc *));
175static void rl_txeoc __P((struct rl_softc *));
176static void rl_intr __P((void *));
177static void rl_start __P((struct ifnet *));
178static int rl_ioctl __P((struct ifnet *, u_long, caddr_t));
179static void rl_init __P((void *));
180static void rl_stop __P((struct rl_softc *));
181static void rl_watchdog __P((struct ifnet *));
182static void rl_shutdown __P((int, void *));
183static int rl_ifmedia_upd __P((struct ifnet *));

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743 break;
744 case RL_FLAG_SCHEDDELAY:
745 /*
746 * Wait for the transmitter to go idle before starting
747 * an autoneg session, otherwise rl_start() may clobber
748 * our timeout, and we don't want to allow transmission
749 * during an autoneg session since that can screw it up.
750 */
174static void rl_intr __P((void *));
175static void rl_start __P((struct ifnet *));
176static int rl_ioctl __P((struct ifnet *, u_long, caddr_t));
177static void rl_init __P((void *));
178static void rl_stop __P((struct rl_softc *));
179static void rl_watchdog __P((struct ifnet *));
180static void rl_shutdown __P((int, void *));
181static int rl_ifmedia_upd __P((struct ifnet *));

--- 559 unchanged lines hidden (view full) ---

741 break;
742 case RL_FLAG_SCHEDDELAY:
743 /*
744 * Wait for the transmitter to go idle before starting
745 * an autoneg session, otherwise rl_start() may clobber
746 * our timeout, and we don't want to allow transmission
747 * during an autoneg session since that can screw it up.
748 */
751 if (sc->rl_cdata.rl_tx_cnt) {
749 if (sc->rl_cdata.last_tx != sc->rl_cdata.cur_tx) {
752 sc->rl_want_auto = 1;
753 return;
754 }
755 rl_autoneg_xmit(sc);
756 ifp->if_timer = 5;
757 sc->rl_autoneg = 1;
758 sc->rl_want_auto = 0;
759 return;

--- 262 unchanged lines hidden (view full) ---

1022 u_int16_t phy_vid, phy_did, phy_sts;
1023 u_int16_t rl_did = 0;
1024
1025 s = splimp();
1026
1027 sc = malloc(sizeof(struct rl_softc), M_DEVBUF, M_NOWAIT);
1028 if (sc == NULL) {
1029 printf("rl%d: no memory for softc struct!\n", unit);
750 sc->rl_want_auto = 1;
751 return;
752 }
753 rl_autoneg_xmit(sc);
754 ifp->if_timer = 5;
755 sc->rl_autoneg = 1;
756 sc->rl_want_auto = 0;
757 return;

--- 262 unchanged lines hidden (view full) ---

1020 u_int16_t phy_vid, phy_did, phy_sts;
1021 u_int16_t rl_did = 0;
1022
1023 s = splimp();
1024
1025 sc = malloc(sizeof(struct rl_softc), M_DEVBUF, M_NOWAIT);
1026 if (sc == NULL) {
1027 printf("rl%d: no memory for softc struct!\n", unit);
1030 return;
1028 goto fail;
1031 }
1032 bzero(sc, sizeof(struct rl_softc));
1033
1034 /*
1035 * Handle power management nonsense.
1036 */
1037
1038 command = pci_conf_read(config_id, RL_PCI_CAPID) & 0x000000FF;

--- 111 unchanged lines hidden (view full) ---

1150 ifp->if_mtu = ETHERMTU;
1151 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
1152 ifp->if_ioctl = rl_ioctl;
1153 ifp->if_output = ether_output;
1154 ifp->if_start = rl_start;
1155 ifp->if_watchdog = rl_watchdog;
1156 ifp->if_init = rl_init;
1157 ifp->if_baudrate = 10000000;
1029 }
1030 bzero(sc, sizeof(struct rl_softc));
1031
1032 /*
1033 * Handle power management nonsense.
1034 */
1035
1036 command = pci_conf_read(config_id, RL_PCI_CAPID) & 0x000000FF;

--- 111 unchanged lines hidden (view full) ---

1148 ifp->if_mtu = ETHERMTU;
1149 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
1150 ifp->if_ioctl = rl_ioctl;
1151 ifp->if_output = ether_output;
1152 ifp->if_start = rl_start;
1153 ifp->if_watchdog = rl_watchdog;
1154 ifp->if_init = rl_init;
1155 ifp->if_baudrate = 10000000;
1158 ifp->if_snd.ifq_maxlen = RL_TX_LIST_CNT - 1;
1156 ifp->if_snd.ifq_maxlen = IFQ_MAXLEN;
1159
1160 if (sc->rl_type == RL_8129) {
1161 if (bootverbose)
1162 printf("rl%d: probing for a PHY\n", sc->rl_unit);
1163 for (i = RL_PHYADDR_MIN; i < RL_PHYADDR_MAX + 1; i++) {
1164 if (bootverbose)
1165 printf("rl%d: checking address: %d\n",
1166 sc->rl_unit, i);

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1235static int rl_list_tx_init(sc)
1236 struct rl_softc *sc;
1237{
1238 struct rl_chain_data *cd;
1239 int i;
1240
1241 cd = &sc->rl_cdata;
1242 for (i = 0; i < RL_TX_LIST_CNT; i++) {
1157
1158 if (sc->rl_type == RL_8129) {
1159 if (bootverbose)
1160 printf("rl%d: probing for a PHY\n", sc->rl_unit);
1161 for (i = RL_PHYADDR_MIN; i < RL_PHYADDR_MAX + 1; i++) {
1162 if (bootverbose)
1163 printf("rl%d: checking address: %d\n",
1164 sc->rl_unit, i);

--- 68 unchanged lines hidden (view full) ---

1233static int rl_list_tx_init(sc)
1234 struct rl_softc *sc;
1235{
1236 struct rl_chain_data *cd;
1237 int i;
1238
1239 cd = &sc->rl_cdata;
1240 for (i = 0; i < RL_TX_LIST_CNT; i++) {
1243 cd->rl_tx_chain[i].rl_desc = i * 4;
1244 CSR_WRITE_4(sc, RL_TXADDR0 + cd->rl_tx_chain[i].rl_desc, 0);
1245 CSR_WRITE_4(sc, RL_TXSTAT0 + cd->rl_tx_chain[i].rl_desc, 0);
1246 if (i == (RL_TX_LIST_CNT - 1))
1247 cd->rl_tx_chain[i].rl_next = &cd->rl_tx_chain[0];
1248 else
1249 cd->rl_tx_chain[i].rl_next = &cd->rl_tx_chain[i + 1];
1241 cd->rl_tx_chain[i] = NULL;
1242 CSR_WRITE_4(sc, RL_TXADDR0 + i, 0x0000000);
1250 }
1251
1243 }
1244
1252 sc->rl_cdata.rl_tx_cnt = 0;
1253 cd->rl_tx_cur = cd->rl_tx_free = &cd->rl_tx_chain[0];
1245 sc->rl_cdata.cur_tx = 0;
1246 sc->rl_cdata.last_tx = 0;
1254
1255 return(0);
1256}
1257
1258/*
1259 * A frame has been uploaded: pass the resulting mbuf chain up to
1260 * the higher level protocols.
1261 *

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1419
1420/*
1421 * A frame was downloaded to the chip. It's safe for us to clean up
1422 * the list buffers.
1423 */
1424static void rl_txeof(sc)
1425 struct rl_softc *sc;
1426{
1247
1248 return(0);
1249}
1250
1251/*
1252 * A frame has been uploaded: pass the resulting mbuf chain up to
1253 * the higher level protocols.
1254 *

--- 157 unchanged lines hidden (view full) ---

1412
1413/*
1414 * A frame was downloaded to the chip. It's safe for us to clean up
1415 * the list buffers.
1416 */
1417static void rl_txeof(sc)
1418 struct rl_softc *sc;
1419{
1427 struct rl_chain *cur_tx;
1428 struct ifnet *ifp;
1429 u_int32_t txstat;
1430
1431 ifp = &sc->arpcom.ac_if;
1432
1433 /* Clear the timeout timer. */
1434 ifp->if_timer = 0;
1435
1436 /*
1437 * Go through our tx list and free mbufs for those
1438 * frames that have been uploaded.
1439 */
1420 struct ifnet *ifp;
1421 u_int32_t txstat;
1422
1423 ifp = &sc->arpcom.ac_if;
1424
1425 /* Clear the timeout timer. */
1426 ifp->if_timer = 0;
1427
1428 /*
1429 * Go through our tx list and free mbufs for those
1430 * frames that have been uploaded.
1431 */
1440 if (sc->rl_cdata.rl_tx_free == NULL)
1441 return;
1442
1443 while(sc->rl_cdata.rl_tx_free->rl_mbuf != NULL) {
1444 cur_tx = sc->rl_cdata.rl_tx_free;
1445 txstat = CSR_READ_4(sc, RL_TXSTAT0 + cur_tx->rl_desc);
1446
1447 if (!(txstat & RL_TXSTAT_TX_OK))
1432 do {
1433 txstat = CSR_READ_4(sc, RL_LAST_TXSTAT(sc));
1434 if (!(txstat & (RL_TXSTAT_TX_OK|
1435 RL_TXSTAT_TX_UNDERRUN|RL_TXSTAT_TXABRT)))
1448 break;
1449
1436 break;
1437
1450 if (txstat & RL_TXSTAT_COLLCNT)
1451 ifp->if_collisions +=
1452 (txstat & RL_TXSTAT_COLLCNT) >> 24;
1438 ifp->if_collisions += (txstat & RL_TXSTAT_COLLCNT) >> 24;
1453
1439
1454 sc->rl_cdata.rl_tx_free = cur_tx->rl_next;
1455
1456 sc->rl_cdata.rl_tx_cnt--;
1457 m_freem(cur_tx->rl_mbuf);
1458 cur_tx->rl_mbuf = NULL;
1459 ifp->if_opackets++;
1460 }
1461
1462 if (!sc->rl_cdata.rl_tx_cnt) {
1440 if (RL_LAST_TXMBUF(sc) != NULL) {
1441 m_freem(RL_LAST_TXMBUF(sc));
1442 RL_LAST_TXMBUF(sc) = NULL;
1443 }
1444 if (txstat & RL_TXSTAT_TX_OK)
1445 ifp->if_opackets++;
1446 else {
1447 ifp->if_oerrors++;
1448 if ((txstat & RL_TXSTAT_TXABRT) ||
1449 (txstat & RL_TXSTAT_OUTOFWIN))
1450 CSR_WRITE_4(sc, RL_TXCFG, RL_TXCFG_CONFIG);
1451 }
1452 RL_INC(sc->rl_cdata.last_tx);
1463 ifp->if_flags &= ~IFF_OACTIVE;
1453 ifp->if_flags &= ~IFF_OACTIVE;
1454 } while (sc->rl_cdata.last_tx != sc->rl_cdata.cur_tx);
1455
1456 if (sc->rl_cdata.last_tx == sc->rl_cdata.cur_tx) {
1464 if (sc->rl_want_auto)
1465 rl_autoneg_mii(sc, RL_FLAG_SCHEDDELAY, 1);
1457 if (sc->rl_want_auto)
1458 rl_autoneg_mii(sc, RL_FLAG_SCHEDDELAY, 1);
1466 } else {
1467 if (ifp->if_snd.ifq_head != NULL)
1468 rl_start(ifp);
1469 }
1470
1471 return;
1472}
1473
1459 }
1460
1461 return;
1462}
1463
1474/*
1475 * TX error handler.
1476 */
1477static void rl_txeoc(sc)
1478 struct rl_softc *sc;
1479{
1480 u_int32_t txstat;
1481 struct rl_chain *cur_tx;
1482 struct ifnet *ifp;
1483
1484 ifp = &sc->arpcom.ac_if;
1485
1486 if (sc->rl_cdata.rl_tx_free == NULL)
1487 return;
1488
1489 while(sc->rl_cdata.rl_tx_free->rl_mbuf != NULL) {
1490 cur_tx = sc->rl_cdata.rl_tx_free;
1491 txstat = CSR_READ_4(sc, RL_TXSTAT0 + cur_tx->rl_desc);
1492
1493 if (!(txstat & RL_TXSTAT_OWN))
1494 break;
1495
1496 if (!(txstat & RL_TXSTAT_TX_OK)) {
1497 ifp->if_oerrors++;
1498 if (txstat & RL_TXSTAT_COLLCNT)
1499 ifp->if_collisions +=
1500 (txstat & RL_TXSTAT_COLLCNT) >> 24;
1501 CSR_WRITE_4(sc, RL_TXADDR0 + cur_tx->rl_desc,
1502 vtophys(mtod(cur_tx->rl_mbuf, caddr_t)));
1503 CSR_WRITE_4(sc, RL_TXSTAT0 + cur_tx->rl_desc,
1504 RL_TX_EARLYTHRESH |
1505 cur_tx->rl_mbuf->m_pkthdr.len);
1506 break;
1507 } else {
1508 if (txstat & RL_TXSTAT_COLLCNT)
1509 ifp->if_collisions +=
1510 (txstat & RL_TXSTAT_COLLCNT) >> 24;
1511 sc->rl_cdata.rl_tx_free = cur_tx->rl_next;
1512
1513 sc->rl_cdata.rl_tx_cnt--;
1514 m_freem(cur_tx->rl_mbuf);
1515 cur_tx->rl_mbuf = NULL;
1516 ifp->if_opackets++;
1517 }
1518 }
1519
1520 return;
1521}
1522
1523static void rl_intr(arg)
1524 void *arg;
1525{
1526 struct rl_softc *sc;
1527 struct ifnet *ifp;
1528 u_int16_t status;
1529
1530 sc = arg;

--- 12 unchanged lines hidden (view full) ---

1543 break;
1544
1545 if (status & RL_ISR_RX_OK)
1546 rl_rxeof(sc);
1547
1548 if (status & RL_ISR_RX_ERR)
1549 rl_rxeof(sc);
1550
1464static void rl_intr(arg)
1465 void *arg;
1466{
1467 struct rl_softc *sc;
1468 struct ifnet *ifp;
1469 u_int16_t status;
1470
1471 sc = arg;

--- 12 unchanged lines hidden (view full) ---

1484 break;
1485
1486 if (status & RL_ISR_RX_OK)
1487 rl_rxeof(sc);
1488
1489 if (status & RL_ISR_RX_ERR)
1490 rl_rxeof(sc);
1491
1551 if (status & RL_ISR_TX_OK)
1492 if ((status & RL_ISR_TX_OK) || (status & RL_ISR_TX_ERR))
1552 rl_txeof(sc);
1553
1493 rl_txeof(sc);
1494
1554 if (status & RL_ISR_TX_ERR)
1555 rl_txeoc(sc);
1556
1557 if (status & RL_ISR_SYSTEM_ERR) {
1558 rl_reset(sc);
1559 rl_init(sc);
1560 }
1561
1562 }
1563
1564 /* Re-enable interrupts. */

--- 5 unchanged lines hidden (view full) ---

1570
1571 return;
1572}
1573
1574/*
1575 * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data
1576 * pointers to the fragment pointers.
1577 */
1495 if (status & RL_ISR_SYSTEM_ERR) {
1496 rl_reset(sc);
1497 rl_init(sc);
1498 }
1499
1500 }
1501
1502 /* Re-enable interrupts. */

--- 5 unchanged lines hidden (view full) ---

1508
1509 return;
1510}
1511
1512/*
1513 * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data
1514 * pointers to the fragment pointers.
1515 */
1578static int rl_encap(sc, c, m_head)
1516static int rl_encap(sc, m_head)
1579 struct rl_softc *sc;
1517 struct rl_softc *sc;
1580 struct rl_chain *c;
1581 struct mbuf *m_head;
1582{
1518 struct mbuf *m_head;
1519{
1583 struct mbuf *m;
1584 struct mbuf *m_new = NULL;
1585
1586 /*
1520 struct mbuf *m_new = NULL;
1521
1522 /*
1587 * There are two possible encapsulation mechanisms
1588 * that we can use: an efficient one, and a very lossy
1589 * one. The efficient one only happens very rarely,
1590 * whereas the lossy one can and most likely will happen
1591 * all the time.
1592 * The efficient case happens if:
1593 * - the packet fits in a single mbuf
1594 * - the packet is 32-bit aligned within the mbuf data area
1595 * In this case, we can DMA from the mbuf directly.
1596 * The lossy case covers everything else. Bah.
1523 * The RealTek is brain damaged and wants longword-aligned
1524 * TX buffers, plus we can only have one fragment buffer
1525 * per packet. We have to copy pretty much all the time.
1597 */
1598
1526 */
1527
1599 m = m_head;
1600
1601 MGETHDR(m_new, M_DONTWAIT, MT_DATA);
1602 if (m_new == NULL) {
1603 printf("rl%d: no memory for tx list", sc->rl_unit);
1604 return(1);
1605 }
1606 if (m_head->m_pkthdr.len > MHLEN) {
1607 MCLGET(m_new, M_DONTWAIT);
1608 if (!(m_new->m_flags & M_EXT)) {

--- 11 unchanged lines hidden (view full) ---

1620
1621 /* Pad frames to at least 60 bytes. */
1622 if (m_head->m_pkthdr.len < RL_MIN_FRAMELEN) {
1623 m_head->m_pkthdr.len +=
1624 (RL_MIN_FRAMELEN - m_head->m_pkthdr.len);
1625 m_head->m_len = m_head->m_pkthdr.len;
1626 }
1627
1528 MGETHDR(m_new, M_DONTWAIT, MT_DATA);
1529 if (m_new == NULL) {
1530 printf("rl%d: no memory for tx list", sc->rl_unit);
1531 return(1);
1532 }
1533 if (m_head->m_pkthdr.len > MHLEN) {
1534 MCLGET(m_new, M_DONTWAIT);
1535 if (!(m_new->m_flags & M_EXT)) {

--- 11 unchanged lines hidden (view full) ---

1547
1548 /* Pad frames to at least 60 bytes. */
1549 if (m_head->m_pkthdr.len < RL_MIN_FRAMELEN) {
1550 m_head->m_pkthdr.len +=
1551 (RL_MIN_FRAMELEN - m_head->m_pkthdr.len);
1552 m_head->m_len = m_head->m_pkthdr.len;
1553 }
1554
1628 c->rl_mbuf = m_head;
1555 RL_CUR_TXMBUF(sc) = m_head;
1629
1630 return(0);
1631}
1632
1633/*
1634 * Main transmit routine.
1635 */
1636
1637static void rl_start(ifp)
1638 struct ifnet *ifp;
1639{
1640 struct rl_softc *sc;
1641 struct mbuf *m_head = NULL;
1556
1557 return(0);
1558}
1559
1560/*
1561 * Main transmit routine.
1562 */
1563
1564static void rl_start(ifp)
1565 struct ifnet *ifp;
1566{
1567 struct rl_softc *sc;
1568 struct mbuf *m_head = NULL;
1642 struct rl_chain *cur_tx = NULL;
1643
1644 sc = ifp->if_softc;
1645
1646 if (sc->rl_autoneg) {
1647 sc->rl_tx_pend = 1;
1648 return;
1649 }
1650
1569
1570 sc = ifp->if_softc;
1571
1572 if (sc->rl_autoneg) {
1573 sc->rl_tx_pend = 1;
1574 return;
1575 }
1576
1651 /*
1652 * Check for an available queue slot. If there are none,
1653 * punt.
1654 */
1655 if (sc->rl_cdata.rl_tx_cur->rl_mbuf != NULL) {
1656 ifp->if_flags |= IFF_OACTIVE;
1657 return;
1658 }
1659
1660 while(sc->rl_cdata.rl_tx_cur->rl_mbuf == NULL) {
1577 while(RL_CUR_TXMBUF(sc) == NULL) {
1661 IF_DEQUEUE(&ifp->if_snd, m_head);
1662 if (m_head == NULL)
1663 break;
1664
1578 IF_DEQUEUE(&ifp->if_snd, m_head);
1579 if (m_head == NULL)
1580 break;
1581
1582 rl_encap(sc, m_head);
1665
1583
1666 /* Pick a descriptor off the free list. */
1667 cur_tx = sc->rl_cdata.rl_tx_cur;
1668 sc->rl_cdata.rl_tx_cur = cur_tx->rl_next;
1669 sc->rl_cdata.rl_tx_cnt++;
1670
1671 /* Pack the data into the descriptor. */
1672 rl_encap(sc, cur_tx, m_head);
1673
1674#if NBPFILTER > 0
1675 /*
1676 * If there's a BPF listener, bounce a copy of this frame
1677 * to him.
1678 */
1679 if (ifp->if_bpf)
1584#if NBPFILTER > 0
1585 /*
1586 * If there's a BPF listener, bounce a copy of this frame
1587 * to him.
1588 */
1589 if (ifp->if_bpf)
1680 bpf_mtap(ifp, cur_tx->rl_mbuf);
1590 bpf_mtap(ifp, RL_CUR_TXMBUF(sc));
1681#endif
1682 /*
1683 * Transmit the frame.
1684 */
1591#endif
1592 /*
1593 * Transmit the frame.
1594 */
1685 CSR_WRITE_4(sc, RL_TXADDR0 + cur_tx->rl_desc,
1686 vtophys(mtod(cur_tx->rl_mbuf, caddr_t)));
1687 CSR_WRITE_4(sc, RL_TXSTAT0 + cur_tx->rl_desc,
1688 RL_TX_EARLYTHRESH | cur_tx->rl_mbuf->m_pkthdr.len);
1595 CSR_WRITE_4(sc, RL_CUR_TXADDR(sc),
1596 vtophys(mtod(RL_CUR_TXMBUF(sc), caddr_t)));
1597 CSR_WRITE_4(sc, RL_CUR_TXSTAT(sc),
1598 RL_TX_EARLYTHRESH | RL_CUR_TXMBUF(sc)->m_pkthdr.len);
1599
1600 RL_INC(sc->rl_cdata.cur_tx);
1689 }
1690
1691 /*
1601 }
1602
1603 /*
1604 * We broke out of the loop because all our TX slots are
1605 * full. Mark the NIC as busy until it drains some of the
1606 * packets from the queue.
1607 */
1608 if (RL_CUR_TXMBUF(sc) != NULL)
1609 ifp->if_flags |= IFF_OACTIVE;
1610
1611 /*
1692 * Set a timeout in case the chip goes out to lunch.
1693 */
1694 ifp->if_timer = 5;
1695
1696 return;
1697}
1698
1699static void rl_init(xsc)

--- 36 unchanged lines hidden (view full) ---

1736 rl_list_tx_init(sc);
1737
1738 /*
1739 * Enable transmit and receive.
1740 */
1741 CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_TX_ENB|RL_CMD_RX_ENB);
1742
1743 /*
1612 * Set a timeout in case the chip goes out to lunch.
1613 */
1614 ifp->if_timer = 5;
1615
1616 return;
1617}
1618
1619static void rl_init(xsc)

--- 36 unchanged lines hidden (view full) ---

1656 rl_list_tx_init(sc);
1657
1658 /*
1659 * Enable transmit and receive.
1660 */
1661 CSR_WRITE_1(sc, RL_COMMAND, RL_CMD_TX_ENB|RL_CMD_RX_ENB);
1662
1663 /*
1744 * Set the buffer size values.
1664 * Set the initial TX and RX configuration.
1745 */
1665 */
1666 CSR_WRITE_4(sc, RL_TXCFG, RL_TXCFG_CONFIG);
1746 CSR_WRITE_4(sc, RL_RXCFG, RL_RXCFG_CONFIG);
1747
1748 /* Set the individual bit to receive frames for this host only. */
1749 rxcfg = CSR_READ_4(sc, RL_RXCFG);
1750 rxcfg |= RL_RXCFG_RX_INDIV;
1751
1752 /* If we want promiscuous mode, set the allframes bit. */
1753 if (ifp->if_flags & IFF_PROMISC) {

--- 172 unchanged lines hidden (view full) ---

1926 return;
1927 }
1928
1929 printf("rl%d: watchdog timeout\n", sc->rl_unit);
1930 ifp->if_oerrors++;
1931 if (!(rl_phy_readreg(sc, PHY_BMSR) & PHY_BMSR_LINKSTAT))
1932 printf("rl%d: no carrier - transceiver cable problem?\n",
1933 sc->rl_unit);
1667 CSR_WRITE_4(sc, RL_RXCFG, RL_RXCFG_CONFIG);
1668
1669 /* Set the individual bit to receive frames for this host only. */
1670 rxcfg = CSR_READ_4(sc, RL_RXCFG);
1671 rxcfg |= RL_RXCFG_RX_INDIV;
1672
1673 /* If we want promiscuous mode, set the allframes bit. */
1674 if (ifp->if_flags & IFF_PROMISC) {

--- 172 unchanged lines hidden (view full) ---

1847 return;
1848 }
1849
1850 printf("rl%d: watchdog timeout\n", sc->rl_unit);
1851 ifp->if_oerrors++;
1852 if (!(rl_phy_readreg(sc, PHY_BMSR) & PHY_BMSR_LINKSTAT))
1853 printf("rl%d: no carrier - transceiver cable problem?\n",
1854 sc->rl_unit);
1934 rl_txeoc(sc);
1935 rl_txeof(sc);
1936 rl_rxeof(sc);
1937 rl_init(sc);
1938
1939 return;
1940}
1941
1942/*

--- 11 unchanged lines hidden (view full) ---

1954
1955 CSR_WRITE_1(sc, RL_COMMAND, 0x00);
1956 CSR_WRITE_2(sc, RL_IMR, 0x0000);
1957
1958 /*
1959 * Free the TX list buffers.
1960 */
1961 for (i = 0; i < RL_TX_LIST_CNT; i++) {
1855 rl_txeof(sc);
1856 rl_rxeof(sc);
1857 rl_init(sc);
1858
1859 return;
1860}
1861
1862/*

--- 11 unchanged lines hidden (view full) ---

1874
1875 CSR_WRITE_1(sc, RL_COMMAND, 0x00);
1876 CSR_WRITE_2(sc, RL_IMR, 0x0000);
1877
1878 /*
1879 * Free the TX list buffers.
1880 */
1881 for (i = 0; i < RL_TX_LIST_CNT; i++) {
1962 if (sc->rl_cdata.rl_tx_chain[i].rl_mbuf != NULL) {
1963 m_freem(sc->rl_cdata.rl_tx_chain[i].rl_mbuf);
1964 sc->rl_cdata.rl_tx_chain[i].rl_mbuf = NULL;
1965 CSR_WRITE_4(sc, RL_TXADDR0 +
1966 sc->rl_cdata.rl_tx_chain[i].rl_desc, 0x00000000);
1882 if (sc->rl_cdata.rl_tx_chain[i] != NULL) {
1883 m_freem(sc->rl_cdata.rl_tx_chain[i]);
1884 sc->rl_cdata.rl_tx_chain[i] = NULL;
1885 CSR_WRITE_4(sc, RL_TXADDR0 + i, 0x0000000);
1967 }
1968 }
1969
1970 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1971
1972 return;
1973}
1974

--- 24 unchanged lines hidden --- 		1886 }
1887 }
1888
1889 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
1890
1891 return;
1892}
1893

--- 24 unchanged lines hidden ---