| if_rl.c (104324) | if_rl.c (105221) |
|---|---|
| 1/* 2 * Copyright (c) 1997, 1998 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * | 1/* 2 * Copyright (c) 1997, 1998 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * |
| 32 * $FreeBSD: head/sys/pci/if_rl.c 104324 2002-10-01 22:27:03Z phk $ | 32 * $FreeBSD: head/sys/pci/if_rl.c 105221 2002-10-16 09:14:59Z phk $ |
| 33 */ 34 35/* 36 * RealTek 8129/8139 PCI NIC driver 37 * 38 * Supports several extremely cheap PCI 10/100 adapters based on 39 * the RealTek chipset. Datasheets can be obtained from 40 * www.realtek.com.tw. --- 85 unchanged lines hidden (view full) --- 126 * uniprocessor systems though. 127 */ 128#define RL_USEIOSPACE 129 130#include <pci/if_rlreg.h> 131 132#ifndef lint 133static const char rcsid[] = | 33 */ 34 35/* 36 * RealTek 8129/8139 PCI NIC driver 37 * 38 * Supports several extremely cheap PCI 10/100 adapters based on 39 * the RealTek chipset. Datasheets can be obtained from 40 * www.realtek.com.tw. --- 85 unchanged lines hidden (view full) --- 126 * uniprocessor systems though. 127 */ 128#define RL_USEIOSPACE 129 130#include <pci/if_rlreg.h> 131 132#ifndef lint 133static const char rcsid[] = |
| 134 "$FreeBSD: head/sys/pci/if_rl.c 104324 2002-10-01 22:27:03Z phk $"; | 134 "$FreeBSD: head/sys/pci/if_rl.c 105221 2002-10-16 09:14:59Z phk $"; |
| 135#endif 136 137/* 138 * Various supported device vendors/types and their names. 139 */ 140static struct rl_type rl_devs[] = { 141 { RT_VENDORID, RT_DEVICEID_8129, 142 "RealTek 8129 10/100BaseTX" }, --- 239 unchanged lines hidden (view full) --- 382/* 383 * MII access routines are provided for the 8129, which 384 * doesn't have a built-in PHY. For the 8139, we fake things 385 * up by diverting rl_phy_readreg()/rl_phy_writereg() to the 386 * direct access PHY registers. 387 */ 388#define MII_SET(x) \ 389 CSR_WRITE_1(sc, RL_MII, \ | 135#endif 136 137/* 138 * Various supported device vendors/types and their names. 139 */ 140static struct rl_type rl_devs[] = { 141 { RT_VENDORID, RT_DEVICEID_8129, 142 "RealTek 8129 10/100BaseTX" }, --- 239 unchanged lines hidden (view full) --- 382/* 383 * MII access routines are provided for the 8129, which 384 * doesn't have a built-in PHY. For the 8139, we fake things 385 * up by diverting rl_phy_readreg()/rl_phy_writereg() to the 386 * direct access PHY registers. 387 */ 388#define MII_SET(x) \ 389 CSR_WRITE_1(sc, RL_MII, \ |
| 390 CSR_READ_1(sc, RL_MII) | x) | 390 CSR_READ_1(sc, RL_MII) | (x)) |
| 391 392#define MII_CLR(x) \ 393 CSR_WRITE_1(sc, RL_MII, \ | 391 392#define MII_CLR(x) \ 393 CSR_WRITE_1(sc, RL_MII, \ |
| 394 CSR_READ_1(sc, RL_MII) & ~x) | 394 CSR_READ_1(sc, RL_MII) & ~(x)) |
| 395 396/* 397 * Sync the PHYs by setting data bit and strobing the clock 32 times. 398 */ 399static void 400rl_mii_sync(sc) 401 struct rl_softc *sc; 402{ --- 1541 unchanged lines hidden --- | 395 396/* 397 * Sync the PHYs by setting data bit and strobing the clock 32 times. 398 */ 399static void 400rl_mii_sync(sc) 401 struct rl_softc *sc; 402{ --- 1541 unchanged lines hidden --- |