1/*-
2 * Copyright (c) 2000 Matthew C. Forman
3 *
4 * Based (heavily) on alpm.c which is:
5 *
6 * Copyright (c) 1998, 1999 Nicolas Souchu
7 * All rights reserved.
8 *
--- 19 unchanged lines hidden (view full) ---
28 * SUCH DAMAGE.
29 */
30
31/*
32 * Power management function/SMBus function support for the AMD 756 chip.
33 */
34
35#include <sys/cdefs.h>
36__FBSDID("$FreeBSD: head/sys/pci/amdpm.c 165951 2007-01-11 19:56:24Z jhb $");
37
38#include <sys/param.h>
39#include <sys/bus.h>
40#include <sys/kernel.h>
41#include <sys/lock.h>
42#include <sys/module.h>
43#include <sys/mutex.h>
44#include <sys/systm.h>
45
46#include <machine/bus.h>
47#include <machine/resource.h>
48#include <sys/rman.h>
49
50#include <dev/pci/pcivar.h>
51#include <dev/pci/pcireg.h>
52
53#include <dev/smbus/smbconf.h>
54#include "smbus_if.h"
55
56#define AMDPM_DEBUG(x) if (amdpm_debug) (x)
57
58#ifdef DEBUG
59static int amdpm_debug = 1;
60#else
--- 42 unchanged lines hidden (view full) ---
103#define AMDSMB_GE_HOST_STC (1<<3)
104#define AMDSMB_GE_CYC_QUICK 0
105#define AMDSMB_GE_CYC_BYTE 1
106#define AMDSMB_GE_CYC_BDATA 2
107#define AMDSMB_GE_CYC_WDATA 3
108#define AMDSMB_GE_CYC_PROCCALL 4
109#define AMDSMB_GE_CYC_BLOCK 5
110
111#define LSB 0x1 /* XXX: Better name: Read/Write? */
112
113#define AMDSMB_HSTADDR (0x04)
114#define AMDSMB_HSTDATA (0x06)
115#define AMDSMB_HSTCMD (0x08)
116#define AMDSMB_HSTDFIFO (0x09)
117#define AMDSMB_HSLVDATA (0x0A)
118#define AMDSMB_HSLVDA (0x0C)
119#define AMDSMB_HSLVDDR (0x0E)
120#define AMDSMB_SNPADDR (0x0F)
121
122struct amdpm_softc {
123 int base;
124 int rid;
125 struct resource *res;
126 bus_space_tag_t smbst;
127 bus_space_handle_t smbsh;
128 device_t smbus;
129 struct mtx lock;
130};
131
132#define AMDPM_LOCK(amdpm) mtx_lock(&(amdpm)->lock)
133#define AMDPM_UNLOCK(amdpm) mtx_unlock(&(amdpm)->lock)
134#define AMDPM_LOCK_ASSERT(amdpm) mtx_assert(&(amdpm)->lock, MA_OWNED)
135
136#define AMDPM_SMBINB(amdpm,register) \
137 (bus_space_read_1(amdpm->smbst, amdpm->smbsh, register))
138#define AMDPM_SMBOUTB(amdpm,register,value) \
139 (bus_space_write_1(amdpm->smbst, amdpm->smbsh, register, value))
140#define AMDPM_SMBINW(amdpm,register) \
141 (bus_space_read_2(amdpm->smbst, amdpm->smbsh, register))
142#define AMDPM_SMBOUTW(amdpm,register,value) \
143 (bus_space_write_2(amdpm->smbst, amdpm->smbsh, register, value))
144
145static int amdpm_detach(device_t dev);
146
147static int
148amdpm_probe(device_t dev)
149{
150 u_long base;
151 u_int16_t vid;
152 u_int16_t did;
153
154 vid = pci_get_vendor(dev);
--- 55 unchanged lines hidden (view full) ---
210
211 if (amdpm_sc->res == NULL) {
212 device_printf(dev, "could not map i/o space\n");
213 return (ENXIO);
214 }
215
216 amdpm_sc->smbst = rman_get_bustag(amdpm_sc->res);
217 amdpm_sc->smbsh = rman_get_bushandle(amdpm_sc->res);
218 mtx_init(&amdpm_sc->lock, device_get_nameunit(dev), "amdpm", MTX_DEF);
219
220 /* Allocate a new smbus device */
221 amdpm_sc->smbus = device_add_child(dev, "smbus", -1);
222 if (!amdpm_sc->smbus) {
223 amdpm_detach(dev);
224 return (EINVAL);
225 }
226
227 bus_generic_attach(dev);
228
229 return (0);
230}
231
232static int
233amdpm_detach(device_t dev)
234{
235 struct amdpm_softc *amdpm_sc = device_get_softc(dev);
236
237 if (amdpm_sc->smbus) {
238 device_delete_child(dev, amdpm_sc->smbus);
239 amdpm_sc->smbus = NULL;
240 }
241
242 mtx_destroy(&amdpm_sc->lock);
243 if (amdpm_sc->res)
244 bus_release_resource(dev, SYS_RES_IOPORT, amdpm_sc->rid,
245 amdpm_sc->res);
246
247 return (0);
248}
249
250static int
--- 10 unchanged lines hidden (view full) ---
261 }
262
263 return (error);
264}
265
266static int
267amdpm_clear(struct amdpm_softc *sc)
268{
269
270 AMDPM_LOCK_ASSERT(sc);
271 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_STATUS, AMDSMB_GS_CLEAR_STS);
272 DELAY(10);
273
274 return (0);
275}
276
277#if 0
278static int
--- 8 unchanged lines hidden (view full) ---
287}
288#endif
289
290static int
291amdpm_idle(struct amdpm_softc *sc)
292{
293 u_short sts;
294
295 AMDPM_LOCK_ASSERT(sc);
296 sts = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_STATUS);
297
298 AMDPM_DEBUG(printf("amdpm: busy? STS=0x%x\n", sts));
299
300 return (~(sts & AMDSMB_GS_HST_STS));
301}
302
303/*
304 * Poll the SMBus controller
305 */
306static int
307amdpm_wait(struct amdpm_softc *sc)
308{
309 int count = 10000;
310 u_short sts = 0;
311 int error;
312
313 AMDPM_LOCK_ASSERT(sc);
314 /* Wait for command to complete (SMBus controller is idle) */
315 while(count--) {
316 DELAY(10);
317 sts = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_STATUS);
318 if (!(sts & AMDSMB_GS_HST_STS))
319 break;
320 }
321
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343
344static int
345amdpm_quick(device_t dev, u_char slave, int how)
346{
347 struct amdpm_softc *sc = (struct amdpm_softc *)device_get_softc(dev);
348 int error;
349 u_short l;
350
351 AMDPM_LOCK(sc);
352 amdpm_clear(sc);
353 if (!amdpm_idle(sc)) {
354 AMDPM_UNLOCK(sc);
355 return (EBUSY);
356 }
357
358 switch (how) {
359 case SMB_QWRITE:
360 AMDPM_DEBUG(printf("amdpm: QWRITE to 0x%x", slave));
361 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave & ~LSB);
362 break;
363 case SMB_QREAD:
364 AMDPM_DEBUG(printf("amdpm: QREAD to 0x%x", slave));
365 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave | LSB);
366 break;
367 default:
368 panic("%s: unknown QUICK command (%x)!", __func__, how);
369 }
370 l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
371 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_QUICK | AMDSMB_GE_HOST_STC);
372
373 error = amdpm_wait(sc);
374
375 AMDPM_DEBUG(printf(", error=0x%x\n", error));
376 AMDPM_UNLOCK(sc);
377
378 return (error);
379}
380
381static int
382amdpm_sendb(device_t dev, u_char slave, char byte)
383{
384 struct amdpm_softc *sc = (struct amdpm_softc *)device_get_softc(dev);
385 int error;
386 u_short l;
387
388 AMDPM_LOCK(sc);
389 amdpm_clear(sc);
390 if (!amdpm_idle(sc)) {
391 AMDPM_UNLOCK(sc);
392 return (SMB_EBUSY);
393 }
394
395 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave & ~LSB);
396 AMDPM_SMBOUTW(sc, AMDSMB_HSTDATA, byte);
397 l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
398 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_BYTE | AMDSMB_GE_HOST_STC);
399
400 error = amdpm_wait(sc);
401
402 AMDPM_DEBUG(printf("amdpm: SENDB to 0x%x, byte=0x%x, error=0x%x\n", slave, byte, error));
403 AMDPM_UNLOCK(sc);
404
405 return (error);
406}
407
408static int
409amdpm_recvb(device_t dev, u_char slave, char *byte)
410{
411 struct amdpm_softc *sc = (struct amdpm_softc *)device_get_softc(dev);
412 int error;
413 u_short l;
414
415 AMDPM_LOCK(sc);
416 amdpm_clear(sc);
417 if (!amdpm_idle(sc)) {
418 AMDPM_UNLOCK(sc);
419 return (SMB_EBUSY);
420 }
421
422 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave | LSB);
423 l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
424 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_BYTE | AMDSMB_GE_HOST_STC);
425
426 if ((error = amdpm_wait(sc)) == SMB_ENOERR)
427 *byte = AMDPM_SMBINW(sc, AMDSMB_HSTDATA);
428
429 AMDPM_DEBUG(printf("amdpm: RECVB from 0x%x, byte=0x%x, error=0x%x\n", slave, *byte, error));
430 AMDPM_UNLOCK(sc);
431
432 return (error);
433}
434
435static int
436amdpm_writeb(device_t dev, u_char slave, char cmd, char byte)
437{
438 struct amdpm_softc *sc = (struct amdpm_softc *)device_get_softc(dev);
439 int error;
440 u_short l;
441
442 AMDPM_LOCK(sc);
443 amdpm_clear(sc);
444 if (!amdpm_idle(sc)) {
445 AMDPM_UNLOCK(sc);
446 return (SMB_EBUSY);
447 }
448
449 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave & ~LSB);
450 AMDPM_SMBOUTW(sc, AMDSMB_HSTDATA, byte);
451 AMDPM_SMBOUTB(sc, AMDSMB_HSTCMD, cmd);
452 l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
453 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_BDATA | AMDSMB_GE_HOST_STC);
454
455 error = amdpm_wait(sc);
456
457 AMDPM_DEBUG(printf("amdpm: WRITEB to 0x%x, cmd=0x%x, byte=0x%x, error=0x%x\n", slave, cmd, byte, error));
458 AMDPM_UNLOCK(sc);
459
460 return (error);
461}
462
463static int
464amdpm_readb(device_t dev, u_char slave, char cmd, char *byte)
465{
466 struct amdpm_softc *sc = (struct amdpm_softc *)device_get_softc(dev);
467 int error;
468 u_short l;
469
470 AMDPM_LOCK(sc);
471 amdpm_clear(sc);
472 if (!amdpm_idle(sc)) {
473 AMDPM_UNLOCK(sc);
474 return (SMB_EBUSY);
475 }
476
477 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave | LSB);
478 AMDPM_SMBOUTB(sc, AMDSMB_HSTCMD, cmd);
479 l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
480 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_BDATA | AMDSMB_GE_HOST_STC);
481
482 if ((error = amdpm_wait(sc)) == SMB_ENOERR)
483 *byte = AMDPM_SMBINW(sc, AMDSMB_HSTDATA);
484
485 AMDPM_DEBUG(printf("amdpm: READB from 0x%x, cmd=0x%x, byte=0x%x, error=0x%x\n", slave, cmd, *byte, error));
486 AMDPM_UNLOCK(sc);
487
488 return (error);
489}
490
491static int
492amdpm_writew(device_t dev, u_char slave, char cmd, short word)
493{
494 struct amdpm_softc *sc = (struct amdpm_softc *)device_get_softc(dev);
495 int error;
496 u_short l;
497
498 AMDPM_LOCK(sc);
499 amdpm_clear(sc);
500 if (!amdpm_idle(sc)) {
501 AMDPM_UNLOCK(sc);
502 return (SMB_EBUSY);
503 }
504
505 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave & ~LSB);
506 AMDPM_SMBOUTW(sc, AMDSMB_HSTDATA, word);
507 AMDPM_SMBOUTB(sc, AMDSMB_HSTCMD, cmd);
508 l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
509 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_WDATA | AMDSMB_GE_HOST_STC);
510
511 error = amdpm_wait(sc);
512
513 AMDPM_DEBUG(printf("amdpm: WRITEW to 0x%x, cmd=0x%x, word=0x%x, error=0x%x\n", slave, cmd, word, error));
514 AMDPM_UNLOCK(sc);
515
516 return (error);
517}
518
519static int
520amdpm_readw(device_t dev, u_char slave, char cmd, short *word)
521{
522 struct amdpm_softc *sc = (struct amdpm_softc *)device_get_softc(dev);
523 int error;
524 u_short l;
525
526 AMDPM_LOCK(sc);
527 amdpm_clear(sc);
528 if (!amdpm_idle(sc)) {
529 AMDPM_UNLOCK(sc);
530 return (SMB_EBUSY);
531 }
532
533 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave | LSB);
534 AMDPM_SMBOUTB(sc, AMDSMB_HSTCMD, cmd);
535 l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
536 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_WDATA | AMDSMB_GE_HOST_STC);
537
538 if ((error = amdpm_wait(sc)) == SMB_ENOERR)
539 *word = AMDPM_SMBINW(sc, AMDSMB_HSTDATA);
540
541 AMDPM_DEBUG(printf("amdpm: READW from 0x%x, cmd=0x%x, word=0x%x, error=0x%x\n", slave, cmd, *word, error));
542 AMDPM_UNLOCK(sc);
543
544 return (error);
545}
546
547static int
548amdpm_bwrite(device_t dev, u_char slave, char cmd, u_char count, char *buf)
549{
550 struct amdpm_softc *sc = (struct amdpm_softc *)device_get_softc(dev);
551 u_char i;
552 int error;
553 u_short l;
554
555 if (count < 1 || count > 32)
556 return (SMB_EINVAL);
557
558 AMDPM_LOCK(sc);
559 amdpm_clear(sc);
560 if (!amdpm_idle(sc)) {
561 AMDPM_UNLOCK(sc);
562 return (SMB_EBUSY);
563 }
564
565 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave & ~LSB);
566
567 /*
568 * Do we have to reset the internal 32-byte buffer?
569 * Can't see how to do this from the data sheet.
570 */
571 AMDPM_SMBOUTW(sc, AMDSMB_HSTDATA, count);
--- 6 unchanged lines hidden (view full) ---
578 AMDPM_SMBOUTB(sc, AMDSMB_HSTCMD, cmd);
579 l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
580 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE,
581 (l & 0xfff8) | AMDSMB_GE_CYC_BLOCK | AMDSMB_GE_HOST_STC);
582
583 error = amdpm_wait(sc);
584
585 AMDPM_DEBUG(printf("amdpm: WRITEBLK to 0x%x, count=0x%x, cmd=0x%x, error=0x%x", slave, count, cmd, error));
586 AMDPM_UNLOCK(sc);
587
588 return (error);
589}
590
591static int
592amdpm_bread(device_t dev, u_char slave, char cmd, u_char *count, char *buf)
593{
594 struct amdpm_softc *sc = (struct amdpm_softc *)device_get_softc(dev);
595 u_char data, len, i;
596 int error;
597 u_short l;
598
599 if (*count < 1 || *count > 32)
600 return (SMB_EINVAL);
601
602 AMDPM_LOCK(sc);
603 amdpm_clear(sc);
604 if (!amdpm_idle(sc)) {
605 AMDPM_UNLOCK(sc);
606 return (SMB_EBUSY);
607 }
608
609 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave | LSB);
610
611 AMDPM_SMBOUTB(sc, AMDSMB_HSTCMD, cmd);
612
613 l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
614 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE,
615 (l & 0xfff8) | AMDSMB_GE_CYC_BLOCK | AMDSMB_GE_HOST_STC);
--- 9 unchanged lines hidden (view full) ---
625 if (i < *count)
626 buf[i] = data;
627 DELAY(2);
628 }
629 *count = len;
630
631error:
632 AMDPM_DEBUG(printf("amdpm: READBLK to 0x%x, count=0x%x, cmd=0x%x, error=0x%x", slave, *count, cmd, error));
633 AMDPM_UNLOCK(sc);
634
635 return (error);
636}
637
638static devclass_t amdpm_devclass;
639
640static device_method_t amdpm_methods[] = {
641 /* Device interface */
--- 31 unchanged lines hidden ---
2 * Copyright (c) 2000 Matthew C. Forman
3 *
4 * Based (heavily) on alpm.c which is:
5 *
6 * Copyright (c) 1998, 1999 Nicolas Souchu
7 * All rights reserved.
8 *
--- 19 unchanged lines hidden (view full) ---
28 * SUCH DAMAGE.
29 */
30
31/*
32 * Power management function/SMBus function support for the AMD 756 chip.
33 */
34
35#include <sys/cdefs.h>
36__FBSDID("$FreeBSD: head/sys/pci/amdpm.c 165951 2007-01-11 19:56:24Z jhb $");
37
38#include <sys/param.h>
39#include <sys/bus.h>
40#include <sys/kernel.h>
41#include <sys/lock.h>
42#include <sys/module.h>
43#include <sys/mutex.h>
44#include <sys/systm.h>
45
46#include <machine/bus.h>
47#include <machine/resource.h>
48#include <sys/rman.h>
49
50#include <dev/pci/pcivar.h>
51#include <dev/pci/pcireg.h>
52
53#include <dev/smbus/smbconf.h>
54#include "smbus_if.h"
55
56#define AMDPM_DEBUG(x) if (amdpm_debug) (x)
57
58#ifdef DEBUG
59static int amdpm_debug = 1;
60#else
--- 42 unchanged lines hidden (view full) ---
103#define AMDSMB_GE_HOST_STC (1<<3)
104#define AMDSMB_GE_CYC_QUICK 0
105#define AMDSMB_GE_CYC_BYTE 1
106#define AMDSMB_GE_CYC_BDATA 2
107#define AMDSMB_GE_CYC_WDATA 3
108#define AMDSMB_GE_CYC_PROCCALL 4
109#define AMDSMB_GE_CYC_BLOCK 5
110
111#define LSB 0x1 /* XXX: Better name: Read/Write? */
112
113#define AMDSMB_HSTADDR (0x04)
114#define AMDSMB_HSTDATA (0x06)
115#define AMDSMB_HSTCMD (0x08)
116#define AMDSMB_HSTDFIFO (0x09)
117#define AMDSMB_HSLVDATA (0x0A)
118#define AMDSMB_HSLVDA (0x0C)
119#define AMDSMB_HSLVDDR (0x0E)
120#define AMDSMB_SNPADDR (0x0F)
121
122struct amdpm_softc {
123 int base;
124 int rid;
125 struct resource *res;
126 bus_space_tag_t smbst;
127 bus_space_handle_t smbsh;
128 device_t smbus;
129 struct mtx lock;
130};
131
132#define AMDPM_LOCK(amdpm) mtx_lock(&(amdpm)->lock)
133#define AMDPM_UNLOCK(amdpm) mtx_unlock(&(amdpm)->lock)
134#define AMDPM_LOCK_ASSERT(amdpm) mtx_assert(&(amdpm)->lock, MA_OWNED)
135
136#define AMDPM_SMBINB(amdpm,register) \
137 (bus_space_read_1(amdpm->smbst, amdpm->smbsh, register))
138#define AMDPM_SMBOUTB(amdpm,register,value) \
139 (bus_space_write_1(amdpm->smbst, amdpm->smbsh, register, value))
140#define AMDPM_SMBINW(amdpm,register) \
141 (bus_space_read_2(amdpm->smbst, amdpm->smbsh, register))
142#define AMDPM_SMBOUTW(amdpm,register,value) \
143 (bus_space_write_2(amdpm->smbst, amdpm->smbsh, register, value))
144
145static int amdpm_detach(device_t dev);
146
147static int
148amdpm_probe(device_t dev)
149{
150 u_long base;
151 u_int16_t vid;
152 u_int16_t did;
153
154 vid = pci_get_vendor(dev);
--- 55 unchanged lines hidden (view full) ---
210
211 if (amdpm_sc->res == NULL) {
212 device_printf(dev, "could not map i/o space\n");
213 return (ENXIO);
214 }
215
216 amdpm_sc->smbst = rman_get_bustag(amdpm_sc->res);
217 amdpm_sc->smbsh = rman_get_bushandle(amdpm_sc->res);
218 mtx_init(&amdpm_sc->lock, device_get_nameunit(dev), "amdpm", MTX_DEF);
219
220 /* Allocate a new smbus device */
221 amdpm_sc->smbus = device_add_child(dev, "smbus", -1);
222 if (!amdpm_sc->smbus) {
223 amdpm_detach(dev);
224 return (EINVAL);
225 }
226
227 bus_generic_attach(dev);
228
229 return (0);
230}
231
232static int
233amdpm_detach(device_t dev)
234{
235 struct amdpm_softc *amdpm_sc = device_get_softc(dev);
236
237 if (amdpm_sc->smbus) {
238 device_delete_child(dev, amdpm_sc->smbus);
239 amdpm_sc->smbus = NULL;
240 }
241
242 mtx_destroy(&amdpm_sc->lock);
243 if (amdpm_sc->res)
244 bus_release_resource(dev, SYS_RES_IOPORT, amdpm_sc->rid,
245 amdpm_sc->res);
246
247 return (0);
248}
249
250static int
--- 10 unchanged lines hidden (view full) ---
261 }
262
263 return (error);
264}
265
266static int
267amdpm_clear(struct amdpm_softc *sc)
268{
269
270 AMDPM_LOCK_ASSERT(sc);
271 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_STATUS, AMDSMB_GS_CLEAR_STS);
272 DELAY(10);
273
274 return (0);
275}
276
277#if 0
278static int
--- 8 unchanged lines hidden (view full) ---
287}
288#endif
289
290static int
291amdpm_idle(struct amdpm_softc *sc)
292{
293 u_short sts;
294
295 AMDPM_LOCK_ASSERT(sc);
296 sts = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_STATUS);
297
298 AMDPM_DEBUG(printf("amdpm: busy? STS=0x%x\n", sts));
299
300 return (~(sts & AMDSMB_GS_HST_STS));
301}
302
303/*
304 * Poll the SMBus controller
305 */
306static int
307amdpm_wait(struct amdpm_softc *sc)
308{
309 int count = 10000;
310 u_short sts = 0;
311 int error;
312
313 AMDPM_LOCK_ASSERT(sc);
314 /* Wait for command to complete (SMBus controller is idle) */
315 while(count--) {
316 DELAY(10);
317 sts = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_STATUS);
318 if (!(sts & AMDSMB_GS_HST_STS))
319 break;
320 }
321
--- 21 unchanged lines hidden (view full) ---
343
344static int
345amdpm_quick(device_t dev, u_char slave, int how)
346{
347 struct amdpm_softc *sc = (struct amdpm_softc *)device_get_softc(dev);
348 int error;
349 u_short l;
350
351 AMDPM_LOCK(sc);
352 amdpm_clear(sc);
353 if (!amdpm_idle(sc)) {
354 AMDPM_UNLOCK(sc);
355 return (EBUSY);
356 }
357
358 switch (how) {
359 case SMB_QWRITE:
360 AMDPM_DEBUG(printf("amdpm: QWRITE to 0x%x", slave));
361 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave & ~LSB);
362 break;
363 case SMB_QREAD:
364 AMDPM_DEBUG(printf("amdpm: QREAD to 0x%x", slave));
365 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave | LSB);
366 break;
367 default:
368 panic("%s: unknown QUICK command (%x)!", __func__, how);
369 }
370 l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
371 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_QUICK | AMDSMB_GE_HOST_STC);
372
373 error = amdpm_wait(sc);
374
375 AMDPM_DEBUG(printf(", error=0x%x\n", error));
376 AMDPM_UNLOCK(sc);
377
378 return (error);
379}
380
381static int
382amdpm_sendb(device_t dev, u_char slave, char byte)
383{
384 struct amdpm_softc *sc = (struct amdpm_softc *)device_get_softc(dev);
385 int error;
386 u_short l;
387
388 AMDPM_LOCK(sc);
389 amdpm_clear(sc);
390 if (!amdpm_idle(sc)) {
391 AMDPM_UNLOCK(sc);
392 return (SMB_EBUSY);
393 }
394
395 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave & ~LSB);
396 AMDPM_SMBOUTW(sc, AMDSMB_HSTDATA, byte);
397 l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
398 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_BYTE | AMDSMB_GE_HOST_STC);
399
400 error = amdpm_wait(sc);
401
402 AMDPM_DEBUG(printf("amdpm: SENDB to 0x%x, byte=0x%x, error=0x%x\n", slave, byte, error));
403 AMDPM_UNLOCK(sc);
404
405 return (error);
406}
407
408static int
409amdpm_recvb(device_t dev, u_char slave, char *byte)
410{
411 struct amdpm_softc *sc = (struct amdpm_softc *)device_get_softc(dev);
412 int error;
413 u_short l;
414
415 AMDPM_LOCK(sc);
416 amdpm_clear(sc);
417 if (!amdpm_idle(sc)) {
418 AMDPM_UNLOCK(sc);
419 return (SMB_EBUSY);
420 }
421
422 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave | LSB);
423 l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
424 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_BYTE | AMDSMB_GE_HOST_STC);
425
426 if ((error = amdpm_wait(sc)) == SMB_ENOERR)
427 *byte = AMDPM_SMBINW(sc, AMDSMB_HSTDATA);
428
429 AMDPM_DEBUG(printf("amdpm: RECVB from 0x%x, byte=0x%x, error=0x%x\n", slave, *byte, error));
430 AMDPM_UNLOCK(sc);
431
432 return (error);
433}
434
435static int
436amdpm_writeb(device_t dev, u_char slave, char cmd, char byte)
437{
438 struct amdpm_softc *sc = (struct amdpm_softc *)device_get_softc(dev);
439 int error;
440 u_short l;
441
442 AMDPM_LOCK(sc);
443 amdpm_clear(sc);
444 if (!amdpm_idle(sc)) {
445 AMDPM_UNLOCK(sc);
446 return (SMB_EBUSY);
447 }
448
449 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave & ~LSB);
450 AMDPM_SMBOUTW(sc, AMDSMB_HSTDATA, byte);
451 AMDPM_SMBOUTB(sc, AMDSMB_HSTCMD, cmd);
452 l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
453 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_BDATA | AMDSMB_GE_HOST_STC);
454
455 error = amdpm_wait(sc);
456
457 AMDPM_DEBUG(printf("amdpm: WRITEB to 0x%x, cmd=0x%x, byte=0x%x, error=0x%x\n", slave, cmd, byte, error));
458 AMDPM_UNLOCK(sc);
459
460 return (error);
461}
462
463static int
464amdpm_readb(device_t dev, u_char slave, char cmd, char *byte)
465{
466 struct amdpm_softc *sc = (struct amdpm_softc *)device_get_softc(dev);
467 int error;
468 u_short l;
469
470 AMDPM_LOCK(sc);
471 amdpm_clear(sc);
472 if (!amdpm_idle(sc)) {
473 AMDPM_UNLOCK(sc);
474 return (SMB_EBUSY);
475 }
476
477 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave | LSB);
478 AMDPM_SMBOUTB(sc, AMDSMB_HSTCMD, cmd);
479 l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
480 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_BDATA | AMDSMB_GE_HOST_STC);
481
482 if ((error = amdpm_wait(sc)) == SMB_ENOERR)
483 *byte = AMDPM_SMBINW(sc, AMDSMB_HSTDATA);
484
485 AMDPM_DEBUG(printf("amdpm: READB from 0x%x, cmd=0x%x, byte=0x%x, error=0x%x\n", slave, cmd, *byte, error));
486 AMDPM_UNLOCK(sc);
487
488 return (error);
489}
490
491static int
492amdpm_writew(device_t dev, u_char slave, char cmd, short word)
493{
494 struct amdpm_softc *sc = (struct amdpm_softc *)device_get_softc(dev);
495 int error;
496 u_short l;
497
498 AMDPM_LOCK(sc);
499 amdpm_clear(sc);
500 if (!amdpm_idle(sc)) {
501 AMDPM_UNLOCK(sc);
502 return (SMB_EBUSY);
503 }
504
505 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave & ~LSB);
506 AMDPM_SMBOUTW(sc, AMDSMB_HSTDATA, word);
507 AMDPM_SMBOUTB(sc, AMDSMB_HSTCMD, cmd);
508 l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
509 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_WDATA | AMDSMB_GE_HOST_STC);
510
511 error = amdpm_wait(sc);
512
513 AMDPM_DEBUG(printf("amdpm: WRITEW to 0x%x, cmd=0x%x, word=0x%x, error=0x%x\n", slave, cmd, word, error));
514 AMDPM_UNLOCK(sc);
515
516 return (error);
517}
518
519static int
520amdpm_readw(device_t dev, u_char slave, char cmd, short *word)
521{
522 struct amdpm_softc *sc = (struct amdpm_softc *)device_get_softc(dev);
523 int error;
524 u_short l;
525
526 AMDPM_LOCK(sc);
527 amdpm_clear(sc);
528 if (!amdpm_idle(sc)) {
529 AMDPM_UNLOCK(sc);
530 return (SMB_EBUSY);
531 }
532
533 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave | LSB);
534 AMDPM_SMBOUTB(sc, AMDSMB_HSTCMD, cmd);
535 l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
536 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE, (l & 0xfff8) | AMDSMB_GE_CYC_WDATA | AMDSMB_GE_HOST_STC);
537
538 if ((error = amdpm_wait(sc)) == SMB_ENOERR)
539 *word = AMDPM_SMBINW(sc, AMDSMB_HSTDATA);
540
541 AMDPM_DEBUG(printf("amdpm: READW from 0x%x, cmd=0x%x, word=0x%x, error=0x%x\n", slave, cmd, *word, error));
542 AMDPM_UNLOCK(sc);
543
544 return (error);
545}
546
547static int
548amdpm_bwrite(device_t dev, u_char slave, char cmd, u_char count, char *buf)
549{
550 struct amdpm_softc *sc = (struct amdpm_softc *)device_get_softc(dev);
551 u_char i;
552 int error;
553 u_short l;
554
555 if (count < 1 || count > 32)
556 return (SMB_EINVAL);
557
558 AMDPM_LOCK(sc);
559 amdpm_clear(sc);
560 if (!amdpm_idle(sc)) {
561 AMDPM_UNLOCK(sc);
562 return (SMB_EBUSY);
563 }
564
565 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave & ~LSB);
566
567 /*
568 * Do we have to reset the internal 32-byte buffer?
569 * Can't see how to do this from the data sheet.
570 */
571 AMDPM_SMBOUTW(sc, AMDSMB_HSTDATA, count);
--- 6 unchanged lines hidden (view full) ---
578 AMDPM_SMBOUTB(sc, AMDSMB_HSTCMD, cmd);
579 l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
580 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE,
581 (l & 0xfff8) | AMDSMB_GE_CYC_BLOCK | AMDSMB_GE_HOST_STC);
582
583 error = amdpm_wait(sc);
584
585 AMDPM_DEBUG(printf("amdpm: WRITEBLK to 0x%x, count=0x%x, cmd=0x%x, error=0x%x", slave, count, cmd, error));
586 AMDPM_UNLOCK(sc);
587
588 return (error);
589}
590
591static int
592amdpm_bread(device_t dev, u_char slave, char cmd, u_char *count, char *buf)
593{
594 struct amdpm_softc *sc = (struct amdpm_softc *)device_get_softc(dev);
595 u_char data, len, i;
596 int error;
597 u_short l;
598
599 if (*count < 1 || *count > 32)
600 return (SMB_EINVAL);
601
602 AMDPM_LOCK(sc);
603 amdpm_clear(sc);
604 if (!amdpm_idle(sc)) {
605 AMDPM_UNLOCK(sc);
606 return (SMB_EBUSY);
607 }
608
609 AMDPM_SMBOUTW(sc, AMDSMB_HSTADDR, slave | LSB);
610
611 AMDPM_SMBOUTB(sc, AMDSMB_HSTCMD, cmd);
612
613 l = AMDPM_SMBINW(sc, AMDSMB_GLOBAL_ENABLE);
614 AMDPM_SMBOUTW(sc, AMDSMB_GLOBAL_ENABLE,
615 (l & 0xfff8) | AMDSMB_GE_CYC_BLOCK | AMDSMB_GE_HOST_STC);
--- 9 unchanged lines hidden (view full) ---
625 if (i < *count)
626 buf[i] = data;
627 DELAY(2);
628 }
629 *count = len;
630
631error:
632 AMDPM_DEBUG(printf("amdpm: READBLK to 0x%x, count=0x%x, cmd=0x%x, error=0x%x", slave, *count, cmd, error));
633 AMDPM_UNLOCK(sc);
634
635 return (error);
636}
637
638static devclass_t amdpm_devclass;
639
640static device_method_t amdpm_methods[] = {
641 /* Device interface */
--- 31 unchanged lines hidden ---