| NOTES (137526) | NOTES (137784) |
|---|---|
| 1# 2# NOTES -- Lines that can be cut/pasted into kernel and hints configs. 3# 4# This file contains machine dependent kernel configuration notes. For 5# machine independent notes, look in /sys/conf/NOTES. 6# | 1# 2# NOTES -- Lines that can be cut/pasted into kernel and hints configs. 3# 4# This file contains machine dependent kernel configuration notes. For 5# machine independent notes, look in /sys/conf/NOTES. 6# |
| 7# $FreeBSD: head/sys/pc98/conf/NOTES 137526 2004-11-10 12:24:30Z nyan $ | 7# $FreeBSD: head/sys/pc98/conf/NOTES 137784 2004-11-16 20:42:32Z jhb $ |
| 8# 9 10# 11# This directive is mandatory; it defines the architecture to be 12# configured for; in this case, the 386 family based PC-98 and 13# compatibles. 14# 15machine pc98 --- 9 unchanged lines hidden (view full) --- 25# 26# The apic device enables the use of the I/O APIC for interrupt delivery. 27# The apic device can be used in both UP and SMP kernels, but is required 28# for SMP kernels. Thus, the apic device is not strictly an SMP option, 29# but it is a prerequisite for SMP. 30# 31# Notes: 32# | 8# 9 10# 11# This directive is mandatory; it defines the architecture to be 12# configured for; in this case, the 386 family based PC-98 and 13# compatibles. 14# 15machine pc98 --- 9 unchanged lines hidden (view full) --- 25# 26# The apic device enables the use of the I/O APIC for interrupt delivery. 27# The apic device can be used in both UP and SMP kernels, but is required 28# for SMP kernels. Thus, the apic device is not strictly an SMP option, 29# but it is a prerequisite for SMP. 30# 31# Notes: 32# |
| 33# Be sure to disable 'cpu I386_CPU' for SMP kernels. 34# | |
| 35# By default, mixed mode is used to route IRQ0 from the AT timer via 36# the 8259A master PIC through the ExtINT pin on the first I/O APIC. 37# This can be disabled via the NO_MIXED_MODE option. In that case, 38# IRQ0 will be routed via an intpin on the first I/O APIC. Not all 39# motherboards hook IRQ0 up to the first I/O APIC even though their 40# MP table or MADT may claim to do so. That is why mixed mode is 41# enabled by default. 42# --- 7 unchanged lines hidden (view full) --- 50 51##################################################################### 52# CPU OPTIONS 53 54# 55# You must specify at least one CPU (the one you intend to run on); 56# deleting the specification for CPUs you don't need to use may make 57# parts of the system run faster. | 33# By default, mixed mode is used to route IRQ0 from the AT timer via 34# the 8259A master PIC through the ExtINT pin on the first I/O APIC. 35# This can be disabled via the NO_MIXED_MODE option. In that case, 36# IRQ0 will be routed via an intpin on the first I/O APIC. Not all 37# motherboards hook IRQ0 up to the first I/O APIC even though their 38# MP table or MADT may claim to do so. That is why mixed mode is 39# enabled by default. 40# --- 7 unchanged lines hidden (view full) --- 48 49##################################################################### 50# CPU OPTIONS 51 52# 53# You must specify at least one CPU (the one you intend to run on); 54# deleting the specification for CPUs you don't need to use may make 55# parts of the system run faster. |
| 58# I386_CPU is mutually exclusive with the other CPU types. 59# I386_CPU is deprecated and will be removed in 6.0-RELEASE. | |
| 60# | 56# |
| 61#cpu I386_CPU | |
| 62cpu I486_CPU 63cpu I586_CPU # aka Pentium(tm) 64cpu I686_CPU # aka Pentium Pro(tm) 65 66# 67# Options for CPU features. 68# 69# CPU_BLUELIGHTNING_3X enables triple-clock mode on IBM Blue Lightning --- 764 unchanged lines hidden --- | 57cpu I486_CPU 58cpu I586_CPU # aka Pentium(tm) 59cpu I686_CPU # aka Pentium Pro(tm) 60 61# 62# Options for CPU features. 63# 64# CPU_BLUELIGHTNING_3X enables triple-clock mode on IBM Blue Lightning --- 764 unchanged lines hidden --- |