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pci.h (256281) pci.h (271127)
1/*-
2 * Copyright (c) 2010 Isilon Systems, Inc.
3 * Copyright (c) 2010 iX Systems, Inc.
4 * Copyright (c) 2010 Panasas, Inc.
1/*-
2 * Copyright (c) 2010 Isilon Systems, Inc.
3 * Copyright (c) 2010 iX Systems, Inc.
4 * Copyright (c) 2010 Panasas, Inc.
5 * Copyright (c) 2013, 2014 Mellanox Technologies, Ltd.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice unmodified, this list of conditions, and the following
12 * disclaimer.

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38#include <sys/pciio.h>
39#include <sys/rman.h>
40#include <dev/pci/pcivar.h>
41#include <dev/pci/pcireg.h>
42#include <dev/pci/pci_private.h>
43
44#include <machine/resource.h>
45
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice unmodified, this list of conditions, and the following
13 * disclaimer.

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39#include <sys/pciio.h>
40#include <sys/rman.h>
41#include <dev/pci/pcivar.h>
42#include <dev/pci/pcireg.h>
43#include <dev/pci/pci_private.h>
44
45#include <machine/resource.h>
46
46#include <linux/init.h>
47#include <linux/list.h>
48#include <linux/dmapool.h>
49#include <linux/dma-mapping.h>
50#include <linux/compiler.h>
51#include <linux/errno.h>
52#include <asm/atomic.h>
53#include <linux/device.h>
54

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80 .vendor = PCI_VENDOR_ID_##_vendor, .device = (_device), \
81 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
82#define PCI_DEVICE(_vendor, _device) \
83 .vendor = (_vendor), .device = (_device), \
84 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
85
86#define to_pci_dev(n) container_of(n, struct pci_dev, dev)
87
47#include <linux/list.h>
48#include <linux/dmapool.h>
49#include <linux/dma-mapping.h>
50#include <linux/compiler.h>
51#include <linux/errno.h>
52#include <asm/atomic.h>
53#include <linux/device.h>
54

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80 .vendor = PCI_VENDOR_ID_##_vendor, .device = (_device), \
81 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
82#define PCI_DEVICE(_vendor, _device) \
83 .vendor = (_vendor), .device = (_device), \
84 .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID
85
86#define to_pci_dev(n) container_of(n, struct pci_dev, dev)
87
88#define PCI_VENDOR_ID PCIR_DEVVENDOR
89#define PCI_COMMAND PCIR_COMMAND
90#define PCI_EXP_DEVCTL PCIER_DEVICE_CTL
91#define PCI_EXP_LNKCTL PCIER_LINK_CTL
88#define PCI_VENDOR_ID PCIR_DEVVENDOR
89#define PCI_COMMAND PCIR_COMMAND
90#define PCI_EXP_DEVCTL PCIER_DEVICE_CTL /* Device Control */
91#define PCI_EXP_LNKCTL PCIER_LINK_CTL /* Link Control */
92#define PCI_EXP_FLAGS_TYPE PCIEM_FLAGS_TYPE /* Device/Port type */
93#define PCI_EXP_DEVCAP PCIER_DEVICE_CAP /* Device capabilities */
94#define PCI_EXP_DEVSTA PCIER_DEVICE_STA /* Device Status */
95#define PCI_EXP_LNKCAP PCIER_LINK_CAP /* Link Capabilities */
96#define PCI_EXP_LNKSTA PCIER_LINK_STA /* Link Status */
97#define PCI_EXP_SLTCAP PCIER_SLOT_CAP /* Slot Capabilities */
98#define PCI_EXP_SLTCTL PCIER_SLOT_CTL /* Slot Control */
99#define PCI_EXP_SLTSTA PCIER_SLOT_STA /* Slot Status */
100#define PCI_EXP_RTCTL PCIER_ROOT_CTL /* Root Control */
101#define PCI_EXP_RTCAP PCIER_ROOT_CAP /* Root Capabilities */
102#define PCI_EXP_RTSTA PCIER_ROOT_STA /* Root Status */
103#define PCI_EXP_DEVCAP2 PCIER_DEVICE_CAP2 /* Device Capabilities 2 */
104#define PCI_EXP_DEVCTL2 PCIER_DEVICE_CTL2 /* Device Control 2 */
105#define PCI_EXP_LNKCAP2 PCIER_LINK_CAP2 /* Link Capabilities 2 */
106#define PCI_EXP_LNKCTL2 PCIER_LINK_CTL2 /* Link Control 2 */
107#define PCI_EXP_LNKSTA2 PCIER_LINK_STA2 /* Link Status 2 */
108#define PCI_EXP_FLAGS PCIER_FLAGS /* Capabilities register */
109#define PCI_EXP_FLAGS_VERS PCIEM_FLAGS_VERSION /* Capability version */
110#define PCI_EXP_TYPE_ROOT_PORT PCIEM_TYPE_ROOT_PORT /* Root Port */
111#define PCI_EXP_TYPE_ENDPOINT PCIEM_TYPE_ENDPOINT /* Express Endpoint */
112#define PCI_EXP_TYPE_LEG_END PCIEM_TYPE_LEGACY_ENDPOINT /* Legacy Endpoint */
113#define PCI_EXP_TYPE_DOWNSTREAM PCIEM_TYPE_DOWNSTREAM_PORT /* Downstream Port */
114#define PCI_EXP_FLAGS_SLOT PCIEM_FLAGS_SLOT /* Slot implemented */
115#define PCI_EXP_TYPE_RC_EC PCIEM_TYPE_ROOT_EC /* Root Complex Event Collector */
92
116
117
93#define IORESOURCE_MEM SYS_RES_MEMORY
94#define IORESOURCE_IO SYS_RES_IOPORT
95#define IORESOURCE_IRQ SYS_RES_IRQ
96
97struct pci_dev;
98
99
100struct pci_driver {
101 struct list_head links;
102 char *name;
118#define IORESOURCE_MEM SYS_RES_MEMORY
119#define IORESOURCE_IO SYS_RES_IOPORT
120#define IORESOURCE_IRQ SYS_RES_IRQ
121
122struct pci_dev;
123
124
125struct pci_driver {
126 struct list_head links;
127 char *name;
103 struct pci_device_id *id_table;
128 const struct pci_device_id *id_table;
104 int (*probe)(struct pci_dev *dev, const struct pci_device_id *id);
105 void (*remove)(struct pci_dev *dev);
106 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
107 int (*resume) (struct pci_dev *dev); /* Device woken up */
108 driver_t driver;
109 devclass_t bsdclass;
129 int (*probe)(struct pci_dev *dev, const struct pci_device_id *id);
130 void (*remove)(struct pci_dev *dev);
131 int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */
132 int (*resume) (struct pci_dev *dev); /* Device woken up */
133 driver_t driver;
134 devclass_t bsdclass;
110 struct pci_error_handlers *err_handler;
135 const struct pci_error_handlers *err_handler;
111};
112
113extern struct list_head pci_drivers;
114extern struct list_head pci_devices;
115extern spinlock_t pci_lock;
116
117#define __devexit_p(x) x
118

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381pci_write_config_dword(struct pci_dev *pdev, int where, u32 val)
382{
383
384 pci_write_config(pdev->dev.bsddev, where, val, 4);
385 return (0);
386}
387
388static struct pci_driver *
136};
137
138extern struct list_head pci_drivers;
139extern struct list_head pci_devices;
140extern spinlock_t pci_lock;
141
142#define __devexit_p(x) x
143

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406pci_write_config_dword(struct pci_dev *pdev, int where, u32 val)
407{
408
409 pci_write_config(pdev->dev.bsddev, where, val, 4);
410 return (0);
411}
412
413static struct pci_driver *
389linux_pci_find(device_t dev, struct pci_device_id **idp)
414linux_pci_find(device_t dev, const struct pci_device_id **idp)
390{
415{
391 struct pci_device_id *id;
416 const struct pci_device_id *id;
392 struct pci_driver *pdrv;
393 uint16_t vendor;
394 uint16_t device;
395
396 vendor = pci_get_vendor(dev);
397 device = pci_get_device(dev);
398
399 spin_lock(&pci_lock);

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408 }
409 spin_unlock(&pci_lock);
410 return (NULL);
411}
412
413static inline int
414linux_pci_probe(device_t dev)
415{
417 struct pci_driver *pdrv;
418 uint16_t vendor;
419 uint16_t device;
420
421 vendor = pci_get_vendor(dev);
422 device = pci_get_device(dev);
423
424 spin_lock(&pci_lock);

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433 }
434 spin_unlock(&pci_lock);
435 return (NULL);
436}
437
438static inline int
439linux_pci_probe(device_t dev)
440{
416 struct pci_device_id *id;
441 const struct pci_device_id *id;
417 struct pci_driver *pdrv;
418
419 if ((pdrv = linux_pci_find(dev, &id)) == NULL)
420 return (ENXIO);
421 if (device_get_driver(dev) != &pdrv->driver)
422 return (ENXIO);
423 device_set_desc(dev, pdrv->name);
424 return (0);
425}
426
427static inline int
428linux_pci_attach(device_t dev)
429{
430 struct resource_list_entry *rle;
431 struct pci_dev *pdev;
432 struct pci_driver *pdrv;
442 struct pci_driver *pdrv;
443
444 if ((pdrv = linux_pci_find(dev, &id)) == NULL)
445 return (ENXIO);
446 if (device_get_driver(dev) != &pdrv->driver)
447 return (ENXIO);
448 device_set_desc(dev, pdrv->name);
449 return (0);
450}
451
452static inline int
453linux_pci_attach(device_t dev)
454{
455 struct resource_list_entry *rle;
456 struct pci_dev *pdev;
457 struct pci_driver *pdrv;
433 struct pci_device_id *id;
458 const struct pci_device_id *id;
434 int error;
435
436 pdrv = linux_pci_find(dev, &id);
437 pdev = device_get_softc(dev);
438 pdev->dev.parent = &linux_rootdev;
439 pdev->dev.bsddev = dev;
440 INIT_LIST_HEAD(&pdev->dev.irqents);
441 pdev->device = id->device;

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679
680 /* PCI slot has been reset */
681 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
682
683 /* Device driver may resume normal operations */
684 void (*resume)(struct pci_dev *dev);
685};
686
459 int error;
460
461 pdrv = linux_pci_find(dev, &id);
462 pdev = device_get_softc(dev);
463 pdev->dev.parent = &linux_rootdev;
464 pdev->dev.bsddev = dev;
465 INIT_LIST_HEAD(&pdev->dev.irqents);
466 pdev->device = id->device;

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704
705 /* PCI slot has been reset */
706 pci_ers_result_t (*slot_reset)(struct pci_dev *dev);
707
708 /* Device driver may resume normal operations */
709 void (*resume)(struct pci_dev *dev);
710};
711
712/* freeBSD does not support SRIOV - yet */
713static inline struct pci_dev *pci_physfn(struct pci_dev *dev)
714{
715 return dev;
716}
687
717
718static inline bool pci_is_pcie(struct pci_dev *dev)
719{
720 return !!pci_pcie_cap(dev);
721}
688
722
723static inline u16 pcie_flags_reg(struct pci_dev *dev)
724{
725 int pos;
726 u16 reg16;
727
728 pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
729 if (!pos)
730 return 0;
731
732 pci_read_config_word(dev, pos + PCI_EXP_FLAGS, &reg16);
733
734 return reg16;
735}
736
737
738static inline int pci_pcie_type(struct pci_dev *dev)
739{
740 return (pcie_flags_reg(dev) & PCI_EXP_FLAGS_TYPE) >> 4;
741}
742
743static inline int pcie_cap_version(struct pci_dev *dev)
744{
745 return pcie_flags_reg(dev) & PCI_EXP_FLAGS_VERS;
746}
747
748static inline bool pcie_cap_has_lnkctl(struct pci_dev *dev)
749{
750 int type = pci_pcie_type(dev);
751
752 return pcie_cap_version(dev) > 1 ||
753 type == PCI_EXP_TYPE_ROOT_PORT ||
754 type == PCI_EXP_TYPE_ENDPOINT ||
755 type == PCI_EXP_TYPE_LEG_END;
756}
757
758static inline bool pcie_cap_has_devctl(const struct pci_dev *dev)
759{
760 return true;
761}
762
763static inline bool pcie_cap_has_sltctl(struct pci_dev *dev)
764{
765 int type = pci_pcie_type(dev);
766
767 return pcie_cap_version(dev) > 1 ||
768 type == PCI_EXP_TYPE_ROOT_PORT ||
769 (type == PCI_EXP_TYPE_DOWNSTREAM &&
770 pcie_flags_reg(dev) & PCI_EXP_FLAGS_SLOT);
771}
772
773static inline bool pcie_cap_has_rtctl(struct pci_dev *dev)
774{
775 int type = pci_pcie_type(dev);
776
777 return pcie_cap_version(dev) > 1 ||
778 type == PCI_EXP_TYPE_ROOT_PORT ||
779 type == PCI_EXP_TYPE_RC_EC;
780}
781
782static bool pcie_capability_reg_implemented(struct pci_dev *dev, int pos)
783{
784 if (!pci_is_pcie(dev))
785 return false;
786
787 switch (pos) {
788 case PCI_EXP_FLAGS_TYPE:
789 return true;
790 case PCI_EXP_DEVCAP:
791 case PCI_EXP_DEVCTL:
792 case PCI_EXP_DEVSTA:
793 return pcie_cap_has_devctl(dev);
794 case PCI_EXP_LNKCAP:
795 case PCI_EXP_LNKCTL:
796 case PCI_EXP_LNKSTA:
797 return pcie_cap_has_lnkctl(dev);
798 case PCI_EXP_SLTCAP:
799 case PCI_EXP_SLTCTL:
800 case PCI_EXP_SLTSTA:
801 return pcie_cap_has_sltctl(dev);
802 case PCI_EXP_RTCTL:
803 case PCI_EXP_RTCAP:
804 case PCI_EXP_RTSTA:
805 return pcie_cap_has_rtctl(dev);
806 case PCI_EXP_DEVCAP2:
807 case PCI_EXP_DEVCTL2:
808 case PCI_EXP_LNKCAP2:
809 case PCI_EXP_LNKCTL2:
810 case PCI_EXP_LNKSTA2:
811 return pcie_cap_version(dev) > 1;
812 default:
813 return false;
814 }
815}
816
817
818static inline int pcie_capability_write_word(struct pci_dev *dev, int pos, u16 val)
819{
820 if (pos & 1)
821 return -EINVAL;
822
823 if (!pcie_capability_reg_implemented(dev, pos))
824 return 0;
825
826 return pci_write_config_word(dev, pci_pcie_cap(dev) + pos, val);
827}
828
829
689#endif /* _LINUX_PCI_H_ */
830#endif /* _LINUX_PCI_H_ */