| sb_scd.c (205675) | sb_scd.c (210911) |
|---|---|
| 1/*- 2 * Copyright (c) 2009 Neelkanth Natu 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2009 Neelkanth Natu 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> |
| 28__FBSDID("$FreeBSD: head/sys/mips/sibyte/sb_scd.c 205675 2010-03-26 07:15:27Z neel $"); | 28__FBSDID("$FreeBSD: head/sys/mips/sibyte/sb_scd.c 210911 2010-08-06 05:30:55Z neel $"); |
| 29 30#include <sys/param.h> 31#include <sys/kernel.h> 32#include <sys/systm.h> 33#include <sys/module.h> 34#include <sys/bus.h> 35 36#include <machine/resource.h> 37#include <machine/hwfunc.h> 38 39#include "sb_scd.h" 40 41/* 42 * We compile a 32-bit kernel to run on the SB-1 processor which is a 64-bit 43 * processor. It has some registers that must be accessed using 64-bit load 44 * and store instructions. 45 * 46 * We use the mips_ld() and mips_sd() functions to do this for us. 47 */ | 29 30#include <sys/param.h> 31#include <sys/kernel.h> 32#include <sys/systm.h> 33#include <sys/module.h> 34#include <sys/bus.h> 35 36#include <machine/resource.h> 37#include <machine/hwfunc.h> 38 39#include "sb_scd.h" 40 41/* 42 * We compile a 32-bit kernel to run on the SB-1 processor which is a 64-bit 43 * processor. It has some registers that must be accessed using 64-bit load 44 * and store instructions. 45 * 46 * We use the mips_ld() and mips_sd() functions to do this for us. 47 */ |
| 48#define sb_store64(addr, val) mips3_sd((uint64_t *)(addr), (val)) 49#define sb_load64(addr) mips3_ld((uint64_t *)(addr)) | 48#define sb_store64(addr, val) mips3_sd((uint64_t *)(uintptr_t)(addr), (val)) 49#define sb_load64(addr) mips3_ld((uint64_t *)(uintptr_t)(addr)) |
| 50 51/* 52 * System Control and Debug (SCD) unit on the Sibyte ZBbus. 53 */ 54 55/* 56 * Extract the value starting at bit position 'b' for 'n' bits from 'x'. 57 */ --- 68 unchanged lines hidden (view full) --- 126 syscfg &= ~SOFT_RESET; 127 syscfg |= SYSTEM_RESET | EXT_RESET; 128 sb_write_syscfg(syscfg); 129} 130 131void 132sb_disable_intsrc(int cpu, int src) 133{ | 50 51/* 52 * System Control and Debug (SCD) unit on the Sibyte ZBbus. 53 */ 54 55/* 56 * Extract the value starting at bit position 'b' for 'n' bits from 'x'. 57 */ --- 68 unchanged lines hidden (view full) --- 126 syscfg &= ~SOFT_RESET; 127 syscfg |= SYSTEM_RESET | EXT_RESET; 128 sb_write_syscfg(syscfg); 129} 130 131void 132sb_disable_intsrc(int cpu, int src) 133{ |
| 134 uint32_t regaddr; | 134 int regaddr; |
| 135 uint64_t val; 136 137 regaddr = INTSRC_MASK_ADDR(cpu); 138 139 val = sb_load64(regaddr); 140 val |= 1ULL << src; 141 sb_store64(regaddr, val); 142} 143 144void 145sb_enable_intsrc(int cpu, int src) 146{ | 135 uint64_t val; 136 137 regaddr = INTSRC_MASK_ADDR(cpu); 138 139 val = sb_load64(regaddr); 140 val |= 1ULL << src; 141 sb_store64(regaddr, val); 142} 143 144void 145sb_enable_intsrc(int cpu, int src) 146{ |
| 147 uint32_t regaddr; | 147 int regaddr; |
| 148 uint64_t val; 149 150 regaddr = INTSRC_MASK_ADDR(cpu); 151 152 val = sb_load64(regaddr); 153 val &= ~(1ULL << src); 154 sb_store64(regaddr, val); 155} 156 157void 158sb_write_intsrc_mask(int cpu, uint64_t val) 159{ | 148 uint64_t val; 149 150 regaddr = INTSRC_MASK_ADDR(cpu); 151 152 val = sb_load64(regaddr); 153 val &= ~(1ULL << src); 154 sb_store64(regaddr, val); 155} 156 157void 158sb_write_intsrc_mask(int cpu, uint64_t val) 159{ |
| 160 uint32_t regaddr; | 160 int regaddr; |
| 161 162 regaddr = INTSRC_MASK_ADDR(cpu); 163 sb_store64(regaddr, val); 164} 165 166uint64_t 167sb_read_intsrc_mask(int cpu) 168{ | 161 162 regaddr = INTSRC_MASK_ADDR(cpu); 163 sb_store64(regaddr, val); 164} 165 166uint64_t 167sb_read_intsrc_mask(int cpu) 168{ |
| 169 uint32_t regaddr; | 169 int regaddr; |
| 170 uint64_t val; 171 172 regaddr = INTSRC_MASK_ADDR(cpu); 173 val = sb_load64(regaddr); 174 175 return (val); 176} 177 178void 179sb_write_intmap(int cpu, int intsrc, int intrnum) 180{ | 170 uint64_t val; 171 172 regaddr = INTSRC_MASK_ADDR(cpu); 173 val = sb_load64(regaddr); 174 175 return (val); 176} 177 178void 179sb_write_intmap(int cpu, int intsrc, int intrnum) 180{ |
| 181 uint32_t regaddr; | 181 int regaddr; |
| 182 183 regaddr = INTSRC_MAP_ADDR(cpu, intsrc); 184 sb_store64(regaddr, intrnum); 185} 186 187int 188sb_read_intmap(int cpu, int intsrc) 189{ | 182 183 regaddr = INTSRC_MAP_ADDR(cpu, intsrc); 184 sb_store64(regaddr, intrnum); 185} 186 187int 188sb_read_intmap(int cpu, int intsrc) 189{ |
| 190 uint32_t regaddr; | 190 int regaddr; |
| 191 192 regaddr = INTSRC_MAP_ADDR(cpu, intsrc); 193 return (sb_load64(regaddr) & 0x7); 194} 195 196int 197sb_route_intsrc(int intsrc) 198{ --- 23 unchanged lines hidden (view full) --- 222{ 223 224 return (sb_load64(SYSREV_ADDR)); 225} 226 227void 228sb_set_mailbox(int cpu, uint64_t val) 229{ | 191 192 regaddr = INTSRC_MAP_ADDR(cpu, intsrc); 193 return (sb_load64(regaddr) & 0x7); 194} 195 196int 197sb_route_intsrc(int intsrc) 198{ --- 23 unchanged lines hidden (view full) --- 222{ 223 224 return (sb_load64(SYSREV_ADDR)); 225} 226 227void 228sb_set_mailbox(int cpu, uint64_t val) 229{ |
| 230 uint32_t regaddr; | 230 int regaddr; |
| 231 232 regaddr = MAILBOX_SET_ADDR(cpu); 233 sb_store64(regaddr, val); 234} 235 236void 237sb_clear_mailbox(int cpu, uint64_t val) 238{ | 231 232 regaddr = MAILBOX_SET_ADDR(cpu); 233 sb_store64(regaddr, val); 234} 235 236void 237sb_clear_mailbox(int cpu, uint64_t val) 238{ |
| 239 uint32_t regaddr; | 239 int regaddr; |
| 240 241 regaddr = MAILBOX_CLEAR_ADDR(cpu); 242 sb_store64(regaddr, val); 243} 244 245int 246platform_num_processors(void) 247{ --- 54 unchanged lines hidden --- | 240 241 regaddr = MAILBOX_CLEAR_ADDR(cpu); 242 sb_store64(regaddr, val); 243} 244 245int 246platform_num_processors(void) 247{ --- 54 unchanged lines hidden --- |