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sb_scd.c (201905) sb_scd.c (203509)
1/*-
2 * Copyright (c) 2009 Neelkanth Natu
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
1/*-
2 * Copyright (c) 2009 Neelkanth Natu
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: head/sys/mips/sibyte/sb_scd.c 203509 2010-02-05 03:20:47Z neel $");
29
26#include <sys/param.h>
27#include <sys/kernel.h>
28#include <sys/systm.h>
29#include <sys/module.h>
30#include <sys/bus.h>
31
32#include <machine/resource.h>
30#include <sys/param.h>
31#include <sys/kernel.h>
32#include <sys/systm.h>
33#include <sys/module.h>
34#include <sys/bus.h>
35
36#include <machine/resource.h>
37#include <machine/intr_machdep.h>
33
34#include "sb_scd.h"
35
38
39#include "sb_scd.h"
40
36__FBSDID("$FreeBSD: head/sys/mips/sibyte/sb_scd.c 195333 2009-07-04 03:05:48Z imp $");
41extern void sb_store64(uint32_t addr, uint64_t val);
42extern uint64_t sb_load64(uint32_t addr);
37
38/*
39 * System Control and Debug (SCD) unit on the Sibyte ZBbus.
40 */
41
42/*
43 * Extract the value starting at bit position 'b' for 'n' bits from 'x'.
44 */
45#define GET_VAL_64(x, b, n) (((x) >> (b)) & ((1ULL << (n)) - 1))
46
43
44/*
45 * System Control and Debug (SCD) unit on the Sibyte ZBbus.
46 */
47
48/*
49 * Extract the value starting at bit position 'b' for 'n' bits from 'x'.
50 */
51#define GET_VAL_64(x, b, n) (((x) >> (b)) & ((1ULL << (n)) - 1))
52
53#define SYSREV_ADDR MIPS_PHYS_TO_KSEG1(0x10020000)
54#define SYSREV_NUM_PROCESSORS(x) GET_VAL_64((x), 24, 4)
55
56#define SYSCFG_ADDR MIPS_PHYS_TO_KSEG1(0x10020008)
47#define SYSCFG_PLLDIV(x) GET_VAL_64((x), 7, 5)
48
57#define SYSCFG_PLLDIV(x) GET_VAL_64((x), 7, 5)
58
59#define INTSRC_MASK_ADDR(cpu) \
60 (MIPS_PHYS_TO_KSEG1(0x10020028) | ((cpu) << 13))
61
62#define INTSRC_MAP_ADDR(cpu, intsrc) \
63 (MIPS_PHYS_TO_KSEG1(0x10020200) | ((cpu) << 13)) + (intsrc * 8)
64
65#define MAILBOX_SET_ADDR(cpu) \
66 (MIPS_PHYS_TO_KSEG1(0x100200C8) | ((cpu) << 13))
67
68#define MAILBOX_CLEAR_ADDR(cpu) \
69 (MIPS_PHYS_TO_KSEG1(0x100200D0) | ((cpu) << 13))
70
71static uint64_t
72sb_read_syscfg(void)
73{
74
75 return (sb_load64(SYSCFG_ADDR));
76}
77
78static void
79sb_write_syscfg(uint64_t val)
80{
81
82 sb_store64(SYSCFG_ADDR, val);
83}
84
49uint64_t
50sb_cpu_speed(void)
51{
52 int plldiv;
53 const uint64_t MHZ = 1000000;
54
55 plldiv = SYSCFG_PLLDIV(sb_read_syscfg());
56 if (plldiv == 0) {

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71 const uint64_t SOFT_RESET = 1ULL << 58;
72
73 syscfg = sb_read_syscfg();
74 syscfg &= ~SOFT_RESET;
75 syscfg |= SYSTEM_RESET | EXT_RESET;
76 sb_write_syscfg(syscfg);
77}
78
85uint64_t
86sb_cpu_speed(void)
87{
88 int plldiv;
89 const uint64_t MHZ = 1000000;
90
91 plldiv = SYSCFG_PLLDIV(sb_read_syscfg());
92 if (plldiv == 0) {

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107 const uint64_t SOFT_RESET = 1ULL << 58;
108
109 syscfg = sb_read_syscfg();
110 syscfg &= ~SOFT_RESET;
111 syscfg |= SYSTEM_RESET | EXT_RESET;
112 sb_write_syscfg(syscfg);
113}
114
115void
116sb_disable_intsrc(int cpu, int src)
117{
118 uint32_t regaddr;
119 uint64_t val;
120
121 regaddr = INTSRC_MASK_ADDR(cpu);
122
123 val = sb_load64(regaddr);
124 val |= 1ULL << src;
125 sb_store64(regaddr, val);
126}
127
128void
129sb_enable_intsrc(int cpu, int src)
130{
131 uint32_t regaddr;
132 uint64_t val;
133
134 regaddr = INTSRC_MASK_ADDR(cpu);
135
136 val = sb_load64(regaddr);
137 val &= ~(1ULL << src);
138 sb_store64(regaddr, val);
139}
140
141void
142sb_write_intsrc_mask(int cpu, uint64_t val)
143{
144 uint32_t regaddr;
145
146 regaddr = INTSRC_MASK_ADDR(cpu);
147 sb_store64(regaddr, val);
148}
149
150uint64_t
151sb_read_intsrc_mask(int cpu)
152{
153 uint32_t regaddr;
154 uint64_t val;
155
156 regaddr = INTSRC_MASK_ADDR(cpu);
157 val = sb_load64(regaddr);
158
159 return (val);
160}
161
162void
163sb_write_intmap(int cpu, int intsrc, int intrnum)
164{
165 uint32_t regaddr;
166
167 regaddr = INTSRC_MAP_ADDR(cpu, intsrc);
168 sb_store64(regaddr, intrnum);
169}
170
79int
171int
172sb_read_intmap(int cpu, int intsrc)
173{
174 uint32_t regaddr;
175
176 regaddr = INTSRC_MAP_ADDR(cpu, intsrc);
177 return (sb_load64(regaddr) & 0x7);
178}
179
180int
80sb_route_intsrc(int intsrc)
81{
82 int intrnum;
83
84 KASSERT(intsrc >= 0 && intsrc < NUM_INTSRC,
85 ("Invalid interrupt source number (%d)", intsrc));
86
87 /*
88 * Interrupt 5 is used by sources internal to the CPU (e.g. timer).
181sb_route_intsrc(int intsrc)
182{
183 int intrnum;
184
185 KASSERT(intsrc >= 0 && intsrc < NUM_INTSRC,
186 ("Invalid interrupt source number (%d)", intsrc));
187
188 /*
189 * Interrupt 5 is used by sources internal to the CPU (e.g. timer).
89 * Use a deterministic mapping for the remaining sources to map to
90 * interrupt numbers 0 through 4.
190 * Use a deterministic mapping for the remaining sources.
91 */
92 intrnum = intsrc % 5;
93
191 */
192 intrnum = intsrc % 5;
193
94 /*
95 * Program the interrupt mapper while we are here.
96 */
97 sb_write_intmap(intsrc, intrnum);
98
99 return (intrnum);
100}
101
102#define SCD_PHYSADDR 0x10000000
103#define SCD_SIZE 0x00060000
104
105static int
106scd_probe(device_t dev)

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111}
112
113static int
114scd_attach(device_t dev)
115{
116 int rid;
117 struct resource *res;
118
194 return (intrnum);
195}
196
197#define SCD_PHYSADDR 0x10000000
198#define SCD_SIZE 0x00060000
199
200static int
201scd_probe(device_t dev)

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206}
207
208static int
209scd_attach(device_t dev)
210{
211 int rid;
212 struct resource *res;
213
119 if (bootverbose) {
214 if (bootverbose)
120 device_printf(dev, "attached.\n");
215 device_printf(dev, "attached.\n");
121 }
122
123 rid = 0;
124 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, SCD_PHYSADDR,
125 SCD_PHYSADDR + SCD_SIZE - 1, SCD_SIZE, 0);
216
217 rid = 0;
218 res = bus_alloc_resource(dev, SYS_RES_MEMORY, &rid, SCD_PHYSADDR,
219 SCD_PHYSADDR + SCD_SIZE - 1, SCD_SIZE, 0);
126 if (res == NULL) {
220 if (res == NULL)
127 panic("Cannot allocate resource for system control and debug.");
221 panic("Cannot allocate resource for system control and debug.");
128 }
129
130 return (0);
131}
132
133static device_method_t scd_methods[] ={
134 /* Device interface */
135 DEVMETHOD(device_probe, scd_probe),
136 DEVMETHOD(device_attach, scd_attach),

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223 return (0);
224}
225
226static device_method_t scd_methods[] ={
227 /* Device interface */
228 DEVMETHOD(device_probe, scd_probe),
229 DEVMETHOD(device_attach, scd_attach),

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