| sb_machdep.c (202864) | sb_machdep.c (202954) |
|---|---|
| 1/*- 2 * Copyright (c) 2007 Bruce M. Simpson. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2007 Bruce M. Simpson. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 11 unchanged lines hidden (view full) --- 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> |
| 28__FBSDID("$FreeBSD: head/sys/mips/sibyte/sb_machdep.c 202864 2010-01-23 03:19:13Z neel $"); | 28__FBSDID("$FreeBSD: head/sys/mips/sibyte/sb_machdep.c 202954 2010-01-25 00:44:05Z gonzo $"); |
| 29 30#include <sys/param.h> 31#include <machine/cpuregs.h> 32 33#include "opt_ddb.h" 34#include "opt_kdb.h" 35 36#include <sys/param.h> --- 127 unchanged lines hidden (view full) --- 164 165 phys_avail[i] = addr; 166 if (i == 0 && addr == 0) { 167 /* 168 * If this is the first physical memory segment probed 169 * from CFE, omit the region at the start of physical 170 * memory where the kernel has been loaded. 171 */ | 29 30#include <sys/param.h> 31#include <machine/cpuregs.h> 32 33#include "opt_ddb.h" 34#include "opt_kdb.h" 35 36#include <sys/param.h> --- 127 unchanged lines hidden (view full) --- 164 165 phys_avail[i] = addr; 166 if (i == 0 && addr == 0) { 167 /* 168 * If this is the first physical memory segment probed 169 * from CFE, omit the region at the start of physical 170 * memory where the kernel has been loaded. 171 */ |
| 172 phys_avail[i] += MIPS_KSEG0_TO_PHYS((vm_offset_t)&end); | 172 phys_avail[i] += MIPS_KSEG0_TO_PHYS(kernel_kseg0_end); |
| 173 } 174 phys_avail[i + 1] = addr + len; 175 physmem += len; 176 } 177 178 realmem = btoc(physmem); 179#endif 180 --- 60 unchanged lines hidden (view full) --- 241 config |= CFG_K0_COHERENT; 242 mips_wr_config(config); 243} 244 245void 246platform_start(__register_t a0, __register_t a1, __register_t a2, 247 __register_t a3) 248{ | 173 } 174 phys_avail[i + 1] = addr + len; 175 physmem += len; 176 } 177 178 realmem = btoc(physmem); 179#endif 180 --- 60 unchanged lines hidden (view full) --- 241 config |= CFG_K0_COHERENT; 242 mips_wr_config(config); 243} 244 245void 246platform_start(__register_t a0, __register_t a1, __register_t a2, 247 __register_t a3) 248{ |
| 249 vm_offset_t kernend; 250 | |
| 251 /* 252 * Make sure that kseg0 is mapped cacheable-coherent 253 */ 254 kseg0_map_coherent(); 255 256 /* clear the BSS and SBSS segments */ 257 memset(&edata, 0, (vm_offset_t)&end - (vm_offset_t)&edata); | 249 /* 250 * Make sure that kseg0 is mapped cacheable-coherent 251 */ 252 kseg0_map_coherent(); 253 254 /* clear the BSS and SBSS segments */ 255 memset(&edata, 0, (vm_offset_t)&end - (vm_offset_t)&edata); |
| 258 kernend = round_page((vm_offset_t)&end); | 256 mips_postboot_fixup(); |
| 259 260 /* Initialize pcpu stuff */ 261 mips_pcpu0_init(); 262 263#ifdef CFE 264 /* 265 * Initialize CFE firmware trampolines before 266 * we initialize the low-level console. --- 15 unchanged lines hidden --- | 257 258 /* Initialize pcpu stuff */ 259 mips_pcpu0_init(); 260 261#ifdef CFE 262 /* 263 * Initialize CFE firmware trampolines before 264 * we initialize the low-level console. --- 15 unchanged lines hidden --- |