1/* $NetBSD: cpuregs.h,v 1.70 2006/05/15 02:26:54 simonb Exp $ */
2
3/*
4 * Copyright (c) 1992, 1993
5 * The Regents of the University of California. All rights reserved.
6 *
7 * This code is derived from software contributed to Berkeley by
8 * Ralph Campbell and Rick Macklem.
--- 38 unchanged lines hidden (view full) ---
47 *
48 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machConst.h,
49 * v 9.2 89/10/21 15:55:22 jhh Exp SPRITE (DECWRL)
50 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAddrs.h,
51 * v 1.2 89/08/15 18:28:21 rab Exp SPRITE (DECWRL)
52 * from: Header: /sprite/src/kernel/vm/ds3100.md/RCS/vmPmaxConst.h,
53 * v 9.1 89/09/18 17:33:00 shirriff Exp SPRITE (DECWRL)
54 *
55 * $FreeBSD: head/sys/mips/include/cpuregs.h 229677 2012-01-06 01:23:26Z gonzo $
56 */
57
58#ifndef _MIPS_CPUREGS_H_
59#define _MIPS_CPUREGS_H_
60
61/*
62 * Address space.
63 * 32-bit mips CPUS partition their 32-bit address space into four segments:
--- 164 unchanged lines hidden (view full) ---
228 * r3k has 4 bits of execption type, r4k has 5 bits.
229 */
230#define MIPS_CR_BR_DELAY 0x80000000
231#define MIPS_CR_COP_ERR 0x30000000
232#define MIPS1_CR_EXC_CODE 0x0000003C /* four bits */
233#define MIPS3_CR_EXC_CODE 0x0000007C /* five bits */
234#define MIPS_CR_IP 0x0000FF00
235#define MIPS_CR_EXC_CODE_SHIFT 2
236#define MIPS_CR_COP_ERR_SHIFT 28
237
238/*
239 * The bits in the status register. All bits are active when set to 1.
240 *
241 * R3000 status register fields:
242 * MIPS_SR_COP_USABILITY Control the usability of the four coprocessors.
243 * MIPS_SR_TS TLB shutdown.
244 *
--- 749 unchanged lines hidden ---
2
3/*
4 * Copyright (c) 1992, 1993
5 * The Regents of the University of California. All rights reserved.
6 *
7 * This code is derived from software contributed to Berkeley by
8 * Ralph Campbell and Rick Macklem.
--- 38 unchanged lines hidden (view full) ---
47 *
48 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machConst.h,
49 * v 9.2 89/10/21 15:55:22 jhh Exp SPRITE (DECWRL)
50 * from: Header: /sprite/src/kernel/mach/ds3100.md/RCS/machAddrs.h,
51 * v 1.2 89/08/15 18:28:21 rab Exp SPRITE (DECWRL)
52 * from: Header: /sprite/src/kernel/vm/ds3100.md/RCS/vmPmaxConst.h,
53 * v 9.1 89/09/18 17:33:00 shirriff Exp SPRITE (DECWRL)
54 *
55 * $FreeBSD: head/sys/mips/include/cpuregs.h 229677 2012-01-06 01:23:26Z gonzo $
56 */
57
58#ifndef _MIPS_CPUREGS_H_
59#define _MIPS_CPUREGS_H_
60
61/*
62 * Address space.
63 * 32-bit mips CPUS partition their 32-bit address space into four segments:
--- 164 unchanged lines hidden (view full) ---
228 * r3k has 4 bits of execption type, r4k has 5 bits.
229 */
230#define MIPS_CR_BR_DELAY 0x80000000
231#define MIPS_CR_COP_ERR 0x30000000
232#define MIPS1_CR_EXC_CODE 0x0000003C /* four bits */
233#define MIPS3_CR_EXC_CODE 0x0000007C /* five bits */
234#define MIPS_CR_IP 0x0000FF00
235#define MIPS_CR_EXC_CODE_SHIFT 2
236#define MIPS_CR_COP_ERR_SHIFT 28
237
238/*
239 * The bits in the status register. All bits are active when set to 1.
240 *
241 * R3000 status register fields:
242 * MIPS_SR_COP_USABILITY Control the usability of the four coprocessors.
243 * MIPS_SR_TS TLB shutdown.
244 *
--- 749 unchanged lines hidden ---