1/*************************************************************************
2Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights
3reserved.
4
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are
8met:
9
10 * Redistributions of source code must retain the above copyright
11 notice, this list of conditions and the following disclaimer.
12
13 * Redistributions in binary form must reproduce the above
14 copyright notice, this list of conditions and the following
15 disclaimer in the documentation and/or other materials provided
16 with the distribution.
17
18 * Neither the name of Cavium Networks nor the names of
19 its contributors may be used to endorse or promote products
20 derived from this software without specific prior written
21 permission.
22
23This Software, including technical data, may be subject to U.S. export control laws, including the U.S. Export Administration Act and its associated regulations, and may be subject to export or import regulations in other countries.
24
25TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
26AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
27
28*************************************************************************/
29
30#include <sys/cdefs.h>
| 1/*************************************************************************
2Copyright (c) 2003-2007 Cavium Networks (support@cavium.com). All rights
3reserved.
4
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are
8met:
9
10 * Redistributions of source code must retain the above copyright
11 notice, this list of conditions and the following disclaimer.
12
13 * Redistributions in binary form must reproduce the above
14 copyright notice, this list of conditions and the following
15 disclaimer in the documentation and/or other materials provided
16 with the distribution.
17
18 * Neither the name of Cavium Networks nor the names of
19 its contributors may be used to endorse or promote products
20 derived from this software without specific prior written
21 permission.
22
23This Software, including technical data, may be subject to U.S. export control laws, including the U.S. Export Administration Act and its associated regulations, and may be subject to export or import regulations in other countries.
24
25TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
26AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR PERFORMANCE OF THE SOFTWARE LIES WITH YOU.
27
28*************************************************************************/
29
30#include <sys/cdefs.h>
|
31__FBSDID("$FreeBSD: head/sys/mips/cavium/octe/ethernet-common.c 215959 2010-11-28 00:26:08Z jmallett $");
| 31__FBSDID("$FreeBSD: head/sys/mips/cavium/octe/ethernet-common.c 215974 2010-11-28 05:57:24Z jmallett $");
|
32
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/bus.h>
36#include <sys/endian.h>
37#include <sys/kernel.h>
38#include <sys/mbuf.h>
39#include <sys/socket.h>
40
41#include <net/ethernet.h>
42#include <net/if.h>
43
44#include "wrapper-cvmx-includes.h"
45#include "ethernet-headers.h"
46
47extern int octeon_is_simulation(void);
48extern cvmx_bootinfo_t *octeon_bootinfo;
49
50
51/**
| 32
33#include <sys/param.h>
34#include <sys/systm.h>
35#include <sys/bus.h>
36#include <sys/endian.h>
37#include <sys/kernel.h>
38#include <sys/mbuf.h>
39#include <sys/socket.h>
40
41#include <net/ethernet.h>
42#include <net/if.h>
43
44#include "wrapper-cvmx-includes.h"
45#include "ethernet-headers.h"
46
47extern int octeon_is_simulation(void);
48extern cvmx_bootinfo_t *octeon_bootinfo;
49
50
51/**
|
52 * Get the low level ethernet statistics
53 *
54 * @param dev Device to get the statistics from
55 * @return Pointer to the statistics
56 */
57#if 0
58static struct ifnet_stats *cvm_oct_common_get_stats(struct ifnet *ifp)
59{
60 cvmx_pip_port_status_t rx_status;
61 cvmx_pko_port_status_t tx_status;
62 cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
63
64 if (priv->port < CVMX_PIP_NUM_INPUT_PORTS) {
65 if (octeon_is_simulation()) {
66 /* The simulator doesn't support statistics */
67 memset(&rx_status, 0, sizeof(rx_status));
68 memset(&tx_status, 0, sizeof(tx_status));
69 } else {
70 cvmx_pip_get_port_status(priv->port, 1, &rx_status);
71 cvmx_pko_get_port_status(priv->port, 1, &tx_status);
72 }
73
74 priv->stats.rx_packets += rx_status.inb_packets;
75 priv->stats.tx_packets += tx_status.packets;
76 priv->stats.rx_bytes += rx_status.inb_octets;
77 priv->stats.tx_bytes += tx_status.octets;
78 priv->stats.multicast += rx_status.multicast_packets;
79 priv->stats.rx_crc_errors += rx_status.inb_errors;
80 priv->stats.rx_frame_errors += rx_status.fcs_align_err_packets;
81
82 /* The drop counter must be incremented atomically since the RX
83 tasklet also increments it */
84#ifdef CONFIG_64BIT
85 cvmx_atomic_add64_nosync(&priv->stats.rx_dropped, rx_status.dropped_packets);
86#else
87 cvmx_atomic_add32_nosync((int32_t *)&priv->stats.rx_dropped, rx_status.dropped_packets);
88#endif
89 }
90
91 return &priv->stats;
92}
93#endif
94
95
96/**
| |
97 * Set the multicast list. Currently unimplemented.
98 *
99 * @param dev Device to work on
100 */
101void cvm_oct_common_set_multicast_list(struct ifnet *ifp)
102{
103 cvmx_gmxx_prtx_cfg_t gmx_cfg;
104 cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
105 int interface = INTERFACE(priv->port);
106 int index = INDEX(priv->port);
107
108 if ((interface < 2) && (cvmx_helper_interface_get_mode(interface) != CVMX_HELPER_INTERFACE_MODE_SPI)) {
109 cvmx_gmxx_rxx_adr_ctl_t control;
110 control.u64 = 0;
111 control.s.bcst = 1; /* Allow broadcast MAC addresses */
112
113 if (/*ifp->mc_list || */(ifp->if_flags&IFF_ALLMULTI) ||
114 (ifp->if_flags & IFF_PROMISC))
115 control.s.mcst = 2; /* Force accept multicast packets */
116 else
117 control.s.mcst = 1; /* Force reject multicat packets */
118
119 if (ifp->if_flags & IFF_PROMISC)
120 control.s.cam_mode = 0; /* Reject matches if promisc. Since CAM is shut off, should accept everything */
121 else
122 control.s.cam_mode = 1; /* Filter packets based on the CAM */
123
124 gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
125 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64 & ~1ull);
126
127 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CTL(index, interface), control.u64);
128 if (ifp->if_flags&IFF_PROMISC)
129 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM_EN(index, interface), 0);
130 else
131 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM_EN(index, interface), 1);
132
133 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
134 }
135}
136
137
138/**
139 * Set the hardware MAC address for a device
140 *
141 * @param dev Device to change the MAC address for
142 * @param addr Address structure to change it too.
143 */
144void cvm_oct_common_set_mac_address(struct ifnet *ifp, const void *addr)
145{
146 cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
147 cvmx_gmxx_prtx_cfg_t gmx_cfg;
148 int interface = INTERFACE(priv->port);
149 int index = INDEX(priv->port);
150
151 memcpy(priv->mac, addr, 6);
152
153 if ((interface < 2) && (cvmx_helper_interface_get_mode(interface) != CVMX_HELPER_INTERFACE_MODE_SPI)) {
154 int i;
155 const uint8_t *ptr = addr;
156 uint64_t mac = 0;
157 for (i = 0; i < 6; i++)
158 mac = (mac<<8) | (uint64_t)(ptr[i]);
159
160 gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
161 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64 & ~1ull);
162
163 cvmx_write_csr(CVMX_GMXX_SMACX(index, interface), mac);
164 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM0(index, interface), ptr[0]);
165 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM1(index, interface), ptr[1]);
166 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM2(index, interface), ptr[2]);
167 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM3(index, interface), ptr[3]);
168 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM4(index, interface), ptr[4]);
169 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM5(index, interface), ptr[5]);
170 cvm_oct_common_set_multicast_list(ifp);
171 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
172 }
173}
174
175
176/**
177 * Change the link MTU. Unimplemented
178 *
179 * @param dev Device to change
180 * @param new_mtu The new MTU
181 * @return Zero on success
182 */
183int cvm_oct_common_change_mtu(struct ifnet *ifp, int new_mtu)
184{
185 cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
186 int interface = INTERFACE(priv->port);
187 int index = INDEX(priv->port);
188 int vlan_bytes = 4;
189
190 /* Limit the MTU to make sure the ethernet packets are between 64 bytes
191 and 65535 bytes */
192 if ((new_mtu + 14 + 4 + vlan_bytes < 64) || (new_mtu + 14 + 4 + vlan_bytes > 65392)) {
193 printf("MTU must be between %d and %d.\n", 64-14-4-vlan_bytes, 65392-14-4-vlan_bytes);
194 return -EINVAL;
195 }
196 ifp->if_mtu = new_mtu;
197
198 if ((interface < 2) && (cvmx_helper_interface_get_mode(interface) != CVMX_HELPER_INTERFACE_MODE_SPI)) {
199 int max_packet = new_mtu + 14 + 4 + vlan_bytes; /* Add ethernet header and FCS, and VLAN if configured. */
200
201 if (OCTEON_IS_MODEL(OCTEON_CN3XXX) || OCTEON_IS_MODEL(OCTEON_CN58XX)) {
202 /* Signal errors on packets larger than the MTU */
203 cvmx_write_csr(CVMX_GMXX_RXX_FRM_MAX(index, interface), max_packet);
204 } else {
205 /* Set the hardware to truncate packets larger than the MTU and
206 smaller the 64 bytes */
207 cvmx_pip_frm_len_chkx_t frm_len_chk;
208 frm_len_chk.u64 = 0;
209 frm_len_chk.s.minlen = 64;
210 frm_len_chk.s.maxlen = max_packet;
211 cvmx_write_csr(CVMX_PIP_FRM_LEN_CHKX(interface), frm_len_chk.u64);
212 }
213 /* Set the hardware to truncate packets larger than the MTU. The
214 jabber register must be set to a multiple of 8 bytes, so round up */
215 cvmx_write_csr(CVMX_GMXX_RXX_JABBER(index, interface), (max_packet + 7) & ~7u);
216 }
217 return 0;
218}
219
220
221/**
| 52 * Set the multicast list. Currently unimplemented.
53 *
54 * @param dev Device to work on
55 */
56void cvm_oct_common_set_multicast_list(struct ifnet *ifp)
57{
58 cvmx_gmxx_prtx_cfg_t gmx_cfg;
59 cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
60 int interface = INTERFACE(priv->port);
61 int index = INDEX(priv->port);
62
63 if ((interface < 2) && (cvmx_helper_interface_get_mode(interface) != CVMX_HELPER_INTERFACE_MODE_SPI)) {
64 cvmx_gmxx_rxx_adr_ctl_t control;
65 control.u64 = 0;
66 control.s.bcst = 1; /* Allow broadcast MAC addresses */
67
68 if (/*ifp->mc_list || */(ifp->if_flags&IFF_ALLMULTI) ||
69 (ifp->if_flags & IFF_PROMISC))
70 control.s.mcst = 2; /* Force accept multicast packets */
71 else
72 control.s.mcst = 1; /* Force reject multicat packets */
73
74 if (ifp->if_flags & IFF_PROMISC)
75 control.s.cam_mode = 0; /* Reject matches if promisc. Since CAM is shut off, should accept everything */
76 else
77 control.s.cam_mode = 1; /* Filter packets based on the CAM */
78
79 gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
80 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64 & ~1ull);
81
82 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CTL(index, interface), control.u64);
83 if (ifp->if_flags&IFF_PROMISC)
84 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM_EN(index, interface), 0);
85 else
86 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM_EN(index, interface), 1);
87
88 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
89 }
90}
91
92
93/**
94 * Set the hardware MAC address for a device
95 *
96 * @param dev Device to change the MAC address for
97 * @param addr Address structure to change it too.
98 */
99void cvm_oct_common_set_mac_address(struct ifnet *ifp, const void *addr)
100{
101 cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
102 cvmx_gmxx_prtx_cfg_t gmx_cfg;
103 int interface = INTERFACE(priv->port);
104 int index = INDEX(priv->port);
105
106 memcpy(priv->mac, addr, 6);
107
108 if ((interface < 2) && (cvmx_helper_interface_get_mode(interface) != CVMX_HELPER_INTERFACE_MODE_SPI)) {
109 int i;
110 const uint8_t *ptr = addr;
111 uint64_t mac = 0;
112 for (i = 0; i < 6; i++)
113 mac = (mac<<8) | (uint64_t)(ptr[i]);
114
115 gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
116 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64 & ~1ull);
117
118 cvmx_write_csr(CVMX_GMXX_SMACX(index, interface), mac);
119 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM0(index, interface), ptr[0]);
120 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM1(index, interface), ptr[1]);
121 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM2(index, interface), ptr[2]);
122 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM3(index, interface), ptr[3]);
123 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM4(index, interface), ptr[4]);
124 cvmx_write_csr(CVMX_GMXX_RXX_ADR_CAM5(index, interface), ptr[5]);
125 cvm_oct_common_set_multicast_list(ifp);
126 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
127 }
128}
129
130
131/**
132 * Change the link MTU. Unimplemented
133 *
134 * @param dev Device to change
135 * @param new_mtu The new MTU
136 * @return Zero on success
137 */
138int cvm_oct_common_change_mtu(struct ifnet *ifp, int new_mtu)
139{
140 cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
141 int interface = INTERFACE(priv->port);
142 int index = INDEX(priv->port);
143 int vlan_bytes = 4;
144
145 /* Limit the MTU to make sure the ethernet packets are between 64 bytes
146 and 65535 bytes */
147 if ((new_mtu + 14 + 4 + vlan_bytes < 64) || (new_mtu + 14 + 4 + vlan_bytes > 65392)) {
148 printf("MTU must be between %d and %d.\n", 64-14-4-vlan_bytes, 65392-14-4-vlan_bytes);
149 return -EINVAL;
150 }
151 ifp->if_mtu = new_mtu;
152
153 if ((interface < 2) && (cvmx_helper_interface_get_mode(interface) != CVMX_HELPER_INTERFACE_MODE_SPI)) {
154 int max_packet = new_mtu + 14 + 4 + vlan_bytes; /* Add ethernet header and FCS, and VLAN if configured. */
155
156 if (OCTEON_IS_MODEL(OCTEON_CN3XXX) || OCTEON_IS_MODEL(OCTEON_CN58XX)) {
157 /* Signal errors on packets larger than the MTU */
158 cvmx_write_csr(CVMX_GMXX_RXX_FRM_MAX(index, interface), max_packet);
159 } else {
160 /* Set the hardware to truncate packets larger than the MTU and
161 smaller the 64 bytes */
162 cvmx_pip_frm_len_chkx_t frm_len_chk;
163 frm_len_chk.u64 = 0;
164 frm_len_chk.s.minlen = 64;
165 frm_len_chk.s.maxlen = max_packet;
166 cvmx_write_csr(CVMX_PIP_FRM_LEN_CHKX(interface), frm_len_chk.u64);
167 }
168 /* Set the hardware to truncate packets larger than the MTU. The
169 jabber register must be set to a multiple of 8 bytes, so round up */
170 cvmx_write_csr(CVMX_GMXX_RXX_JABBER(index, interface), (max_packet + 7) & ~7u);
171 }
172 return 0;
173}
174
175
176/**
|
| 177 * Enable port.
178 */
179int cvm_oct_common_open(struct ifnet *ifp)
180{
181 cvmx_gmxx_prtx_cfg_t gmx_cfg;
182 cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
183 int interface = INTERFACE(priv->port);
184 int index = INDEX(priv->port);
185 cvmx_helper_link_info_t link_info;
186
187 gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
188 gmx_cfg.s.en = 1;
189 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
190
191 if (!octeon_is_simulation()) {
192 link_info = cvmx_helper_link_get(priv->port);
193 if (!link_info.s.link_up)
194 if_link_state_change(ifp, LINK_STATE_DOWN);
195 else
196 if_link_state_change(ifp, LINK_STATE_UP);
197 }
198
199 return 0;
200}
201
202
203/**
204 * Disable port.
205 */
206int cvm_oct_common_stop(struct ifnet *ifp)
207{
208 cvmx_gmxx_prtx_cfg_t gmx_cfg;
209 cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
210 int interface = INTERFACE(priv->port);
211 int index = INDEX(priv->port);
212
213 gmx_cfg.u64 = cvmx_read_csr(CVMX_GMXX_PRTX_CFG(index, interface));
214 gmx_cfg.s.en = 0;
215 cvmx_write_csr(CVMX_GMXX_PRTX_CFG(index, interface), gmx_cfg.u64);
216 return 0;
217}
218
219/**
220 * Poll for link status change.
221 */
222void cvm_oct_common_poll(struct ifnet *ifp)
223{
224 cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
225 cvmx_helper_link_info_t link_info;
226
227 link_info = cvmx_helper_link_get(priv->port);
228 if (link_info.u64 == priv->link_info)
229 return;
230
231 link_info = cvmx_helper_link_autoconf(priv->port);
232 priv->link_info = link_info.u64;
233 priv->need_link_update = 1;
234}
235
236
237/**
|
222 * Per network device initialization
223 *
224 * @param dev Device to initialize
225 * @return Zero on success
226 */
227int cvm_oct_common_init(struct ifnet *ifp)
228{
229 static int count;
230 char mac[6] = {
231 octeon_bootinfo->mac_addr_base[0],
232 octeon_bootinfo->mac_addr_base[1],
233 octeon_bootinfo->mac_addr_base[2],
234 octeon_bootinfo->mac_addr_base[3],
235 octeon_bootinfo->mac_addr_base[4],
236 octeon_bootinfo->mac_addr_base[5] + count};
237 cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
238
239 ifp->if_mtu = ETHERMTU;
240
241 count++;
242
| 238 * Per network device initialization
239 *
240 * @param dev Device to initialize
241 * @return Zero on success
242 */
243int cvm_oct_common_init(struct ifnet *ifp)
244{
245 static int count;
246 char mac[6] = {
247 octeon_bootinfo->mac_addr_base[0],
248 octeon_bootinfo->mac_addr_base[1],
249 octeon_bootinfo->mac_addr_base[2],
250 octeon_bootinfo->mac_addr_base[3],
251 octeon_bootinfo->mac_addr_base[4],
252 octeon_bootinfo->mac_addr_base[5] + count};
253 cvm_oct_private_t *priv = (cvm_oct_private_t *)ifp->if_softc;
254
255 ifp->if_mtu = ETHERMTU;
256
257 count++;
258
|
243#if 0
244 ifp->get_stats = cvm_oct_common_get_stats;
245#ifdef CONFIG_NET_POLL_CONTROLLER
246 ifp->poll_controller = cvm_oct_poll_controller;
247#endif
248#endif
249
| |
250 cvm_oct_mdio_setup_device(ifp);
251
252 cvm_oct_common_set_mac_address(ifp, mac);
253 cvm_oct_common_change_mtu(ifp, ifp->if_mtu);
254
| 259 cvm_oct_mdio_setup_device(ifp);
260
261 cvm_oct_common_set_mac_address(ifp, mac);
262 cvm_oct_common_change_mtu(ifp, ifp->if_mtu);
263
|
255#if 0
256 /* Zero out stats for port so we won't mistakenly show counters from the
257 bootloader */
258 memset(ifp->get_stats(ifp), 0, sizeof(struct ifnet_stats));
259#endif
260
| |
261 /*
262 * Do any last-minute board-specific initialization.
263 */
264 switch (cvmx_sysinfo_get()->board_type) {
265#if defined(OCTEON_VENDOR_LANNER)
266 case CVMX_BOARD_TYPE_CUST_LANNER_MR320:
267 if (priv->phy_id == 16)
268 cvm_oct_mv88e61xx_setup_device(ifp);
269 break;
270#endif
271 default:
272 break;
273 }
274
275 device_attach(priv->dev);
276
277 return 0;
278}
279
280void cvm_oct_common_uninit(struct ifnet *ifp)
281{
282 /* Currently nothing to do */
283}
284
| 264 /*
265 * Do any last-minute board-specific initialization.
266 */
267 switch (cvmx_sysinfo_get()->board_type) {
268#if defined(OCTEON_VENDOR_LANNER)
269 case CVMX_BOARD_TYPE_CUST_LANNER_MR320:
270 if (priv->phy_id == 16)
271 cvm_oct_mv88e61xx_setup_device(ifp);
272 break;
273#endif
274 default:
275 break;
276 }
277
278 device_attach(priv->dev);
279
280 return 0;
281}
282
283void cvm_oct_common_uninit(struct ifnet *ifp)
284{
285 /* Currently nothing to do */
286}
287
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