| if_argevar.h (220356) | if_argevar.h (234862) |
|---|---|
| 1/*- 2 * Copyright (c) 2009, Oleksandr Tymoshenko 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * | 1/*- 2 * Copyright (c) 2009, Oleksandr Tymoshenko 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * |
| 27 * $FreeBSD: head/sys/mips/atheros/if_argevar.h 220356 2011-04-05 06:33:35Z adrian $ | 27 * $FreeBSD: head/sys/mips/atheros/if_argevar.h 234862 2012-05-01 06:18:30Z adrian $ |
| 28 */ 29 30#ifndef __IF_ARGEVAR_H__ 31#define __IF_ARGEVAR_H__ 32 33#define ARGE_NPHY 32 34#define ARGE_TX_RING_COUNT 128 35#define ARGE_RX_RING_COUNT 128 --- 26 unchanged lines hidden (view full) --- 62#define ARGE_READ(sc, reg) bus_read_4(sc->arge_res, (reg)) 63 64#define ARGE_SET_BITS(sc, reg, bits) \ 65 ARGE_WRITE(sc, reg, ARGE_READ(sc, (reg)) | (bits)) 66 67#define ARGE_CLEAR_BITS(sc, reg, bits) \ 68 ARGE_WRITE(sc, reg, ARGE_READ(sc, (reg)) & ~(bits)) 69 | 28 */ 29 30#ifndef __IF_ARGEVAR_H__ 31#define __IF_ARGEVAR_H__ 32 33#define ARGE_NPHY 32 34#define ARGE_TX_RING_COUNT 128 35#define ARGE_RX_RING_COUNT 128 --- 26 unchanged lines hidden (view full) --- 62#define ARGE_READ(sc, reg) bus_read_4(sc->arge_res, (reg)) 63 64#define ARGE_SET_BITS(sc, reg, bits) \ 65 ARGE_WRITE(sc, reg, ARGE_READ(sc, (reg)) | (bits)) 66 67#define ARGE_CLEAR_BITS(sc, reg, bits) \ 68 ARGE_WRITE(sc, reg, ARGE_READ(sc, (reg)) & ~(bits)) 69 |
| 70/* 71 * MII registers access macros 72 */ 73#define ARGE_MII_READ(reg) \ 74 *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1((AR71XX_MII_BASE + reg))) | 70#define ARGE_MDIO_WRITE(_sc, _reg, _val) \ 71 ARGE_WRITE((_sc), (_reg), (_val)) 72#define ARGE_MDIO_READ(_sc, _reg) \ 73 ARGE_READ((_sc), (_reg)) |
| 75 | 74 |
| 76#define ARGE_MII_WRITE(reg, val) \ 77 *((volatile uint32_t *)MIPS_PHYS_TO_KSEG1((AR71XX_MII_BASE + reg))) = (val) 78 79 | |
| 80#define ARGE_DESC_EMPTY (1 << 31) 81#define ARGE_DESC_MORE (1 << 24) 82#define ARGE_DESC_SIZE_MASK ((1 << 12) - 1) 83#define ARGE_DMASIZE(len) ((len) & ARGE_DESC_SIZE_MASK) 84struct arge_desc { 85 uint32_t packet_addr; 86 uint32_t packet_ctrl; 87 uint32_t next_desc; --- 39 unchanged lines hidden (view full) --- 127 struct ifnet *arge_ifp; /* interface info */ 128 device_t arge_dev; 129 struct ifmedia arge_ifmedia; 130 /* 131 * Media & duples settings for multiPHY MAC 132 */ 133 uint32_t arge_media_type; 134 uint32_t arge_duplex_mode; | 75#define ARGE_DESC_EMPTY (1 << 31) 76#define ARGE_DESC_MORE (1 << 24) 77#define ARGE_DESC_SIZE_MASK ((1 << 12) - 1) 78#define ARGE_DMASIZE(len) ((len) & ARGE_DESC_SIZE_MASK) 79struct arge_desc { 80 uint32_t packet_addr; 81 uint32_t packet_ctrl; 82 uint32_t next_desc; --- 39 unchanged lines hidden (view full) --- 122 struct ifnet *arge_ifp; /* interface info */ 123 device_t arge_dev; 124 struct ifmedia arge_ifmedia; 125 /* 126 * Media & duples settings for multiPHY MAC 127 */ 128 uint32_t arge_media_type; 129 uint32_t arge_duplex_mode; |
| 130 uint32_t arge_phymask; 131 uint8_t arge_eaddr[ETHER_ADDR_LEN]; |
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| 135 struct resource *arge_res; 136 int arge_rid; 137 struct resource *arge_irq; 138 void *arge_intrhand; 139 device_t arge_miibus; | 132 struct resource *arge_res; 133 int arge_rid; 134 struct resource *arge_irq; 135 void *arge_intrhand; 136 device_t arge_miibus; |
| 137 device_t arge_miiproxy; |
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| 140 bus_dma_tag_t arge_parent_tag; 141 bus_dma_tag_t arge_tag; 142 struct mtx arge_mtx; 143 struct callout arge_stat_callout; 144 struct task arge_link_task; 145 struct arge_chain_data arge_cdata; 146 struct arge_ring_data arge_rdata; 147 int arge_link_status; 148 int arge_detach; 149 uint32_t arge_intr_status; 150 int arge_mac_unit; | 138 bus_dma_tag_t arge_parent_tag; 139 bus_dma_tag_t arge_tag; 140 struct mtx arge_mtx; 141 struct callout arge_stat_callout; 142 struct task arge_link_task; 143 struct arge_chain_data arge_cdata; 144 struct arge_ring_data arge_rdata; 145 int arge_link_status; 146 int arge_detach; 147 uint32_t arge_intr_status; 148 int arge_mac_unit; |
| 151 int arge_phymask; | |
| 152 int arge_if_flags; 153 uint32_t arge_debug; 154 struct { 155 uint32_t tx_pkts_unaligned; 156 uint32_t tx_pkts_aligned; 157 uint32_t rx_overflow; 158 uint32_t tx_underflow; 159 } stats; 160}; 161 162#endif /* __IF_ARGEVAR_H__ */ | 149 int arge_if_flags; 150 uint32_t arge_debug; 151 struct { 152 uint32_t tx_pkts_unaligned; 153 uint32_t tx_pkts_aligned; 154 uint32_t rx_overflow; 155 uint32_t tx_underflow; 156 } stats; 157}; 158 159#endif /* __IF_ARGEVAR_H__ */ |