| ar71xxreg.h (233081) | ar71xxreg.h (234862) |
|---|---|
| 1/*- 2 * Copyright (c) 2009 Oleksandr Tymoshenko 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 | 1/*- 2 * Copyright (c) 2009 Oleksandr Tymoshenko 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 |
| 27/* $FreeBSD: head/sys/mips/atheros/ar71xxreg.h 233081 2012-03-17 07:25:23Z adrian $ */ | 27/* $FreeBSD: head/sys/mips/atheros/ar71xxreg.h 234862 2012-05-01 06:18:30Z adrian $ */ |
| 28 29#ifndef _AR71XX_REG_H_ 30#define _AR71XX_REG_H_ 31 32/* PCI region */ 33#define AR71XX_PCI_MEM_BASE 0x10000000 34/* 35 * PCI mem windows is 0x08000000 bytes long but we exclude control --- 242 unchanged lines hidden (view full) --- 278#define MII_CTRL_SPEED_100 1 279#define MII_CTRL_SPEED_1000 2 280 281/* 282 * GigE adapters region 283 */ 284#define AR71XX_MAC0_BASE 0x19000000 285#define AR71XX_MAC1_BASE 0x1A000000 | 28 29#ifndef _AR71XX_REG_H_ 30#define _AR71XX_REG_H_ 31 32/* PCI region */ 33#define AR71XX_PCI_MEM_BASE 0x10000000 34/* 35 * PCI mem windows is 0x08000000 bytes long but we exclude control --- 242 unchanged lines hidden (view full) --- 278#define MII_CTRL_SPEED_100 1 279#define MII_CTRL_SPEED_1000 2 280 281/* 282 * GigE adapters region 283 */ 284#define AR71XX_MAC0_BASE 0x19000000 285#define AR71XX_MAC1_BASE 0x1A000000 |
| 286/* 287 * All 5 PHYs accessible only through MAC0 register space 288 */ 289#define AR71XX_MII_BASE 0x19000000 | |
| 290 291#define AR71XX_MAC_CFG1 0x00 292#define MAC_CFG1_SOFT_RESET (1 << 31) 293#define MAC_CFG1_SIMUL_RESET (1 << 30) 294#define MAC_CFG1_MAC_RX_BLOCK_RESET (1 << 19) 295#define MAC_CFG1_MAC_TX_BLOCK_RESET (1 << 18) 296#define MAC_CFG1_RX_FUNC_RESET (1 << 17) 297#define MAC_CFG1_TX_FUNC_RESET (1 << 16) --- 242 unchanged lines hidden --- | 286 287#define AR71XX_MAC_CFG1 0x00 288#define MAC_CFG1_SOFT_RESET (1 << 31) 289#define MAC_CFG1_SIMUL_RESET (1 << 30) 290#define MAC_CFG1_MAC_RX_BLOCK_RESET (1 << 19) 291#define MAC_CFG1_MAC_TX_BLOCK_RESET (1 << 18) 292#define MAC_CFG1_RX_FUNC_RESET (1 << 17) 293#define MAC_CFG1_TX_FUNC_RESET (1 << 16) --- 242 unchanged lines hidden --- |