ar71xxreg.h (213278) | ar71xxreg.h (213286) |
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1/*- 2 * Copyright (c) 2009 Oleksandr Tymoshenko 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 | 1/*- 2 * Copyright (c) 2009 Oleksandr Tymoshenko 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 10 unchanged lines hidden (view full) --- 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 |
27/* $FreeBSD: head/sys/mips/atheros/ar71xxreg.h 213278 2010-09-29 21:01:16Z gonzo $ */ | 27/* $FreeBSD: head/sys/mips/atheros/ar71xxreg.h 213286 2010-09-29 23:06:41Z gonzo $ */ |
28 29#ifndef _AR71XX_REG_H_ 30#define _AR71XX_REG_H_ 31 32/* PCI region */ 33#define AR71XX_PCI_MEM_BASE 0x10000000 34/* 35 * PCI mem windows is 0x08000000 bytes long but we exclude control --- 110 unchanged lines hidden (view full) --- 146#define AR71XX_GPIO_INT 0x14 147#define AR71XX_GPIO_INT_TYPE 0x18 148#define AR71XX_GPIO_INT_POLARITY 0x1c 149#define AR71XX_GPIO_INT_PENDING 0x20 150#define AR71XX_GPIO_INT_MASK 0x24 151#define AR71XX_GPIO_FUNCTION 0x28 152#define GPIO_FUNC_STEREO_EN (1 << 17) 153#define GPIO_FUNC_SLIC_EN (1 << 16) | 28 29#ifndef _AR71XX_REG_H_ 30#define _AR71XX_REG_H_ 31 32/* PCI region */ 33#define AR71XX_PCI_MEM_BASE 0x10000000 34/* 35 * PCI mem windows is 0x08000000 bytes long but we exclude control --- 110 unchanged lines hidden (view full) --- 146#define AR71XX_GPIO_INT 0x14 147#define AR71XX_GPIO_INT_TYPE 0x18 148#define AR71XX_GPIO_INT_POLARITY 0x1c 149#define AR71XX_GPIO_INT_PENDING 0x20 150#define AR71XX_GPIO_INT_MASK 0x24 151#define AR71XX_GPIO_FUNCTION 0x28 152#define GPIO_FUNC_STEREO_EN (1 << 17) 153#define GPIO_FUNC_SLIC_EN (1 << 16) |
154#define GPIO_FUNC_SPI_CS2_EN (1 << 15) | 154#define GPIO_FUNC_SPI_CS2_EN (1 << 13) |
155 /* CS2 is shared with GPIO_1 */ | 155 /* CS2 is shared with GPIO_1 */ |
156#define GPIO_FUNC_SPI_CS1_EN (1 << 14) | 156#define GPIO_FUNC_SPI_CS1_EN (1 << 12) |
157 /* CS1 is shared with GPIO_0 */ | 157 /* CS1 is shared with GPIO_0 */ |
158#define GPIO_FUNC_SPI_EN (1 << 13) | |
159#define GPIO_FUNC_UART_EN (1 << 8) 160#define GPIO_FUNC_USB_OC_EN (1 << 4) 161#define GPIO_FUNC_USB_CLK_EN (0) 162 163#define AR71XX_BASE_FREQ 40000000 164#define AR71XX_PLL_CPU_BASE 0x18050000 165#define AR71XX_PLL_CPU_CONFIG 0x18050000 166#define PLL_SW_UPDATE (1 << 31) --- 363 unchanged lines hidden --- | 158#define GPIO_FUNC_UART_EN (1 << 8) 159#define GPIO_FUNC_USB_OC_EN (1 << 4) 160#define GPIO_FUNC_USB_CLK_EN (0) 161 162#define AR71XX_BASE_FREQ 40000000 163#define AR71XX_PLL_CPU_BASE 0x18050000 164#define AR71XX_PLL_CPU_CONFIG 0x18050000 165#define PLL_SW_UPDATE (1 << 31) --- 363 unchanged lines hidden --- |