ar71xx_gpio.c (221518) | ar71xx_gpio.c (228518) |
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1/*- 2 * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org> 3 * Copyright (c) 2009, Luiz Otavio O Souza. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 17 unchanged lines hidden (view full) --- 26 * SUCH DAMAGE. 27 */ 28 29/* 30 * GPIO driver for AR71xx 31 */ 32 33#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2009, Oleksandr Tymoshenko <gonzo@FreeBSD.org> 3 * Copyright (c) 2009, Luiz Otavio O Souza. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: --- 17 unchanged lines hidden (view full) --- 26 * SUCH DAMAGE. 27 */ 28 29/* 30 * GPIO driver for AR71xx 31 */ 32 33#include <sys/cdefs.h> |
34__FBSDID("$FreeBSD: head/sys/mips/atheros/ar71xx_gpio.c 221518 2011-05-06 02:45:02Z adrian $"); | 34__FBSDID("$FreeBSD: head/sys/mips/atheros/ar71xx_gpio.c 228518 2011-12-15 01:03:49Z adrian $"); |
35 36#include <sys/param.h> 37#include <sys/systm.h> 38#include <sys/bus.h> 39 40#include <sys/kernel.h> 41#include <sys/module.h> 42#include <sys/rman.h> --- 6 unchanged lines hidden (view full) --- 49#include <mips/atheros/ar71xxreg.h> 50#include <mips/atheros/ar71xx_setup.h> 51#include <mips/atheros/ar71xx_gpiovar.h> 52 53#include "gpio_if.h" 54 55#define DEFAULT_CAPS (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT) 56 | 35 36#include <sys/param.h> 37#include <sys/systm.h> 38#include <sys/bus.h> 39 40#include <sys/kernel.h> 41#include <sys/module.h> 42#include <sys/rman.h> --- 6 unchanged lines hidden (view full) --- 49#include <mips/atheros/ar71xxreg.h> 50#include <mips/atheros/ar71xx_setup.h> 51#include <mips/atheros/ar71xx_gpiovar.h> 52 53#include "gpio_if.h" 54 55#define DEFAULT_CAPS (GPIO_PIN_INPUT | GPIO_PIN_OUTPUT) 56 |
57struct ar71xx_gpio_pin { 58 const char *name; 59 int pin; 60 int flags; 61}; 62 63static struct ar71xx_gpio_pin ar71xx_gpio_pins[] = { 64 { "RFled", 2, GPIO_PIN_OUTPUT}, 65 { "SW4", 8, GPIO_PIN_INPUT}, 66 { NULL, 0, 0}, 67}; 68 | |
69/* 70 * Helpers 71 */ 72static void ar71xx_gpio_function_enable(struct ar71xx_gpio_softc *sc, 73 uint32_t mask); 74static void ar71xx_gpio_function_disable(struct ar71xx_gpio_softc *sc, 75 uint32_t mask); 76static void ar71xx_gpio_pin_configure(struct ar71xx_gpio_softc *sc, --- 271 unchanged lines hidden (view full) --- 348 return (0); 349} 350 351static int 352ar71xx_gpio_attach(device_t dev) 353{ 354 struct ar71xx_gpio_softc *sc = device_get_softc(dev); 355 int error = 0; | 57/* 58 * Helpers 59 */ 60static void ar71xx_gpio_function_enable(struct ar71xx_gpio_softc *sc, 61 uint32_t mask); 62static void ar71xx_gpio_function_disable(struct ar71xx_gpio_softc *sc, 63 uint32_t mask); 64static void ar71xx_gpio_pin_configure(struct ar71xx_gpio_softc *sc, --- 271 unchanged lines hidden (view full) --- 336 return (0); 337} 338 339static int 340ar71xx_gpio_attach(device_t dev) 341{ 342 struct ar71xx_gpio_softc *sc = device_get_softc(dev); 343 int error = 0; |
356 struct ar71xx_gpio_pin *pinp; 357 int i; | 344 int i, j, maxpin; 345 int mask; 346 int old = 0; |
358 359 KASSERT((device_get_unit(dev) == 0), 360 ("ar71xx_gpio: Only one gpio module supported")); 361 362 mtx_init(&sc->gpio_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 363 MTX_DEF); 364 365 /* Map control/status registers. */ --- 17 unchanged lines hidden (view full) --- 383 if ((bus_setup_intr(dev, sc->gpio_irq_res, INTR_TYPE_MISC, 384 ar71xx_gpio_filter, ar71xx_gpio_intr, sc, &sc->gpio_ih))) { 385 device_printf(dev, 386 "WARNING: unable to register interrupt handler\n"); 387 return (ENXIO); 388 } 389 390 sc->dev = dev; | 347 348 KASSERT((device_get_unit(dev) == 0), 349 ("ar71xx_gpio: Only one gpio module supported")); 350 351 mtx_init(&sc->gpio_mtx, device_get_nameunit(dev), MTX_NETWORK_LOCK, 352 MTX_DEF); 353 354 /* Map control/status registers. */ --- 17 unchanged lines hidden (view full) --- 372 if ((bus_setup_intr(dev, sc->gpio_irq_res, INTR_TYPE_MISC, 373 ar71xx_gpio_filter, ar71xx_gpio_intr, sc, &sc->gpio_ih))) { 374 device_printf(dev, 375 "WARNING: unable to register interrupt handler\n"); 376 return (ENXIO); 377 } 378 379 sc->dev = dev; |
391 ar71xx_gpio_function_enable(sc, GPIO_FUNC_SPI_CS1_EN); 392 ar71xx_gpio_function_enable(sc, GPIO_FUNC_SPI_CS2_EN); | 380 381 /* Enable function bits that are required */ 382 if (resource_int_value(device_get_name(dev), device_get_unit(dev), 383 "function_set", &mask) == 0) { 384 device_printf(dev, "function_set: 0x%x\n", mask); 385 ar71xx_gpio_function_enable(sc, mask); 386 old = 1; 387 } 388 /* Disable function bits that are required */ 389 if (resource_int_value(device_get_name(dev), device_get_unit(dev), 390 "function_clear", &mask) == 0) { 391 device_printf(dev, "function_clear: 0x%x\n", mask); 392 ar71xx_gpio_function_disable(sc, mask); 393 old = 1; 394 } 395 /* Handle previous behaviour */ 396 if (old == 0) { 397 ar71xx_gpio_function_enable(sc, GPIO_FUNC_SPI_CS1_EN); 398 ar71xx_gpio_function_enable(sc, GPIO_FUNC_SPI_CS2_EN); 399 } 400 |
393 /* Configure all pins as input */ 394 /* disable interrupts for all pins */ 395 GPIO_WRITE(sc, AR71XX_GPIO_INT_MASK, 0); | 401 /* Configure all pins as input */ 402 /* disable interrupts for all pins */ 403 GPIO_WRITE(sc, AR71XX_GPIO_INT_MASK, 0); |
396 pinp = ar71xx_gpio_pins; 397 i = 0; 398 while (pinp->name) { 399 strncpy(sc->gpio_pins[i].gp_name, pinp->name, GPIOMAXNAME); 400 sc->gpio_pins[i].gp_pin = pinp->pin; | 404 405 /* Initialise all pins specified in the mask, up to the pin count */ 406 (void) ar71xx_gpio_pin_max(dev, &maxpin); 407 if (resource_int_value(device_get_name(dev), device_get_unit(dev), 408 "pinmask", &mask) != 0) 409 mask = 0; 410 device_printf(dev, "gpio pinmask=0x%x\n", mask); 411 for (i = 0, j = 0; j < maxpin; j++) { 412 if ((mask & (1 << j)) == 0) 413 continue; 414 snprintf(sc->gpio_pins[i].gp_name, GPIOMAXNAME, 415 "pin %d", j); 416 sc->gpio_pins[i].gp_pin = j; |
401 sc->gpio_pins[i].gp_caps = DEFAULT_CAPS; 402 sc->gpio_pins[i].gp_flags = 0; | 417 sc->gpio_pins[i].gp_caps = DEFAULT_CAPS; 418 sc->gpio_pins[i].gp_flags = 0; |
403 ar71xx_gpio_pin_configure(sc, &sc->gpio_pins[i], pinp->flags); 404 pinp++; | 419 ar71xx_gpio_pin_configure(sc, &sc->gpio_pins[i], DEFAULT_CAPS); |
405 i++; 406 } | 420 i++; 421 } |
407 | |
408 sc->gpio_npins = i; | 422 sc->gpio_npins = i; |
409 | |
410 device_add_child(dev, "gpioc", device_get_unit(dev)); 411 device_add_child(dev, "gpiobus", device_get_unit(dev)); 412 return (bus_generic_attach(dev)); 413} 414 415static int 416ar71xx_gpio_detach(device_t dev) 417{ --- 42 unchanged lines hidden --- | 423 device_add_child(dev, "gpioc", device_get_unit(dev)); 424 device_add_child(dev, "gpiobus", device_get_unit(dev)); 425 return (bus_generic_attach(dev)); 426} 427 428static int 429ar71xx_gpio_detach(device_t dev) 430{ --- 42 unchanged lines hidden --- |