| vmparam.h (217192) | vmparam.h (219691) |
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| 1/*- 2 * Copyright (c) 1988 University of Utah. 3 * Copyright (c) 1992, 1993 4 * The Regents of the University of California. All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * the Systems Programming Group of the University of Utah Computer 8 * Science Department and Ralph Campbell. --- 21 unchanged lines hidden (view full) --- 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * from: Utah $Hdr: vmparam.h 1.16 91/01/18$ 35 * 36 * @(#)vmparam.h 8.2 (Berkeley) 4/22/94 37 * | 1/*- 2 * Copyright (c) 1988 University of Utah. 3 * Copyright (c) 1992, 1993 4 * The Regents of the University of California. All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * the Systems Programming Group of the University of Utah Computer 8 * Science Department and Ralph Campbell. --- 21 unchanged lines hidden (view full) --- 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * from: Utah $Hdr: vmparam.h 1.16 91/01/18$ 35 * 36 * @(#)vmparam.h 8.2 (Berkeley) 4/22/94 37 * |
| 38 * $FreeBSD: head/sys/ia64/include/vmparam.h 217192 2011-01-09 12:50:44Z kib $ | 38 * $FreeBSD: head/sys/ia64/include/vmparam.h 219691 2011-03-16 03:53:18Z marcel $ |
| 39 */ 40 41#ifndef _MACHINE_VMPARAM_H_ 42#define _MACHINE_VMPARAM_H_ 43 44/* 45 * USRSTACK is the top (end) of the user stack. Immediately above the user 46 * stack resides the syscall gateway page. --- 79 unchanged lines hidden (view full) --- 126 * Manipulating region bits of an address. 127 */ 128#define IA64_RR_BASE(n) (((uint64_t) (n)) << 61) 129#define IA64_RR_MASK(x) ((x) & ((1L << 61) - 1)) 130 131#define IA64_PHYS_TO_RR7(x) ((x) | IA64_RR_BASE(7)) 132 133/* | 39 */ 40 41#ifndef _MACHINE_VMPARAM_H_ 42#define _MACHINE_VMPARAM_H_ 43 44/* 45 * USRSTACK is the top (end) of the user stack. Immediately above the user 46 * stack resides the syscall gateway page. --- 79 unchanged lines hidden (view full) --- 126 * Manipulating region bits of an address. 127 */ 128#define IA64_RR_BASE(n) (((uint64_t) (n)) << 61) 129#define IA64_RR_MASK(x) ((x) & ((1L << 61) - 1)) 130 131#define IA64_PHYS_TO_RR7(x) ((x) | IA64_RR_BASE(7)) 132 133/* |
| 134 * The Itanium architecture defines that all implementations support at 135 * least 51 virtual address bits (i.e. IMPL_VA_MSB=50). The unimplemented 136 * bits are sign-extended from VA{IMPL_VA_MSB}. As such, there's a gap in 137 * the virtual address range, which extends at most from 0x0004000000000000 138 * to 0x1ffbffffffffffff. We define the top half of a region in terms of 139 * this worst-case gap. 140 */ 141#define IA64_REGION_TOP_HALF 0x1ffc000000000000 142 143/* |
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| 134 * Page size of the identity mappings in region 7. 135 */ 136#ifndef LOG2_ID_PAGE_SIZE 137#define LOG2_ID_PAGE_SIZE 28 /* 256M */ 138#endif 139 140#define IA64_ID_PAGE_SHIFT (LOG2_ID_PAGE_SIZE) 141#define IA64_ID_PAGE_SIZE (1<<(LOG2_ID_PAGE_SIZE)) 142#define IA64_ID_PAGE_MASK (IA64_ID_PAGE_SIZE-1) 143 144#define IA64_BACKINGSTORE IA64_RR_BASE(4) 145 146/* | 144 * Page size of the identity mappings in region 7. 145 */ 146#ifndef LOG2_ID_PAGE_SIZE 147#define LOG2_ID_PAGE_SIZE 28 /* 256M */ 148#endif 149 150#define IA64_ID_PAGE_SHIFT (LOG2_ID_PAGE_SIZE) 151#define IA64_ID_PAGE_SIZE (1<<(LOG2_ID_PAGE_SIZE)) 152#define IA64_ID_PAGE_MASK (IA64_ID_PAGE_SIZE-1) 153 154#define IA64_BACKINGSTORE IA64_RR_BASE(4) 155 156/* |
| 157 * Parameters for Pre-Boot Virtual Memory (PBVM). 158 * The kernel, its modules and metadata are loaded in the PBVM by the loader. 159 * The PBVM consists of pages for which the mapping is maintained in a page 160 * table. The page table is at least 1 EFI page large (i.e. 4KB), but can be 161 * larger to accommodate more PBVM. The maximum page table size is 1MB. With 162 * 8 bytes per page table entry, this means that the PBVM has at least 512 163 * pages and at most 128K pages. 164 * The GNU toolchain (in particular GNU ld) does not support an alignment 165 * larger than 64K. This means that we cannot guarantee page alignment for 166 * a page size that's larger than 64K. We do want to have text and data in 167 * different pages, which means that the maximum usable page size is 64KB. 168 * Consequently: 169 * The maximum total PBVM size is 8GB -- enough for a DVD image. A page table 170 * of a single EFI page (4KB) allows for 32MB of PBVM. 171 * 172 * The kernel is given the PA and size of the page table that provides the 173 * mapping of the PBVM. The page table itself is assumed to be mapped at a 174 * known virtual address and using a single translation wired into the CPU. 175 * As such, the page table is assumed to be a power of 2 and naturally aligned. 176 * The kernel also assumes that a good portion of the kernel text is mapped 177 * and wired into the CPU, but does not assume that the mapping covers the 178 * whole of PBVM. 179 */ 180#define IA64_PBVM_RR 4 181#define IA64_PBVM_BASE \ 182 (IA64_RR_BASE(IA64_PBVM_RR) + IA64_REGION_TOP_HALF) 183 184#define IA64_PBVM_PGTBL_MAXSZ 1048576 185#define IA64_PBVM_PGTBL \ 186 (IA64_RR_BASE(IA64_PBVM_RR + 1) - IA64_PBVM_PGTBL_MAXSZ) 187 188#define IA64_PBVM_PAGE_SHIFT 16 /* 64KB */ 189#define IA64_PBVM_PAGE_SIZE (1 << IA64_PBVM_PAGE_SHIFT) 190#define IA64_PBVM_PAGE_MASK (IA64_PBVM_PAGE_SIZE - 1) 191 192/* |
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| 147 * Mach derived constants 148 */ 149 150/* user/kernel map constants */ 151#define VM_MIN_ADDRESS 0 152#define VM_MAX_ADDRESS IA64_RR_BASE(5) 153#define VM_GATEWAY_SIZE PAGE_SIZE 154#define VM_MAXUSER_ADDRESS (VM_MAX_ADDRESS + VM_GATEWAY_SIZE) --- 26 unchanged lines hidden --- | 193 * Mach derived constants 194 */ 195 196/* user/kernel map constants */ 197#define VM_MIN_ADDRESS 0 198#define VM_MAX_ADDRESS IA64_RR_BASE(5) 199#define VM_GATEWAY_SIZE PAGE_SIZE 200#define VM_MAXUSER_ADDRESS (VM_MAX_ADDRESS + VM_GATEWAY_SIZE) --- 26 unchanged lines hidden --- |