1/*-
2 * Copyright (c) 1988 University of Utah.
3 * Copyright (c) 1992, 1993
4 * The Regents of the University of California. All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * the Systems Programming Group of the University of Utah Computer
8 * Science Department and Ralph Campbell.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 4. Neither the name of the University nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 *
34 * from: Utah $Hdr: vmparam.h 1.16 91/01/18$
35 *
36 * @(#)vmparam.h 8.2 (Berkeley) 4/22/94
37 *
38 * $FreeBSD: head/sys/ia64/include/vmparam.h 219691 2011-03-16 03:53:18Z marcel $
39 */
40
41#ifndef _MACHINE_VMPARAM_H_
42#define _MACHINE_VMPARAM_H_
43
44/*
45 * USRSTACK is the top (end) of the user stack. Immediately above the user
46 * stack resides the syscall gateway page.
47 */
48#define USRSTACK VM_MAX_ADDRESS
49
50/*
51 * Virtual memory related constants, all in bytes
52 */
53#ifndef MAXTSIZ
54#define MAXTSIZ (1<<30) /* max text size (1G) */
55#endif
56#ifndef DFLDSIZ
57#define DFLDSIZ (1<<27) /* initial data size (128M) */
58#endif
59#ifndef MAXDSIZ
60#define MAXDSIZ (1<<30) /* max data size (1G) */
61#endif
62#ifndef DFLSSIZ
63#define DFLSSIZ (1<<21) /* initial stack size (2M) */
64#endif
65#ifndef MAXSSIZ
66#define MAXSSIZ (1<<28) /* max stack size (256M) */
67#endif
68#ifndef SGROWSIZ
69#define SGROWSIZ (128UL*1024) /* amount to grow stack */
70#endif
71
72/*
73 * We need region 7 virtual addresses for pagetables.
74 */
75#define UMA_MD_SMALL_ALLOC
76
77/*
78 * The physical address space is sparsely populated.
79 */
80#define VM_PHYSSEG_SPARSE
81
82/*
83 * The number of PHYSSEG entries is equal to the number of phys_avail
84 * entries.
85 */
86#define VM_PHYSSEG_MAX 49
87
88/*
89 * Create three free page pools: VM_FREEPOOL_DEFAULT is the default pool
90 * from which physical pages are allocated and VM_FREEPOOL_DIRECT is
91 * the pool from which physical pages for small UMA objects are
92 * allocated.
93 */
94#define VM_NFREEPOOL 3
95#define VM_FREEPOOL_CACHE 2
96#define VM_FREEPOOL_DEFAULT 0
97#define VM_FREEPOOL_DIRECT 1
98
99/*
100 * Create one free page list.
101 */
102#define VM_NFREELIST 1
103#define VM_FREELIST_DEFAULT 0
104
105/*
106 * An allocation size of 256MB is supported in order to optimize the
107 * use of the identity mappings in region 7 by UMA.
108 */
109#define VM_NFREEORDER 16
110
111/*
112 * Only one memory domain.
113 */
114#ifndef VM_NDOMAIN
115#define VM_NDOMAIN 1
116#endif
117
118/*
119 * Disable superpage reservations.
120 */
121#ifndef VM_NRESERVLEVEL
122#define VM_NRESERVLEVEL 0
123#endif
124
125/*
126 * Manipulating region bits of an address.
127 */
128#define IA64_RR_BASE(n) (((uint64_t) (n)) << 61)
129#define IA64_RR_MASK(x) ((x) & ((1L << 61) - 1))
130
131#define IA64_PHYS_TO_RR7(x) ((x) | IA64_RR_BASE(7))
132
133/*
134 * The Itanium architecture defines that all implementations support at
135 * least 51 virtual address bits (i.e. IMPL_VA_MSB=50). The unimplemented
136 * bits are sign-extended from VA{IMPL_VA_MSB}. As such, there's a gap in
137 * the virtual address range, which extends at most from 0x0004000000000000
138 * to 0x1ffbffffffffffff. We define the top half of a region in terms of
139 * this worst-case gap.
140 */
141#define IA64_REGION_TOP_HALF 0x1ffc000000000000
142
143/*
144 * Page size of the identity mappings in region 7.
145 */
146#ifndef LOG2_ID_PAGE_SIZE
147#define LOG2_ID_PAGE_SIZE 28 /* 256M */
148#endif
149
150#define IA64_ID_PAGE_SHIFT (LOG2_ID_PAGE_SIZE)
151#define IA64_ID_PAGE_SIZE (1<<(LOG2_ID_PAGE_SIZE))
152#define IA64_ID_PAGE_MASK (IA64_ID_PAGE_SIZE-1)
153
154#define IA64_BACKINGSTORE IA64_RR_BASE(4)
155
156/*
157 * Parameters for Pre-Boot Virtual Memory (PBVM).
158 * The kernel, its modules and metadata are loaded in the PBVM by the loader.
159 * The PBVM consists of pages for which the mapping is maintained in a page
160 * table. The page table is at least 1 EFI page large (i.e. 4KB), but can be
161 * larger to accommodate more PBVM. The maximum page table size is 1MB. With
162 * 8 bytes per page table entry, this means that the PBVM has at least 512
163 * pages and at most 128K pages.
164 * The GNU toolchain (in particular GNU ld) does not support an alignment
165 * larger than 64K. This means that we cannot guarantee page alignment for
166 * a page size that's larger than 64K. We do want to have text and data in
167 * different pages, which means that the maximum usable page size is 64KB.
168 * Consequently:
169 * The maximum total PBVM size is 8GB -- enough for a DVD image. A page table
170 * of a single EFI page (4KB) allows for 32MB of PBVM.
171 *
172 * The kernel is given the PA and size of the page table that provides the
173 * mapping of the PBVM. The page table itself is assumed to be mapped at a
174 * known virtual address and using a single translation wired into the CPU.
175 * As such, the page table is assumed to be a power of 2 and naturally aligned.
176 * The kernel also assumes that a good portion of the kernel text is mapped
177 * and wired into the CPU, but does not assume that the mapping covers the
178 * whole of PBVM.
179 */
180#define IA64_PBVM_RR 4
181#define IA64_PBVM_BASE \
182 (IA64_RR_BASE(IA64_PBVM_RR) + IA64_REGION_TOP_HALF)
183
184#define IA64_PBVM_PGTBL_MAXSZ 1048576
185#define IA64_PBVM_PGTBL \
186 (IA64_RR_BASE(IA64_PBVM_RR + 1) - IA64_PBVM_PGTBL_MAXSZ)
187
188#define IA64_PBVM_PAGE_SHIFT 16 /* 64KB */
189#define IA64_PBVM_PAGE_SIZE (1 << IA64_PBVM_PAGE_SHIFT)
190#define IA64_PBVM_PAGE_MASK (IA64_PBVM_PAGE_SIZE - 1)
191
192/*
193 * Mach derived constants
194 */
195
196/* user/kernel map constants */
197#define VM_MIN_ADDRESS 0
198#define VM_MAX_ADDRESS IA64_RR_BASE(5)
199#define VM_GATEWAY_SIZE PAGE_SIZE
200#define VM_MAXUSER_ADDRESS (VM_MAX_ADDRESS + VM_GATEWAY_SIZE)
201#define VM_MIN_KERNEL_ADDRESS VM_MAXUSER_ADDRESS
202#define VM_MAX_KERNEL_ADDRESS (IA64_RR_BASE(6) - 1)
203
204#define KERNBASE VM_MAX_ADDRESS
205
206/* virtual sizes (bytes) for various kernel submaps */
207#ifndef VM_KMEM_SIZE
208#define VM_KMEM_SIZE (12 * 1024 * 1024)
209#endif
210
211/*
212 * How many physical pages per KVA page allocated.
213 * min(max(max(VM_KMEM_SIZE, Physical memory/VM_KMEM_SIZE_SCALE),
214 * VM_KMEM_SIZE_MIN), VM_KMEM_SIZE_MAX)
215 * is the total KVA space allocated for kmem_map.
216 */
217#ifndef VM_KMEM_SIZE_SCALE
218#define VM_KMEM_SIZE_SCALE (4) /* XXX 8192 byte pages */
219#endif
220
221/* initial pagein size of beginning of executable file */
222#ifndef VM_INITIAL_PAGEIN
223#define VM_INITIAL_PAGEIN 16
224#endif
225
226#endif /* !_MACHINE_VMPARAM_H_ */
2 * Copyright (c) 1988 University of Utah.
3 * Copyright (c) 1992, 1993
4 * The Regents of the University of California. All rights reserved.
5 *
6 * This code is derived from software contributed to Berkeley by
7 * the Systems Programming Group of the University of Utah Computer
8 * Science Department and Ralph Campbell.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 4. Neither the name of the University nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 *
34 * from: Utah $Hdr: vmparam.h 1.16 91/01/18$
35 *
36 * @(#)vmparam.h 8.2 (Berkeley) 4/22/94
37 *
38 * $FreeBSD: head/sys/ia64/include/vmparam.h 219691 2011-03-16 03:53:18Z marcel $
39 */
40
41#ifndef _MACHINE_VMPARAM_H_
42#define _MACHINE_VMPARAM_H_
43
44/*
45 * USRSTACK is the top (end) of the user stack. Immediately above the user
46 * stack resides the syscall gateway page.
47 */
48#define USRSTACK VM_MAX_ADDRESS
49
50/*
51 * Virtual memory related constants, all in bytes
52 */
53#ifndef MAXTSIZ
54#define MAXTSIZ (1<<30) /* max text size (1G) */
55#endif
56#ifndef DFLDSIZ
57#define DFLDSIZ (1<<27) /* initial data size (128M) */
58#endif
59#ifndef MAXDSIZ
60#define MAXDSIZ (1<<30) /* max data size (1G) */
61#endif
62#ifndef DFLSSIZ
63#define DFLSSIZ (1<<21) /* initial stack size (2M) */
64#endif
65#ifndef MAXSSIZ
66#define MAXSSIZ (1<<28) /* max stack size (256M) */
67#endif
68#ifndef SGROWSIZ
69#define SGROWSIZ (128UL*1024) /* amount to grow stack */
70#endif
71
72/*
73 * We need region 7 virtual addresses for pagetables.
74 */
75#define UMA_MD_SMALL_ALLOC
76
77/*
78 * The physical address space is sparsely populated.
79 */
80#define VM_PHYSSEG_SPARSE
81
82/*
83 * The number of PHYSSEG entries is equal to the number of phys_avail
84 * entries.
85 */
86#define VM_PHYSSEG_MAX 49
87
88/*
89 * Create three free page pools: VM_FREEPOOL_DEFAULT is the default pool
90 * from which physical pages are allocated and VM_FREEPOOL_DIRECT is
91 * the pool from which physical pages for small UMA objects are
92 * allocated.
93 */
94#define VM_NFREEPOOL 3
95#define VM_FREEPOOL_CACHE 2
96#define VM_FREEPOOL_DEFAULT 0
97#define VM_FREEPOOL_DIRECT 1
98
99/*
100 * Create one free page list.
101 */
102#define VM_NFREELIST 1
103#define VM_FREELIST_DEFAULT 0
104
105/*
106 * An allocation size of 256MB is supported in order to optimize the
107 * use of the identity mappings in region 7 by UMA.
108 */
109#define VM_NFREEORDER 16
110
111/*
112 * Only one memory domain.
113 */
114#ifndef VM_NDOMAIN
115#define VM_NDOMAIN 1
116#endif
117
118/*
119 * Disable superpage reservations.
120 */
121#ifndef VM_NRESERVLEVEL
122#define VM_NRESERVLEVEL 0
123#endif
124
125/*
126 * Manipulating region bits of an address.
127 */
128#define IA64_RR_BASE(n) (((uint64_t) (n)) << 61)
129#define IA64_RR_MASK(x) ((x) & ((1L << 61) - 1))
130
131#define IA64_PHYS_TO_RR7(x) ((x) | IA64_RR_BASE(7))
132
133/*
134 * The Itanium architecture defines that all implementations support at
135 * least 51 virtual address bits (i.e. IMPL_VA_MSB=50). The unimplemented
136 * bits are sign-extended from VA{IMPL_VA_MSB}. As such, there's a gap in
137 * the virtual address range, which extends at most from 0x0004000000000000
138 * to 0x1ffbffffffffffff. We define the top half of a region in terms of
139 * this worst-case gap.
140 */
141#define IA64_REGION_TOP_HALF 0x1ffc000000000000
142
143/*
144 * Page size of the identity mappings in region 7.
145 */
146#ifndef LOG2_ID_PAGE_SIZE
147#define LOG2_ID_PAGE_SIZE 28 /* 256M */
148#endif
149
150#define IA64_ID_PAGE_SHIFT (LOG2_ID_PAGE_SIZE)
151#define IA64_ID_PAGE_SIZE (1<<(LOG2_ID_PAGE_SIZE))
152#define IA64_ID_PAGE_MASK (IA64_ID_PAGE_SIZE-1)
153
154#define IA64_BACKINGSTORE IA64_RR_BASE(4)
155
156/*
157 * Parameters for Pre-Boot Virtual Memory (PBVM).
158 * The kernel, its modules and metadata are loaded in the PBVM by the loader.
159 * The PBVM consists of pages for which the mapping is maintained in a page
160 * table. The page table is at least 1 EFI page large (i.e. 4KB), but can be
161 * larger to accommodate more PBVM. The maximum page table size is 1MB. With
162 * 8 bytes per page table entry, this means that the PBVM has at least 512
163 * pages and at most 128K pages.
164 * The GNU toolchain (in particular GNU ld) does not support an alignment
165 * larger than 64K. This means that we cannot guarantee page alignment for
166 * a page size that's larger than 64K. We do want to have text and data in
167 * different pages, which means that the maximum usable page size is 64KB.
168 * Consequently:
169 * The maximum total PBVM size is 8GB -- enough for a DVD image. A page table
170 * of a single EFI page (4KB) allows for 32MB of PBVM.
171 *
172 * The kernel is given the PA and size of the page table that provides the
173 * mapping of the PBVM. The page table itself is assumed to be mapped at a
174 * known virtual address and using a single translation wired into the CPU.
175 * As such, the page table is assumed to be a power of 2 and naturally aligned.
176 * The kernel also assumes that a good portion of the kernel text is mapped
177 * and wired into the CPU, but does not assume that the mapping covers the
178 * whole of PBVM.
179 */
180#define IA64_PBVM_RR 4
181#define IA64_PBVM_BASE \
182 (IA64_RR_BASE(IA64_PBVM_RR) + IA64_REGION_TOP_HALF)
183
184#define IA64_PBVM_PGTBL_MAXSZ 1048576
185#define IA64_PBVM_PGTBL \
186 (IA64_RR_BASE(IA64_PBVM_RR + 1) - IA64_PBVM_PGTBL_MAXSZ)
187
188#define IA64_PBVM_PAGE_SHIFT 16 /* 64KB */
189#define IA64_PBVM_PAGE_SIZE (1 << IA64_PBVM_PAGE_SHIFT)
190#define IA64_PBVM_PAGE_MASK (IA64_PBVM_PAGE_SIZE - 1)
191
192/*
193 * Mach derived constants
194 */
195
196/* user/kernel map constants */
197#define VM_MIN_ADDRESS 0
198#define VM_MAX_ADDRESS IA64_RR_BASE(5)
199#define VM_GATEWAY_SIZE PAGE_SIZE
200#define VM_MAXUSER_ADDRESS (VM_MAX_ADDRESS + VM_GATEWAY_SIZE)
201#define VM_MIN_KERNEL_ADDRESS VM_MAXUSER_ADDRESS
202#define VM_MAX_KERNEL_ADDRESS (IA64_RR_BASE(6) - 1)
203
204#define KERNBASE VM_MAX_ADDRESS
205
206/* virtual sizes (bytes) for various kernel submaps */
207#ifndef VM_KMEM_SIZE
208#define VM_KMEM_SIZE (12 * 1024 * 1024)
209#endif
210
211/*
212 * How many physical pages per KVA page allocated.
213 * min(max(max(VM_KMEM_SIZE, Physical memory/VM_KMEM_SIZE_SCALE),
214 * VM_KMEM_SIZE_MIN), VM_KMEM_SIZE_MAX)
215 * is the total KVA space allocated for kmem_map.
216 */
217#ifndef VM_KMEM_SIZE_SCALE
218#define VM_KMEM_SIZE_SCALE (4) /* XXX 8192 byte pages */
219#endif
220
221/* initial pagein size of beginning of executable file */
222#ifndef VM_INITIAL_PAGEIN
223#define VM_INITIAL_PAGEIN 16
224#endif
225
226#endif /* !_MACHINE_VMPARAM_H_ */