specialreg.h (184146) | specialreg.h (185341) |
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1/*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 13 unchanged lines hidden (view full) --- 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * from: @(#)specialreg.h 7.1 (Berkeley) 5/9/91 | 1/*- 2 * Copyright (c) 1991 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 13 unchanged lines hidden (view full) --- 22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * from: @(#)specialreg.h 7.1 (Berkeley) 5/9/91 |
30 * $FreeBSD: head/sys/i386/include/specialreg.h 184146 2008-10-22 00:01:53Z jkim $ | 30 * $FreeBSD: head/sys/i386/include/specialreg.h 185341 2008-11-26 19:25:13Z jkim $ |
31 */ 32 33#ifndef _MACHINE_SPECIALREG_H_ 34#define _MACHINE_SPECIALREG_H_ 35 36/* 37 * Bits in 386 special registers: 38 */ --- 151 unchanged lines hidden (view full) --- 190/* 191 * AMD extended function 8000_0008h ecx info 192 */ 193#define AMDID_CMP_CORES 0x000000ff 194 195/* 196 * CPUID manufacturers identifiers 197 */ | 31 */ 32 33#ifndef _MACHINE_SPECIALREG_H_ 34#define _MACHINE_SPECIALREG_H_ 35 36/* 37 * Bits in 386 special registers: 38 */ --- 151 unchanged lines hidden (view full) --- 190/* 191 * AMD extended function 8000_0008h ecx info 192 */ 193#define AMDID_CMP_CORES 0x000000ff 194 195/* 196 * CPUID manufacturers identifiers 197 */ |
198#define INTEL_VENDOR_ID "GenuineIntel" 199#define AMD_VENDOR_ID "AuthenticAMD" | 198#define AMD_VENDOR_ID "AuthenticAMD" 199#define CENTAUR_VENDOR_ID "CentaurHauls" 200#define CYRIX_VENDOR_ID "CyrixInstead" 201#define INTEL_VENDOR_ID "GenuineIntel" 202#define NEXGEN_VENDOR_ID "NexGenDriven" 203#define NSC_VENDOR_ID "Geode by NSC" 204#define RISE_VENDOR_ID "RiseRiseRise" 205#define SIS_VENDOR_ID "SiS SiS SiS " 206#define TRANSMETA_VENDOR_ID "GenuineTMx86" 207#define UMC_VENDOR_ID "UMC UMC UMC " |
200 201/* 202 * Model-specific registers for the i386 family 203 */ 204#define MSR_P5_MC_ADDR 0x000 205#define MSR_P5_MC_TYPE 0x001 206#define MSR_TSC 0x010 207#define MSR_P5_CESR 0x011 --- 336 unchanged lines hidden --- | 208 209/* 210 * Model-specific registers for the i386 family 211 */ 212#define MSR_P5_MC_ADDR 0x000 213#define MSR_P5_MC_TYPE 0x001 214#define MSR_TSC 0x010 215#define MSR_P5_CESR 0x011 --- 336 unchanged lines hidden --- |