| NOTES (137744) | NOTES (137784) |
|---|---|
| 1# 2# NOTES -- Lines that can be cut/pasted into kernel and hints configs. 3# 4# This file contains machine dependent kernel configuration notes. For 5# machine independent notes, look in /sys/conf/NOTES. 6# | 1# 2# NOTES -- Lines that can be cut/pasted into kernel and hints configs. 3# 4# This file contains machine dependent kernel configuration notes. For 5# machine independent notes, look in /sys/conf/NOTES. 6# |
| 7# $FreeBSD: head/sys/i386/conf/NOTES 137744 2004-11-15 19:46:22Z imp $ | 7# $FreeBSD: head/sys/i386/conf/NOTES 137784 2004-11-16 20:42:32Z jhb $ |
| 8# 9 10# 11# This directive is mandatory; it defines the architecture to be 12# configured for; in this case, the 386 family based IBM-PC and 13# compatibles. 14# 15machine i386 --- 8 unchanged lines hidden (view full) --- 24# 25# The apic device enables the use of the I/O APIC for interrupt delivery. 26# The apic device can be used in both UP and SMP kernels, but is required 27# for SMP kernels. Thus, the apic device is not strictly an SMP option, 28# but it is a prerequisite for SMP. 29# 30# Notes: 31# | 8# 9 10# 11# This directive is mandatory; it defines the architecture to be 12# configured for; in this case, the 386 family based IBM-PC and 13# compatibles. 14# 15machine i386 --- 8 unchanged lines hidden (view full) --- 24# 25# The apic device enables the use of the I/O APIC for interrupt delivery. 26# The apic device can be used in both UP and SMP kernels, but is required 27# for SMP kernels. Thus, the apic device is not strictly an SMP option, 28# but it is a prerequisite for SMP. 29# 30# Notes: 31# |
| 32# Be sure to disable 'cpu I386_CPU' for SMP kernels. 33# | |
| 34# By default, mixed mode is used to route IRQ0 from the AT timer via 35# the 8259A master PIC through the ExtINT pin on the first I/O APIC. 36# This can be disabled via the NO_MIXED_MODE option. In that case, 37# IRQ0 will be routed via an intpin on the first I/O APIC. Not all 38# motherboards hook IRQ0 up to the first I/O APIC even though their 39# MP table or MADT may claim to do so. That is why mixed mode is 40# enabled by default. 41# --- 18 unchanged lines hidden (view full) --- 60 61##################################################################### 62# CPU OPTIONS 63 64# 65# You must specify at least one CPU (the one you intend to run on); 66# deleting the specification for CPUs you don't need to use may make 67# parts of the system run faster. | 32# By default, mixed mode is used to route IRQ0 from the AT timer via 33# the 8259A master PIC through the ExtINT pin on the first I/O APIC. 34# This can be disabled via the NO_MIXED_MODE option. In that case, 35# IRQ0 will be routed via an intpin on the first I/O APIC. Not all 36# motherboards hook IRQ0 up to the first I/O APIC even though their 37# MP table or MADT may claim to do so. That is why mixed mode is 38# enabled by default. 39# --- 18 unchanged lines hidden (view full) --- 58 59##################################################################### 60# CPU OPTIONS 61 62# 63# You must specify at least one CPU (the one you intend to run on); 64# deleting the specification for CPUs you don't need to use may make 65# parts of the system run faster. |
| 68# I386_CPU is mutually exclusive with the other CPU types. 69# I386_CPU is deprecated and will be removed in 6.0-RELEASE. | |
| 70# | 66# |
| 71#cpu I386_CPU | |
| 72cpu I486_CPU 73cpu I586_CPU # aka Pentium(tm) 74cpu I686_CPU # aka Pentium Pro(tm) 75 76# 77# Options for CPU features. 78# 79# CPU_ATHLON_SSE_HACK tries to enable SSE instructions when the BIOS has --- 1007 unchanged lines hidden --- | 67cpu I486_CPU 68cpu I586_CPU # aka Pentium(tm) 69cpu I686_CPU # aka Pentium Pro(tm) 70 71# 72# Options for CPU features. 73# 74# CPU_ATHLON_SSE_HACK tries to enable SSE instructions when the BIOS has --- 1007 unchanged lines hidden --- |