| if_wbreg.h (41502) | if_wbreg.h (42718) |
|---|---|
| 1/* 2 * Copyright (c) 1997, 1998 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * | 1/* 2 * Copyright (c) 1997, 1998 3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * |
| 32 * $Id: if_wbreg.h,v 1.12 1998/11/29 06:40:50 wpaul Exp $ | 32 * $Id: if_wbreg.h,v 1.12 1998/11/29 06:40:50 wpaul Exp wpaul $ |
| 33 */ 34 35/* 36 * Winbond register definitions. 37 */ 38 39#define WB_BUSCTL 0x00 /* bus control */ 40#define WB_TXSTART 0x04 /* tx start demand */ --- 114 unchanged lines hidden (view full) --- 155#define WB_NETCFG_TX_EARLY_ON 0x40000000 156#define WB_NETCFG_RX_EARLY_ON 0x80000000 157 158/* 159 * The tx threshold can be adjusted in increments of 32 bytes. 160 */ 161#define WB_TXTHRESH(x) ((x >> 5) << 14) 162#define WB_TXTHRESH_CHUNK 32 | 33 */ 34 35/* 36 * Winbond register definitions. 37 */ 38 39#define WB_BUSCTL 0x00 /* bus control */ 40#define WB_TXSTART 0x04 /* tx start demand */ --- 114 unchanged lines hidden (view full) --- 155#define WB_NETCFG_TX_EARLY_ON 0x40000000 156#define WB_NETCFG_RX_EARLY_ON 0x80000000 157 158/* 159 * The tx threshold can be adjusted in increments of 32 bytes. 160 */ 161#define WB_TXTHRESH(x) ((x >> 5) << 14) 162#define WB_TXTHRESH_CHUNK 32 |
| 163#define WB_TXTHRESH_INIT 72 | 163#define WB_TXTHRESH_INIT 0 /*72*/ |
| 164 165/* 166 * Interrupt mask bits. 167 */ 168#define WB_IMR_TX_OK 0x00000001 169#define WB_IMR_TX_IDLE 0x00000002 170#define WB_IMR_TX_NOBUF 0x00000004 171#define WB_IMR_RX_EARLY 0x00000008 --- 412 unchanged lines hidden --- | 164 165/* 166 * Interrupt mask bits. 167 */ 168#define WB_IMR_TX_OK 0x00000001 169#define WB_IMR_TX_IDLE 0x00000002 170#define WB_IMR_TX_NOBUF 0x00000004 171#define WB_IMR_RX_EARLY 0x00000008 --- 412 unchanged lines hidden --- |