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if_wb.c (50477) if_wb.c (50675)
1/*
2 * Copyright (c) 1997, 1998
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 15 unchanged lines hidden (view full) ---

24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
1/*
2 * Copyright (c) 1997, 1998
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

--- 15 unchanged lines hidden (view full) ---

24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD: head/sys/pci/if_wb.c 50477 1999-08-28 01:08:13Z peter $
32 * $FreeBSD: head/sys/pci/if_wb.c 50675 1999-08-30 23:08:32Z wpaul $
33 */
34
35/*
36 * Winbond fast ethernet PCI NIC driver
37 *
38 * Supports various cheap network adapters based on the Winbond W89C840F
39 * fast ethernet controller chip. This includes adapters manufactured by
40 * Winbond itself and some made by Linksys.

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88
89#include <sys/param.h>
90#include <sys/systm.h>
91#include <sys/sockio.h>
92#include <sys/mbuf.h>
93#include <sys/malloc.h>
94#include <sys/kernel.h>
95#include <sys/socket.h>
33 */
34
35/*
36 * Winbond fast ethernet PCI NIC driver
37 *
38 * Supports various cheap network adapters based on the Winbond W89C840F
39 * fast ethernet controller chip. This includes adapters manufactured by
40 * Winbond itself and some made by Linksys.

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88
89#include <sys/param.h>
90#include <sys/systm.h>
91#include <sys/sockio.h>
92#include <sys/mbuf.h>
93#include <sys/malloc.h>
94#include <sys/kernel.h>
95#include <sys/socket.h>
96#include <sys/queue.h>
96
97#include <net/if.h>
98#include <net/if_arp.h>
99#include <net/ethernet.h>
100#include <net/if_dl.h>
101#include <net/if_media.h>
102
103#if NBPF > 0

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116#include <machine/bus.h>
117#include <machine/resource.h>
118#include <sys/bus.h>
119#include <sys/rman.h>
120
121#include <pci/pcireg.h>
122#include <pci/pcivar.h>
123
97
98#include <net/if.h>
99#include <net/if_arp.h>
100#include <net/ethernet.h>
101#include <net/if_dl.h>
102#include <net/if_media.h>
103
104#if NBPF > 0

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117#include <machine/bus.h>
118#include <machine/resource.h>
119#include <sys/bus.h>
120#include <sys/rman.h>
121
122#include <pci/pcireg.h>
123#include <pci/pcivar.h>
124
124#define WB_USEIOSPACE
125#include <dev/mii/mii.h>
126#include <dev/mii/miivar.h>
125
127
126/* #define WB_BACKGROUND_AUTONEG */
128#include "miibus_if.h"
127
129
130#define WB_USEIOSPACE
131
128#include <pci/if_wbreg.h>
129
130#ifndef lint
131static const char rcsid[] =
132#include <pci/if_wbreg.h>
133
134#ifndef lint
135static const char rcsid[] =
132 "$FreeBSD: head/sys/pci/if_wb.c 50477 1999-08-28 01:08:13Z peter $";
136 "$FreeBSD: head/sys/pci/if_wb.c 50675 1999-08-30 23:08:32Z wpaul $";
133#endif
134
135/*
136 * Various supported device vendors/types and their names.
137 */
138static struct wb_type wb_devs[] = {
139 { WB_VENDORID, WB_DEVICEID_840F,
140 "Winbond W89C840F 10/100BaseTX" },
141 { CP_VENDORID, CP_DEVICEID_RL100,
142 "Compex RL100-ATX 10/100baseTX" },
143 { 0, 0, NULL }
144};
145
137#endif
138
139/*
140 * Various supported device vendors/types and their names.
141 */
142static struct wb_type wb_devs[] = {
143 { WB_VENDORID, WB_DEVICEID_840F,
144 "Winbond W89C840F 10/100BaseTX" },
145 { CP_VENDORID, CP_DEVICEID_RL100,
146 "Compex RL100-ATX 10/100baseTX" },
147 { 0, 0, NULL }
148};
149
146/*
147 * Various supported PHY vendors/types and their names. Note that
148 * this driver will work with pretty much any MII-compliant PHY,
149 * so failure to positively identify the chip is not a fatal error.
150 */
151
152static struct wb_type wb_phys[] = {
153 { TI_PHY_VENDORID, TI_PHY_10BT, "<TI ThunderLAN 10BT (internal)>" },
154 { TI_PHY_VENDORID, TI_PHY_100VGPMI, "<TI TNETE211 100VG Any-LAN>" },
155 { NS_PHY_VENDORID, NS_PHY_83840A, "<National Semiconductor DP83840A>"},
156 { LEVEL1_PHY_VENDORID, LEVEL1_PHY_LXT970, "<Level 1 LXT970>" },
157 { INTEL_PHY_VENDORID, INTEL_PHY_82555, "<Intel 82555>" },
158 { SEEQ_PHY_VENDORID, SEEQ_PHY_80220, "<SEEQ 80220>" },
159 { 0, 0, "<MII-compliant physical interface>" }
160};
161
162static int wb_probe __P((device_t));
163static int wb_attach __P((device_t));
164static int wb_detach __P((device_t));
165
150static int wb_probe __P((device_t));
151static int wb_attach __P((device_t));
152static int wb_detach __P((device_t));
153
154static void wb_bfree __P((caddr_t, u_int));
166static int wb_newbuf __P((struct wb_softc *,
167 struct wb_chain_onefrag *,
168 struct mbuf *));
169static int wb_encap __P((struct wb_softc *, struct wb_chain *,
155static int wb_newbuf __P((struct wb_softc *,
156 struct wb_chain_onefrag *,
157 struct mbuf *));
158static int wb_encap __P((struct wb_softc *, struct wb_chain *,
170 struct mbuf *));
159 struct mbuf *));
171
172static void wb_rxeof __P((struct wb_softc *));
173static void wb_rxeoc __P((struct wb_softc *));
174static void wb_txeof __P((struct wb_softc *));
175static void wb_txeoc __P((struct wb_softc *));
176static void wb_intr __P((void *));
160
161static void wb_rxeof __P((struct wb_softc *));
162static void wb_rxeoc __P((struct wb_softc *));
163static void wb_txeof __P((struct wb_softc *));
164static void wb_txeoc __P((struct wb_softc *));
165static void wb_intr __P((void *));
166static void wb_tick __P((void *));
177static void wb_start __P((struct ifnet *));
178static int wb_ioctl __P((struct ifnet *, u_long, caddr_t));
179static void wb_init __P((void *));
180static void wb_stop __P((struct wb_softc *));
181static void wb_watchdog __P((struct ifnet *));
182static void wb_shutdown __P((device_t));
183static int wb_ifmedia_upd __P((struct ifnet *));
184static void wb_ifmedia_sts __P((struct ifnet *, struct ifmediareq *));
185
186static void wb_eeprom_putbyte __P((struct wb_softc *, int));
187static void wb_eeprom_getword __P((struct wb_softc *, int, u_int16_t *));
188static void wb_read_eeprom __P((struct wb_softc *, caddr_t, int,
189 int, int));
190static void wb_mii_sync __P((struct wb_softc *));
191static void wb_mii_send __P((struct wb_softc *, u_int32_t, int));
192static int wb_mii_readreg __P((struct wb_softc *, struct wb_mii_frame *));
193static int wb_mii_writereg __P((struct wb_softc *, struct wb_mii_frame *));
167static void wb_start __P((struct ifnet *));
168static int wb_ioctl __P((struct ifnet *, u_long, caddr_t));
169static void wb_init __P((void *));
170static void wb_stop __P((struct wb_softc *));
171static void wb_watchdog __P((struct ifnet *));
172static void wb_shutdown __P((device_t));
173static int wb_ifmedia_upd __P((struct ifnet *));
174static void wb_ifmedia_sts __P((struct ifnet *, struct ifmediareq *));
175
176static void wb_eeprom_putbyte __P((struct wb_softc *, int));
177static void wb_eeprom_getword __P((struct wb_softc *, int, u_int16_t *));
178static void wb_read_eeprom __P((struct wb_softc *, caddr_t, int,
179 int, int));
180static void wb_mii_sync __P((struct wb_softc *));
181static void wb_mii_send __P((struct wb_softc *, u_int32_t, int));
182static int wb_mii_readreg __P((struct wb_softc *, struct wb_mii_frame *));
183static int wb_mii_writereg __P((struct wb_softc *, struct wb_mii_frame *));
194static u_int16_t wb_phy_readreg __P((struct wb_softc *, int));
195static void wb_phy_writereg __P((struct wb_softc *, int, int));
196
184
197static void wb_autoneg_xmit __P((struct wb_softc *));
198static void wb_autoneg_mii __P((struct wb_softc *, int, int));
199static void wb_setmode_mii __P((struct wb_softc *, int));
200static void wb_getmode_mii __P((struct wb_softc *));
201static void wb_setcfg __P((struct wb_softc *, int));
185static void wb_setcfg __P((struct wb_softc *, u_int32_t));
202static u_int8_t wb_calchash __P((caddr_t));
203static void wb_setmulti __P((struct wb_softc *));
204static void wb_reset __P((struct wb_softc *));
186static u_int8_t wb_calchash __P((caddr_t));
187static void wb_setmulti __P((struct wb_softc *));
188static void wb_reset __P((struct wb_softc *));
189static void wb_fixmedia __P((struct wb_softc *));
205static int wb_list_rx_init __P((struct wb_softc *));
206static int wb_list_tx_init __P((struct wb_softc *));
207
190static int wb_list_rx_init __P((struct wb_softc *));
191static int wb_list_tx_init __P((struct wb_softc *));
192
193static int wb_miibus_readreg __P((device_t, int, int));
194static int wb_miibus_writereg __P((device_t, int, int, int));
195static void wb_miibus_statchg __P((device_t));
196
208#ifdef WB_USEIOSPACE
209#define WB_RES SYS_RES_IOPORT
210#define WB_RID WB_PCI_LOIO
211#else
212#define WB_RES SYS_RES_MEMORY
213#define WB_RID WB_PCI_LOMEM
214#endif
215
216static device_method_t wb_methods[] = {
217 /* Device interface */
218 DEVMETHOD(device_probe, wb_probe),
219 DEVMETHOD(device_attach, wb_attach),
220 DEVMETHOD(device_detach, wb_detach),
221 DEVMETHOD(device_shutdown, wb_shutdown),
197#ifdef WB_USEIOSPACE
198#define WB_RES SYS_RES_IOPORT
199#define WB_RID WB_PCI_LOIO
200#else
201#define WB_RES SYS_RES_MEMORY
202#define WB_RID WB_PCI_LOMEM
203#endif
204
205static device_method_t wb_methods[] = {
206 /* Device interface */
207 DEVMETHOD(device_probe, wb_probe),
208 DEVMETHOD(device_attach, wb_attach),
209 DEVMETHOD(device_detach, wb_detach),
210 DEVMETHOD(device_shutdown, wb_shutdown),
211
212 /* bus interface, for miibus */
213 DEVMETHOD(bus_print_child, bus_generic_print_child),
214 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
215
216 /* MII interface */
217 DEVMETHOD(miibus_readreg, wb_miibus_readreg),
218 DEVMETHOD(miibus_writereg, wb_miibus_writereg),
219 DEVMETHOD(miibus_statchg, wb_miibus_statchg),
222 { 0, 0 }
223};
224
225static driver_t wb_driver = {
226 "wb",
227 wb_methods,
228 sizeof(struct wb_softc)
229};
230
231static devclass_t wb_devclass;
232
233DRIVER_MODULE(wb, pci, wb_driver, wb_devclass, 0, 0);
220 { 0, 0 }
221};
222
223static driver_t wb_driver = {
224 "wb",
225 wb_methods,
226 sizeof(struct wb_softc)
227};
228
229static devclass_t wb_devclass;
230
231DRIVER_MODULE(wb, pci, wb_driver, wb_devclass, 0, 0);
232DRIVER_MODULE(miibus, wb, miibus_driver, miibus_devclass, 0, 0);
234
235#define WB_SETBIT(sc, reg, x) \
236 CSR_WRITE_4(sc, reg, \
237 CSR_READ_4(sc, reg) | x)
238
239#define WB_CLRBIT(sc, reg, x) \
240 CSR_WRITE_4(sc, reg, \
241 CSR_READ_4(sc, reg) & ~x)

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529 */
530 SIO_CLR(WB_SIO_MII_DIR);
531
532 splx(s);
533
534 return(0);
535}
536
233
234#define WB_SETBIT(sc, reg, x) \
235 CSR_WRITE_4(sc, reg, \
236 CSR_READ_4(sc, reg) | x)
237
238#define WB_CLRBIT(sc, reg, x) \
239 CSR_WRITE_4(sc, reg, \
240 CSR_READ_4(sc, reg) & ~x)

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528 */
529 SIO_CLR(WB_SIO_MII_DIR);
530
531 splx(s);
532
533 return(0);
534}
535
537static u_int16_t wb_phy_readreg(sc, reg)
538 struct wb_softc *sc;
539 int reg;
536static int wb_miibus_readreg(dev, phy, reg)
537 device_t dev;
538 int phy, reg;
540{
539{
540 struct wb_softc *sc;
541 struct wb_mii_frame frame;
542
541 struct wb_mii_frame frame;
542
543 sc = device_get_softc(dev);
544
543 bzero((char *)&frame, sizeof(frame));
544
545 bzero((char *)&frame, sizeof(frame));
546
545 frame.mii_phyaddr = sc->wb_phy_addr;
547 frame.mii_phyaddr = phy;
546 frame.mii_regaddr = reg;
547 wb_mii_readreg(sc, &frame);
548
549 return(frame.mii_data);
550}
551
548 frame.mii_regaddr = reg;
549 wb_mii_readreg(sc, &frame);
550
551 return(frame.mii_data);
552}
553
552static void wb_phy_writereg(sc, reg, data)
553 struct wb_softc *sc;
554 int reg;
555 int data;
554static int wb_miibus_writereg(dev, phy, reg, data)
555 device_t dev;
556 int phy, reg, data;
556{
557{
558 struct wb_softc *sc;
557 struct wb_mii_frame frame;
558
559 struct wb_mii_frame frame;
560
561 sc = device_get_softc(dev);
562
559 bzero((char *)&frame, sizeof(frame));
560
563 bzero((char *)&frame, sizeof(frame));
564
561 frame.mii_phyaddr = sc->wb_phy_addr;
565 frame.mii_phyaddr = phy;
562 frame.mii_regaddr = reg;
563 frame.mii_data = data;
564
565 wb_mii_writereg(sc, &frame);
566
566 frame.mii_regaddr = reg;
567 frame.mii_data = data;
568
569 wb_mii_writereg(sc, &frame);
570
571 return(0);
572}
573
574static void wb_miibus_statchg(dev)
575 device_t dev;
576{
577 struct wb_softc *sc;
578 struct mii_data *mii;
579
580 sc = device_get_softc(dev);
581 mii = device_get_softc(sc->wb_miibus);
582 wb_setcfg(sc, mii->mii_media_active);
583
567 return;
568}
569
570static u_int8_t wb_calchash(addr)
571 caddr_t addr;
572{
573 u_int32_t crc, carry;
574 int i, j;

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648 CSR_WRITE_4(sc, WB_MAR0, hashes[0]);
649 CSR_WRITE_4(sc, WB_MAR1, hashes[1]);
650 CSR_WRITE_4(sc, WB_NETCFG, rxfilt);
651
652 return;
653}
654
655/*
584 return;
585}
586
587static u_int8_t wb_calchash(addr)
588 caddr_t addr;
589{
590 u_int32_t crc, carry;
591 int i, j;

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665 CSR_WRITE_4(sc, WB_MAR0, hashes[0]);
666 CSR_WRITE_4(sc, WB_MAR1, hashes[1]);
667 CSR_WRITE_4(sc, WB_NETCFG, rxfilt);
668
669 return;
670}
671
672/*
656 * Initiate an autonegotiation session.
657 */
658static void wb_autoneg_xmit(sc)
659 struct wb_softc *sc;
660{
661 u_int16_t phy_sts;
662
663 wb_phy_writereg(sc, PHY_BMCR, PHY_BMCR_RESET);
664 DELAY(500);
665 while(wb_phy_readreg(sc, PHY_BMCR)
666 & PHY_BMCR_RESET);
667
668 phy_sts = wb_phy_readreg(sc, PHY_BMCR);
669 phy_sts |= PHY_BMCR_AUTONEGENBL|PHY_BMCR_AUTONEGRSTR;
670 wb_phy_writereg(sc, PHY_BMCR, phy_sts);
671
672 return;
673}
674
675/*
676 * Invoke autonegotiation on a PHY.
677 */
678static void wb_autoneg_mii(sc, flag, verbose)
679 struct wb_softc *sc;
680 int flag;
681 int verbose;
682{
683 u_int16_t phy_sts = 0, media, advert, ability;
684 struct ifnet *ifp;
685 struct ifmedia *ifm;
686
687 ifm = &sc->ifmedia;
688 ifp = &sc->arpcom.ac_if;
689
690 ifm->ifm_media = IFM_ETHER | IFM_AUTO;
691
692 /*
693 * The 100baseT4 PHY on the 3c905-T4 has the 'autoneg supported'
694 * bit cleared in the status register, but has the 'autoneg enabled'
695 * bit set in the control register. This is a contradiction, and
696 * I'm not sure how to handle it. If you want to force an attempt
697 * to autoneg for 100baseT4 PHYs, #define FORCE_AUTONEG_TFOUR
698 * and see what happens.
699 */
700#ifndef FORCE_AUTONEG_TFOUR
701 /*
702 * First, see if autoneg is supported. If not, there's
703 * no point in continuing.
704 */
705 phy_sts = wb_phy_readreg(sc, PHY_BMSR);
706 if (!(phy_sts & PHY_BMSR_CANAUTONEG)) {
707 if (verbose)
708 printf("wb%d: autonegotiation not supported\n",
709 sc->wb_unit);
710 ifm->ifm_media = IFM_ETHER|IFM_10_T|IFM_HDX;
711 return;
712 }
713#endif
714
715 switch (flag) {
716 case WB_FLAG_FORCEDELAY:
717 /*
718 * XXX Never use this option anywhere but in the probe
719 * routine: making the kernel stop dead in its tracks
720 * for three whole seconds after we've gone multi-user
721 * is really bad manners.
722 */
723 wb_autoneg_xmit(sc);
724 DELAY(5000000);
725 break;
726 case WB_FLAG_SCHEDDELAY:
727 /*
728 * Wait for the transmitter to go idle before starting
729 * an autoneg session, otherwise wb_start() may clobber
730 * our timeout, and we don't want to allow transmission
731 * during an autoneg session since that can screw it up.
732 */
733 if (sc->wb_cdata.wb_tx_head != NULL) {
734 sc->wb_want_auto = 1;
735 return;
736 }
737 wb_autoneg_xmit(sc);
738 ifp->if_timer = 5;
739 sc->wb_autoneg = 1;
740 sc->wb_want_auto = 0;
741 return;
742 break;
743 case WB_FLAG_DELAYTIMEO:
744 ifp->if_timer = 0;
745 sc->wb_autoneg = 0;
746 break;
747 default:
748 printf("wb%d: invalid autoneg flag: %d\n", sc->wb_unit, flag);
749 return;
750 }
751
752 if (wb_phy_readreg(sc, PHY_BMSR) & PHY_BMSR_AUTONEGCOMP) {
753 if (verbose)
754 printf("wb%d: autoneg complete, ", sc->wb_unit);
755 phy_sts = wb_phy_readreg(sc, PHY_BMSR);
756 } else {
757 if (verbose)
758 printf("wb%d: autoneg not complete, ", sc->wb_unit);
759 }
760
761 media = wb_phy_readreg(sc, PHY_BMCR);
762
763 /* Link is good. Report modes and set duplex mode. */
764 if (wb_phy_readreg(sc, PHY_BMSR) & PHY_BMSR_LINKSTAT) {
765 if (verbose)
766 printf("link status good ");
767 advert = wb_phy_readreg(sc, PHY_ANAR);
768 ability = wb_phy_readreg(sc, PHY_LPAR);
769
770 if (advert & PHY_ANAR_100BT4 && ability & PHY_ANAR_100BT4) {
771 ifm->ifm_media = IFM_ETHER|IFM_100_T4;
772 media |= PHY_BMCR_SPEEDSEL;
773 media &= ~PHY_BMCR_DUPLEX;
774 printf("(100baseT4)\n");
775 } else if (advert & PHY_ANAR_100BTXFULL &&
776 ability & PHY_ANAR_100BTXFULL) {
777 ifm->ifm_media = IFM_ETHER|IFM_100_TX|IFM_FDX;
778 media |= PHY_BMCR_SPEEDSEL;
779 media |= PHY_BMCR_DUPLEX;
780 printf("(full-duplex, 100Mbps)\n");
781 } else if (advert & PHY_ANAR_100BTXHALF &&
782 ability & PHY_ANAR_100BTXHALF) {
783 ifm->ifm_media = IFM_ETHER|IFM_100_TX|IFM_HDX;
784 media |= PHY_BMCR_SPEEDSEL;
785 media &= ~PHY_BMCR_DUPLEX;
786 printf("(half-duplex, 100Mbps)\n");
787 } else if (advert & PHY_ANAR_10BTFULL &&
788 ability & PHY_ANAR_10BTFULL) {
789 ifm->ifm_media = IFM_ETHER|IFM_10_T|IFM_FDX;
790 media &= ~PHY_BMCR_SPEEDSEL;
791 media |= PHY_BMCR_DUPLEX;
792 printf("(full-duplex, 10Mbps)\n");
793 } else /* if (advert & PHY_ANAR_10BTHALF &&
794 ability & PHY_ANAR_10BTHALF) */ {
795 ifm->ifm_media = IFM_ETHER|IFM_10_T|IFM_HDX;
796 media &= ~PHY_BMCR_SPEEDSEL;
797 media &= ~PHY_BMCR_DUPLEX;
798 printf("(half-duplex, 10Mbps)\n");
799 }
800
801 media &= ~PHY_BMCR_AUTONEGENBL;
802
803 /* Set ASIC's duplex mode to match the PHY. */
804 wb_setcfg(sc, media);
805 wb_phy_writereg(sc, PHY_BMCR, media);
806 } else {
807 if (verbose)
808 printf("no carrier\n");
809 }
810
811 wb_init(sc);
812
813 if (sc->wb_tx_pend) {
814 sc->wb_autoneg = 0;
815 sc->wb_tx_pend = 0;
816 wb_start(ifp);
817 }
818
819 return;
820}
821
822static void wb_getmode_mii(sc)
823 struct wb_softc *sc;
824{
825 u_int16_t bmsr;
826 struct ifnet *ifp;
827
828 ifp = &sc->arpcom.ac_if;
829
830 bmsr = wb_phy_readreg(sc, PHY_BMSR);
831 if (bootverbose)
832 printf("wb%d: PHY status word: %x\n", sc->wb_unit, bmsr);
833
834 /* fallback */
835 sc->ifmedia.ifm_media = IFM_ETHER|IFM_10_T|IFM_HDX;
836
837 if (bmsr & PHY_BMSR_10BTHALF) {
838 if (bootverbose)
839 printf("wb%d: 10Mbps half-duplex mode supported\n",
840 sc->wb_unit);
841 ifmedia_add(&sc->ifmedia,
842 IFM_ETHER|IFM_10_T|IFM_HDX, 0, NULL);
843 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_10_T, 0, NULL);
844 }
845
846 if (bmsr & PHY_BMSR_10BTFULL) {
847 if (bootverbose)
848 printf("wb%d: 10Mbps full-duplex mode supported\n",
849 sc->wb_unit);
850 ifmedia_add(&sc->ifmedia,
851 IFM_ETHER|IFM_10_T|IFM_FDX, 0, NULL);
852 sc->ifmedia.ifm_media = IFM_ETHER|IFM_10_T|IFM_FDX;
853 }
854
855 if (bmsr & PHY_BMSR_100BTXHALF) {
856 if (bootverbose)
857 printf("wb%d: 100Mbps half-duplex mode supported\n",
858 sc->wb_unit);
859 ifp->if_baudrate = 100000000;
860 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_100_TX, 0, NULL);
861 ifmedia_add(&sc->ifmedia,
862 IFM_ETHER|IFM_100_TX|IFM_HDX, 0, NULL);
863 sc->ifmedia.ifm_media = IFM_ETHER|IFM_100_TX|IFM_HDX;
864 }
865
866 if (bmsr & PHY_BMSR_100BTXFULL) {
867 if (bootverbose)
868 printf("wb%d: 100Mbps full-duplex mode supported\n",
869 sc->wb_unit);
870 ifp->if_baudrate = 100000000;
871 ifmedia_add(&sc->ifmedia,
872 IFM_ETHER|IFM_100_TX|IFM_FDX, 0, NULL);
873 sc->ifmedia.ifm_media = IFM_ETHER|IFM_100_TX|IFM_FDX;
874 }
875
876 /* Some also support 100BaseT4. */
877 if (bmsr & PHY_BMSR_100BT4) {
878 if (bootverbose)
879 printf("wb%d: 100baseT4 mode supported\n", sc->wb_unit);
880 ifp->if_baudrate = 100000000;
881 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_100_T4, 0, NULL);
882 sc->ifmedia.ifm_media = IFM_ETHER|IFM_100_T4;
883#ifdef FORCE_AUTONEG_TFOUR
884 if (bootverbose)
885 printf("wb%d: forcing on autoneg support for BT4\n",
886 sc->wb_unit);
887 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_AUTO, 0 NULL):
888 sc->ifmedia.ifm_media = IFM_ETHER|IFM_AUTO;
889#endif
890 }
891
892 if (bmsr & PHY_BMSR_CANAUTONEG) {
893 if (bootverbose)
894 printf("wb%d: autoneg supported\n", sc->wb_unit);
895 ifmedia_add(&sc->ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL);
896 sc->ifmedia.ifm_media = IFM_ETHER|IFM_AUTO;
897 }
898
899 return;
900}
901
902/*
903 * Set speed and duplex mode.
904 */
905static void wb_setmode_mii(sc, media)
906 struct wb_softc *sc;
907 int media;
908{
909 u_int16_t bmcr;
910 struct ifnet *ifp;
911
912 ifp = &sc->arpcom.ac_if;
913
914 /*
915 * If an autoneg session is in progress, stop it.
916 */
917 if (sc->wb_autoneg) {
918 printf("wb%d: canceling autoneg session\n", sc->wb_unit);
919 ifp->if_timer = sc->wb_autoneg = sc->wb_want_auto = 0;
920 bmcr = wb_phy_readreg(sc, PHY_BMCR);
921 bmcr &= ~PHY_BMCR_AUTONEGENBL;
922 wb_phy_writereg(sc, PHY_BMCR, bmcr);
923 }
924
925 printf("wb%d: selecting MII, ", sc->wb_unit);
926
927 bmcr = wb_phy_readreg(sc, PHY_BMCR);
928
929 bmcr &= ~(PHY_BMCR_AUTONEGENBL|PHY_BMCR_SPEEDSEL|
930 PHY_BMCR_DUPLEX|PHY_BMCR_LOOPBK);
931
932 if (IFM_SUBTYPE(media) == IFM_100_T4) {
933 printf("100Mbps/T4, half-duplex\n");
934 bmcr |= PHY_BMCR_SPEEDSEL;
935 bmcr &= ~PHY_BMCR_DUPLEX;
936 }
937
938 if (IFM_SUBTYPE(media) == IFM_100_TX) {
939 printf("100Mbps, ");
940 bmcr |= PHY_BMCR_SPEEDSEL;
941 }
942
943 if (IFM_SUBTYPE(media) == IFM_10_T) {
944 printf("10Mbps, ");
945 bmcr &= ~PHY_BMCR_SPEEDSEL;
946 }
947
948 if ((media & IFM_GMASK) == IFM_FDX) {
949 printf("full duplex\n");
950 bmcr |= PHY_BMCR_DUPLEX;
951 } else {
952 printf("half duplex\n");
953 bmcr &= ~PHY_BMCR_DUPLEX;
954 }
955
956 wb_setcfg(sc, bmcr);
957 wb_phy_writereg(sc, PHY_BMCR, bmcr);
958
959 return;
960}
961
962/*
963 * The Winbond manual states that in order to fiddle with the
964 * 'full-duplex' and '100Mbps' bits in the netconfig register, we
965 * first have to put the transmit and/or receive logic in the idle state.
966 */
673 * The Winbond manual states that in order to fiddle with the
674 * 'full-duplex' and '100Mbps' bits in the netconfig register, we
675 * first have to put the transmit and/or receive logic in the idle state.
676 */
967static void wb_setcfg(sc, bmcr)
677static void wb_setcfg(sc, media)
968 struct wb_softc *sc;
678 struct wb_softc *sc;
969 int bmcr;
679 u_int32_t media;
970{
971 int i, restart = 0;
972
973 if (CSR_READ_4(sc, WB_NETCFG) & (WB_NETCFG_TX_ON|WB_NETCFG_RX_ON)) {
974 restart = 1;
975 WB_CLRBIT(sc, WB_NETCFG, (WB_NETCFG_TX_ON|WB_NETCFG_RX_ON));
976
977 for (i = 0; i < WB_TIMEOUT; i++) {
978 DELAY(10);
979 if ((CSR_READ_4(sc, WB_ISR) & WB_ISR_TX_IDLE) &&
980 (CSR_READ_4(sc, WB_ISR) & WB_ISR_RX_IDLE))
981 break;
982 }
983
984 if (i == WB_TIMEOUT)
985 printf("wb%d: failed to force tx and "
986 "rx to idle state\n", sc->wb_unit);
987 }
988
680{
681 int i, restart = 0;
682
683 if (CSR_READ_4(sc, WB_NETCFG) & (WB_NETCFG_TX_ON|WB_NETCFG_RX_ON)) {
684 restart = 1;
685 WB_CLRBIT(sc, WB_NETCFG, (WB_NETCFG_TX_ON|WB_NETCFG_RX_ON));
686
687 for (i = 0; i < WB_TIMEOUT; i++) {
688 DELAY(10);
689 if ((CSR_READ_4(sc, WB_ISR) & WB_ISR_TX_IDLE) &&
690 (CSR_READ_4(sc, WB_ISR) & WB_ISR_RX_IDLE))
691 break;
692 }
693
694 if (i == WB_TIMEOUT)
695 printf("wb%d: failed to force tx and "
696 "rx to idle state\n", sc->wb_unit);
697 }
698
989 if (bmcr & PHY_BMCR_SPEEDSEL)
990 WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_100MBPS);
991 else
699 if (IFM_SUBTYPE(media) == IFM_10_T)
992 WB_CLRBIT(sc, WB_NETCFG, WB_NETCFG_100MBPS);
700 WB_CLRBIT(sc, WB_NETCFG, WB_NETCFG_100MBPS);
701 else
702 WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_100MBPS);
993
703
994 if (bmcr & PHY_BMCR_DUPLEX)
704 if ((media & IFM_GMASK) == IFM_FDX)
995 WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_FULLDUPLEX);
996 else
997 WB_CLRBIT(sc, WB_NETCFG, WB_NETCFG_FULLDUPLEX);
998
999 if (restart)
1000 WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_TX_ON|WB_NETCFG_RX_ON);
1001
1002 return;
1003}
1004
1005static void wb_reset(sc)
1006 struct wb_softc *sc;
1007{
1008 register int i;
705 WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_FULLDUPLEX);
706 else
707 WB_CLRBIT(sc, WB_NETCFG, WB_NETCFG_FULLDUPLEX);
708
709 if (restart)
710 WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_TX_ON|WB_NETCFG_RX_ON);
711
712 return;
713}
714
715static void wb_reset(sc)
716 struct wb_softc *sc;
717{
718 register int i;
719 struct mii_data *mii;
1009
720
721 CSR_WRITE_4(sc, WB_NETCFG, 0);
722 CSR_WRITE_4(sc, WB_BUSCTL, 0);
723 CSR_WRITE_4(sc, WB_TXADDR, 0);
724 CSR_WRITE_4(sc, WB_RXADDR, 0);
725
1010 WB_SETBIT(sc, WB_BUSCTL, WB_BUSCTL_RESET);
726 WB_SETBIT(sc, WB_BUSCTL, WB_BUSCTL_RESET);
727 WB_SETBIT(sc, WB_BUSCTL, WB_BUSCTL_RESET);
1011
1012 for (i = 0; i < WB_TIMEOUT; i++) {
1013 DELAY(10);
1014 if (!(CSR_READ_4(sc, WB_BUSCTL) & WB_BUSCTL_RESET))
1015 break;
1016 }
1017 if (i == WB_TIMEOUT)
1018 printf("wb%d: reset never completed!\n", sc->wb_unit);
1019
1020 /* Wait a little while for the chip to get its brains in order. */
1021 DELAY(1000);
1022
728
729 for (i = 0; i < WB_TIMEOUT; i++) {
730 DELAY(10);
731 if (!(CSR_READ_4(sc, WB_BUSCTL) & WB_BUSCTL_RESET))
732 break;
733 }
734 if (i == WB_TIMEOUT)
735 printf("wb%d: reset never completed!\n", sc->wb_unit);
736
737 /* Wait a little while for the chip to get its brains in order. */
738 DELAY(1000);
739
1023 /* Reset the damn PHY too. */
1024 if (sc->wb_pinfo != NULL)
1025 wb_phy_writereg(sc, PHY_BMCR, PHY_BMCR_RESET);
740 if (sc->wb_miibus == NULL)
741 return;
1026
742
743 mii = device_get_softc(sc->wb_miibus);
744 if (mii == NULL)
745 return;
746
747 if (mii->mii_instance) {
748 struct mii_softc *miisc;
749 for (miisc = LIST_FIRST(&mii->mii_phys); miisc != NULL;
750 miisc = LIST_NEXT(miisc, mii_list))
751 mii_phy_reset(miisc);
752 }
753
1027 return;
1028}
1029
754 return;
755}
756
757static void wb_fixmedia(sc)
758 struct wb_softc *sc;
759{
760 struct mii_data *mii = NULL;
761 struct ifnet *ifp;
762 u_int32_t media;
763
764 if (sc->wb_miibus == NULL)
765 return;
766
767 mii = device_get_softc(sc->wb_miibus);
768 ifp = &sc->arpcom.ac_if;
769
770 mii_pollstat(mii);
771 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_10_T) {
772 media = mii->mii_media_active & ~IFM_10_T;
773 media |= IFM_100_TX;
774 } else if (IFM_SUBTYPE(mii->mii_media_active) == IFM_100_TX) {
775 media = mii->mii_media_active & ~IFM_100_TX;
776 media |= IFM_10_T;
777 } else
778 return;
779
780 ifmedia_set(&mii->mii_media, media);
781
782 return;
783}
784
1030/*
1031 * Probe for a Winbond chip. Check the PCI vendor and device
1032 * IDs against our list and return a device name if we find a match.
1033 */
1034static int wb_probe(dev)
1035 device_t dev;
1036{
1037 struct wb_type *t;

--- 14 unchanged lines hidden (view full) ---

1052
1053/*
1054 * Attach the interface. Allocate softc structures, do ifmedia
1055 * setup and ethernet/BPF attach.
1056 */
1057static int wb_attach(dev)
1058 device_t dev;
1059{
785/*
786 * Probe for a Winbond chip. Check the PCI vendor and device
787 * IDs against our list and return a device name if we find a match.
788 */
789static int wb_probe(dev)
790 device_t dev;
791{
792 struct wb_type *t;

--- 14 unchanged lines hidden (view full) ---

807
808/*
809 * Attach the interface. Allocate softc structures, do ifmedia
810 * setup and ethernet/BPF attach.
811 */
812static int wb_attach(dev)
813 device_t dev;
814{
1060 int s, i;
815 int s;
1061 u_char eaddr[ETHER_ADDR_LEN];
1062 u_int32_t command;
1063 struct wb_softc *sc;
1064 struct ifnet *ifp;
816 u_char eaddr[ETHER_ADDR_LEN];
817 u_int32_t command;
818 struct wb_softc *sc;
819 struct ifnet *ifp;
1065 int media = IFM_ETHER|IFM_100_TX|IFM_FDX;
1066 unsigned int round;
1067 caddr_t roundptr;
1068 struct wb_type *p;
1069 u_int16_t phy_vid, phy_did, phy_sts;
1070 int unit, error = 0, rid;
1071
1072 s = splimp();
1073
1074 sc = device_get_softc(dev);
1075 unit = device_get_unit(dev);
820 int unit, error = 0, rid;
821
822 s = splimp();
823
824 sc = device_get_softc(dev);
825 unit = device_get_unit(dev);
1076 bzero(sc, sizeof(struct wb_softc));
1077
1078 /*
1079 * Handle power management nonsense.
1080 */
1081
1082 command = pci_read_config(dev, WB_PCI_CAPID, 4) & 0x000000FF;
1083 if (command == 0x01) {
1084

--- 70 unchanged lines hidden (view full) ---

1155 wb_intr, sc, &sc->wb_intrhand);
1156
1157 if (error) {
1158 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->wb_irq);
1159 bus_release_resource(dev, WB_RES, WB_RID, sc->wb_res);
1160 printf("wb%d: couldn't set up irq\n", unit);
1161 goto fail;
1162 }
826
827 /*
828 * Handle power management nonsense.
829 */
830
831 command = pci_read_config(dev, WB_PCI_CAPID, 4) & 0x000000FF;
832 if (command == 0x01) {
833

--- 70 unchanged lines hidden (view full) ---

904 wb_intr, sc, &sc->wb_intrhand);
905
906 if (error) {
907 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->wb_irq);
908 bus_release_resource(dev, WB_RES, WB_RID, sc->wb_res);
909 printf("wb%d: couldn't set up irq\n", unit);
910 goto fail;
911 }
1163
912
913 /* Save the cache line size. */
914 sc->wb_cachesize = pci_read_config(dev, WB_PCI_CACHELEN, 4) & 0xFF;
915
1164 /* Reset the adapter. */
1165 wb_reset(sc);
1166
1167 /*
1168 * Get station address from the EEPROM.
1169 */
1170 wb_read_eeprom(sc, (caddr_t)&eaddr, 0, 3, 0);
1171
1172 /*
1173 * A Winbond chip was detected. Inform the world.
1174 */
1175 printf("wb%d: Ethernet address: %6D\n", unit, eaddr, ":");
1176
1177 sc->wb_unit = unit;
1178 bcopy(eaddr, (char *)&sc->arpcom.ac_enaddr, ETHER_ADDR_LEN);
1179
916 /* Reset the adapter. */
917 wb_reset(sc);
918
919 /*
920 * Get station address from the EEPROM.
921 */
922 wb_read_eeprom(sc, (caddr_t)&eaddr, 0, 3, 0);
923
924 /*
925 * A Winbond chip was detected. Inform the world.
926 */
927 printf("wb%d: Ethernet address: %6D\n", unit, eaddr, ":");
928
929 sc->wb_unit = unit;
930 bcopy(eaddr, (char *)&sc->arpcom.ac_enaddr, ETHER_ADDR_LEN);
931
1180 sc->wb_ldata_ptr = malloc(sizeof(struct wb_list_data) + 8,
1181 M_DEVBUF, M_NOWAIT);
1182 if (sc->wb_ldata_ptr == NULL) {
932 sc->wb_ldata = contigmalloc(sizeof(struct wb_list_data) + 8, M_DEVBUF,
933 M_NOWAIT, 0x100000, 0xffffffff, PAGE_SIZE, 0);
934
935 if (sc->wb_ldata == NULL) {
1183 printf("wb%d: no memory for list buffers!\n", unit);
1184 bus_teardown_intr(dev, sc->wb_irq, sc->wb_intrhand);
1185 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->wb_irq);
1186 bus_release_resource(dev, WB_RES, WB_RID, sc->wb_res);
1187 error = ENXIO;
1188 goto fail;
1189 }
1190
936 printf("wb%d: no memory for list buffers!\n", unit);
937 bus_teardown_intr(dev, sc->wb_irq, sc->wb_intrhand);
938 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->wb_irq);
939 bus_release_resource(dev, WB_RES, WB_RID, sc->wb_res);
940 error = ENXIO;
941 goto fail;
942 }
943
1191 sc->wb_ldata = (struct wb_list_data *)sc->wb_ldata_ptr;
1192 round = (uintptr_t)sc->wb_ldata_ptr & 0xF;
1193 roundptr = sc->wb_ldata_ptr;
1194 for (i = 0; i < 8; i++) {
1195 if (round % 8) {
1196 round++;
1197 roundptr++;
1198 } else
1199 break;
1200 }
1201 sc->wb_ldata = (struct wb_list_data *)roundptr;
1202 bzero(sc->wb_ldata, sizeof(struct wb_list_data));
1203
1204 ifp = &sc->arpcom.ac_if;
1205 ifp->if_softc = sc;
1206 ifp->if_unit = unit;
1207 ifp->if_name = "wb";
1208 ifp->if_mtu = ETHERMTU;
1209 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
1210 ifp->if_ioctl = wb_ioctl;
1211 ifp->if_output = ether_output;
1212 ifp->if_start = wb_start;
1213 ifp->if_watchdog = wb_watchdog;
1214 ifp->if_init = wb_init;
1215 ifp->if_baudrate = 10000000;
1216 ifp->if_snd.ifq_maxlen = WB_TX_LIST_CNT - 1;
1217
944 bzero(sc->wb_ldata, sizeof(struct wb_list_data));
945
946 ifp = &sc->arpcom.ac_if;
947 ifp->if_softc = sc;
948 ifp->if_unit = unit;
949 ifp->if_name = "wb";
950 ifp->if_mtu = ETHERMTU;
951 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
952 ifp->if_ioctl = wb_ioctl;
953 ifp->if_output = ether_output;
954 ifp->if_start = wb_start;
955 ifp->if_watchdog = wb_watchdog;
956 ifp->if_init = wb_init;
957 ifp->if_baudrate = 10000000;
958 ifp->if_snd.ifq_maxlen = WB_TX_LIST_CNT - 1;
959
1218 if (bootverbose)
1219 printf("wb%d: probing for a PHY\n", sc->wb_unit);
1220 for (i = WB_PHYADDR_MIN; i < WB_PHYADDR_MAX + 1; i++) {
1221 if (bootverbose)
1222 printf("wb%d: checking address: %d\n",
1223 sc->wb_unit, i);
1224 sc->wb_phy_addr = i;
1225 wb_phy_writereg(sc, PHY_BMCR, PHY_BMCR_RESET);
1226 DELAY(500);
1227 while(wb_phy_readreg(sc, PHY_BMCR)
1228 & PHY_BMCR_RESET);
1229 if ((phy_sts = wb_phy_readreg(sc, PHY_BMSR)))
1230 break;
1231 }
1232 if (phy_sts) {
1233 phy_vid = wb_phy_readreg(sc, PHY_VENID);
1234 phy_did = wb_phy_readreg(sc, PHY_DEVID);
1235 if (bootverbose)
1236 printf("wb%d: found PHY at address %d, ",
1237 sc->wb_unit, sc->wb_phy_addr);
1238 if (bootverbose)
1239 printf("vendor id: %x device id: %x\n",
1240 phy_vid, phy_did);
1241 p = wb_phys;
1242 while(p->wb_vid) {
1243 if (phy_vid == p->wb_vid &&
1244 (phy_did | 0x000F) == p->wb_did) {
1245 sc->wb_pinfo = p;
1246 break;
1247 }
1248 p++;
1249 }
1250 if (sc->wb_pinfo == NULL)
1251 sc->wb_pinfo = &wb_phys[PHY_UNKNOWN];
1252 if (bootverbose)
1253 printf("wb%d: PHY type: %s\n",
1254 sc->wb_unit, sc->wb_pinfo->wb_name);
1255 } else {
1256 printf("wb%d: MII without any phy!\n", sc->wb_unit);
960 /*
961 * Do MII setup.
962 */
963 if (mii_phy_probe(dev, &sc->wb_miibus,
964 wb_ifmedia_upd, wb_ifmedia_sts)) {
1257 bus_teardown_intr(dev, sc->wb_irq, sc->wb_intrhand);
1258 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->wb_irq);
1259 bus_release_resource(dev, WB_RES, WB_RID, sc->wb_res);
1260 free(sc->wb_ldata_ptr, M_DEVBUF);
1261 error = ENXIO;
1262 goto fail;
1263 }
1264
1265 /*
965 bus_teardown_intr(dev, sc->wb_irq, sc->wb_intrhand);
966 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->wb_irq);
967 bus_release_resource(dev, WB_RES, WB_RID, sc->wb_res);
968 free(sc->wb_ldata_ptr, M_DEVBUF);
969 error = ENXIO;
970 goto fail;
971 }
972
973 /*
1266 * Do ifmedia setup.
1267 */
1268 ifmedia_init(&sc->ifmedia, 0, wb_ifmedia_upd, wb_ifmedia_sts);
1269
1270 wb_getmode_mii(sc);
1271 if (cold) {
1272 wb_autoneg_mii(sc, WB_FLAG_FORCEDELAY, 1);
1273 wb_stop(sc);
1274 } else {
1275 wb_init(sc);
1276 wb_autoneg_mii(sc, WB_FLAG_SCHEDDELAY, 1);
1277 }
1278 media = sc->ifmedia.ifm_media;
1279
1280 ifmedia_set(&sc->ifmedia, media);
1281
1282 /*
1283 * Call MI attach routines.
1284 */
1285 if_attach(ifp);
1286 ether_ifattach(ifp);
1287
1288#if NBPF > 0
1289 bpfattach(ifp, DLT_EN10MB, sizeof(struct ether_header));
1290#endif
1291
1292fail:
974 * Call MI attach routines.
975 */
976 if_attach(ifp);
977 ether_ifattach(ifp);
978
979#if NBPF > 0
980 bpfattach(ifp, DLT_EN10MB, sizeof(struct ether_header));
981#endif
982
983fail:
984 if (error)
985 device_delete_child(dev, sc->wb_miibus);
1293 splx(s);
986 splx(s);
987
1294 return(error);
1295}
1296
1297static int wb_detach(dev)
1298 device_t dev;
1299{
1300 struct wb_softc *sc;
1301 struct ifnet *ifp;
1302 int s;
1303
1304 s = splimp();
1305
1306 sc = device_get_softc(dev);
1307 ifp = &sc->arpcom.ac_if;
1308
1309 wb_stop(sc);
1310 if_detach(ifp);
1311
988 return(error);
989}
990
991static int wb_detach(dev)
992 device_t dev;
993{
994 struct wb_softc *sc;
995 struct ifnet *ifp;
996 int s;
997
998 s = splimp();
999
1000 sc = device_get_softc(dev);
1001 ifp = &sc->arpcom.ac_if;
1002
1003 wb_stop(sc);
1004 if_detach(ifp);
1005
1006 /* Delete any miibus and phy devices attached to this interface */
1007 bus_generic_detach(dev);
1008 device_delete_child(dev, sc->wb_miibus);
1009
1312 bus_teardown_intr(dev, sc->wb_irq, sc->wb_intrhand);
1313 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->wb_irq);
1314 bus_release_resource(dev, WB_RES, WB_RID, sc->wb_res);
1315
1316 free(sc->wb_ldata_ptr, M_DEVBUF);
1010 bus_teardown_intr(dev, sc->wb_irq, sc->wb_intrhand);
1011 bus_release_resource(dev, SYS_RES_IRQ, 0, sc->wb_irq);
1012 bus_release_resource(dev, WB_RES, WB_RID, sc->wb_res);
1013
1014 free(sc->wb_ldata_ptr, M_DEVBUF);
1317 ifmedia_removeall(&sc->ifmedia);
1318
1319 splx(s);
1320
1321 return(0);
1322}
1323
1324/*
1325 * Initialize the transmit descriptors.

--- 39 unchanged lines hidden (view full) ---

1365 int i;
1366
1367 cd = &sc->wb_cdata;
1368 ld = sc->wb_ldata;
1369
1370 for (i = 0; i < WB_RX_LIST_CNT; i++) {
1371 cd->wb_rx_chain[i].wb_ptr =
1372 (struct wb_desc *)&ld->wb_rx_list[i];
1015
1016 splx(s);
1017
1018 return(0);
1019}
1020
1021/*
1022 * Initialize the transmit descriptors.

--- 39 unchanged lines hidden (view full) ---

1062 int i;
1063
1064 cd = &sc->wb_cdata;
1065 ld = sc->wb_ldata;
1066
1067 for (i = 0; i < WB_RX_LIST_CNT; i++) {
1068 cd->wb_rx_chain[i].wb_ptr =
1069 (struct wb_desc *)&ld->wb_rx_list[i];
1070 cd->wb_rx_chain[i].wb_buf = (void *)&ld->wb_rxbufs[i];
1373 if (wb_newbuf(sc, &cd->wb_rx_chain[i], NULL) == ENOBUFS)
1374 return(ENOBUFS);
1375 if (i == (WB_RX_LIST_CNT - 1)) {
1376 cd->wb_rx_chain[i].wb_nextdesc = &cd->wb_rx_chain[0];
1377 ld->wb_rx_list[i].wb_next =
1378 vtophys(&ld->wb_rx_list[0]);
1379 } else {
1380 cd->wb_rx_chain[i].wb_nextdesc =
1381 &cd->wb_rx_chain[i + 1];
1382 ld->wb_rx_list[i].wb_next =
1383 vtophys(&ld->wb_rx_list[i + 1]);
1384 }
1385 }
1386
1387 cd->wb_rx_head = &cd->wb_rx_chain[0];
1388
1389 return(0);
1390}
1391
1071 if (wb_newbuf(sc, &cd->wb_rx_chain[i], NULL) == ENOBUFS)
1072 return(ENOBUFS);
1073 if (i == (WB_RX_LIST_CNT - 1)) {
1074 cd->wb_rx_chain[i].wb_nextdesc = &cd->wb_rx_chain[0];
1075 ld->wb_rx_list[i].wb_next =
1076 vtophys(&ld->wb_rx_list[0]);
1077 } else {
1078 cd->wb_rx_chain[i].wb_nextdesc =
1079 &cd->wb_rx_chain[i + 1];
1080 ld->wb_rx_list[i].wb_next =
1081 vtophys(&ld->wb_rx_list[i + 1]);
1082 }
1083 }
1084
1085 cd->wb_rx_head = &cd->wb_rx_chain[0];
1086
1087 return(0);
1088}
1089
1090static void wb_bfree(buf, size)
1091 caddr_t buf;
1092 u_int size;
1093{
1094 return;
1095}
1096
1392/*
1393 * Initialize an RX descriptor and attach an MBUF cluster.
1394 */
1395static int wb_newbuf(sc, c, m)
1396 struct wb_softc *sc;
1397 struct wb_chain_onefrag *c;
1398 struct mbuf *m;
1399{
1400 struct mbuf *m_new = NULL;
1401
1402 if (m == NULL) {
1403 MGETHDR(m_new, M_DONTWAIT, MT_DATA);
1404 if (m_new == NULL) {
1405 printf("wb%d: no memory for rx "
1406 "list -- packet dropped!\n", sc->wb_unit);
1407 return(ENOBUFS);
1408 }
1409
1097/*
1098 * Initialize an RX descriptor and attach an MBUF cluster.
1099 */
1100static int wb_newbuf(sc, c, m)
1101 struct wb_softc *sc;
1102 struct wb_chain_onefrag *c;
1103 struct mbuf *m;
1104{
1105 struct mbuf *m_new = NULL;
1106
1107 if (m == NULL) {
1108 MGETHDR(m_new, M_DONTWAIT, MT_DATA);
1109 if (m_new == NULL) {
1110 printf("wb%d: no memory for rx "
1111 "list -- packet dropped!\n", sc->wb_unit);
1112 return(ENOBUFS);
1113 }
1114
1410 MCLGET(m_new, M_DONTWAIT);
1411 if (!(m_new->m_flags & M_EXT)) {
1412 printf("wb%d: no memory for rx "
1413 "list -- packet dropped!\n", sc->wb_unit);
1414 m_freem(m_new);
1415 return(ENOBUFS);
1416 }
1417 m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
1115 m_new->m_data = m_new->m_ext.ext_buf = c->wb_buf;
1116 m_new->m_flags |= M_EXT;
1117 m_new->m_ext.ext_size = m_new->m_pkthdr.len =
1118 m_new->m_len = WB_BUFBYTES;
1119 m_new->m_ext.ext_free = wb_bfree;
1120 m_new->m_ext.ext_ref = wb_bfree;
1418 } else {
1419 m_new = m;
1121 } else {
1122 m_new = m;
1420 m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
1123 m_new->m_len = m_new->m_pkthdr.len = WB_BUFBYTES;
1421 m_new->m_data = m_new->m_ext.ext_buf;
1422 }
1423
1424 m_adj(m_new, sizeof(u_int64_t));
1425
1426 c->wb_mbuf = m_new;
1427 c->wb_ptr->wb_data = vtophys(mtod(m_new, caddr_t));
1124 m_new->m_data = m_new->m_ext.ext_buf;
1125 }
1126
1127 m_adj(m_new, sizeof(u_int64_t));
1128
1129 c->wb_mbuf = m_new;
1130 c->wb_ptr->wb_data = vtophys(mtod(m_new, caddr_t));
1428 c->wb_ptr->wb_ctl = WB_RXCTL_RLINK | (MCLBYTES - 1);
1131 c->wb_ptr->wb_ctl = WB_RXCTL_RLINK | 1536;
1429 c->wb_ptr->wb_status = WB_RXSTAT;
1430
1431 return(0);
1432}
1433
1434/*
1435 * A frame has been uploaded: pass the resulting mbuf chain up to
1436 * the higher level protocols.
1437 */
1438static void wb_rxeof(sc)
1439 struct wb_softc *sc;
1440{
1441 struct ether_header *eh;
1132 c->wb_ptr->wb_status = WB_RXSTAT;
1133
1134 return(0);
1135}
1136
1137/*
1138 * A frame has been uploaded: pass the resulting mbuf chain up to
1139 * the higher level protocols.
1140 */
1141static void wb_rxeof(sc)
1142 struct wb_softc *sc;
1143{
1144 struct ether_header *eh;
1442 struct mbuf *m;
1145 struct mbuf *m = NULL;
1443 struct ifnet *ifp;
1444 struct wb_chain_onefrag *cur_rx;
1445 int total_len = 0;
1446 u_int32_t rxstat;
1447
1448 ifp = &sc->arpcom.ac_if;
1449
1450 while(!((rxstat = sc->wb_cdata.wb_rx_head->wb_ptr->wb_status) &
1451 WB_RXSTAT_OWN)) {
1452 struct mbuf *m0 = NULL;
1453
1454 cur_rx = sc->wb_cdata.wb_rx_head;
1455 sc->wb_cdata.wb_rx_head = cur_rx->wb_nextdesc;
1146 struct ifnet *ifp;
1147 struct wb_chain_onefrag *cur_rx;
1148 int total_len = 0;
1149 u_int32_t rxstat;
1150
1151 ifp = &sc->arpcom.ac_if;
1152
1153 while(!((rxstat = sc->wb_cdata.wb_rx_head->wb_ptr->wb_status) &
1154 WB_RXSTAT_OWN)) {
1155 struct mbuf *m0 = NULL;
1156
1157 cur_rx = sc->wb_cdata.wb_rx_head;
1158 sc->wb_cdata.wb_rx_head = cur_rx->wb_nextdesc;
1159
1456 m = cur_rx->wb_mbuf;
1457
1160 m = cur_rx->wb_mbuf;
1161
1458 if ((rxstat & WB_RXSTAT_MIIERR)
1459 || WB_RXBYTES(cur_rx->wb_ptr->wb_status) == 0) {
1162 if ((rxstat & WB_RXSTAT_MIIERR) ||
1163 (WB_RXBYTES(cur_rx->wb_ptr->wb_status) < WB_MIN_FRAMELEN) ||
1164 (WB_RXBYTES(cur_rx->wb_ptr->wb_status) > 1536) ||
1165 !(rxstat & WB_RXSTAT_LASTFRAG) ||
1166 !(rxstat & WB_RXSTAT_RXCMP)) {
1460 ifp->if_ierrors++;
1167 ifp->if_ierrors++;
1461 wb_reset(sc);
1168 wb_newbuf(sc, cur_rx, m);
1462 printf("wb%x: receiver babbling: possible chip "
1463 "bug, forcing reset\n", sc->wb_unit);
1169 printf("wb%x: receiver babbling: possible chip "
1170 "bug, forcing reset\n", sc->wb_unit);
1464 ifp->if_flags |= IFF_OACTIVE;
1465 ifp->if_timer = 2;
1171 wb_fixmedia(sc);
1172 wb_reset(sc);
1173 wb_init(sc);
1466 return;
1467 }
1468
1469 if (rxstat & WB_RXSTAT_RXERR) {
1470 ifp->if_ierrors++;
1471 wb_newbuf(sc, cur_rx, m);
1174 return;
1175 }
1176
1177 if (rxstat & WB_RXSTAT_RXERR) {
1178 ifp->if_ierrors++;
1179 wb_newbuf(sc, cur_rx, m);
1472 continue;
1180 break;
1473 }
1474
1475 /* No errors; receive the packet. */
1476 total_len = WB_RXBYTES(cur_rx->wb_ptr->wb_status);
1477
1478 /*
1479 * XXX The Winbond chip includes the CRC with every
1480 * received frame, and there's no way to turn this
1481 * behavior off (at least, I can't find anything in
1482 * the manual that explains how to do it) so we have
1483 * to trim off the CRC manually.
1484 */
1485 total_len -= ETHER_CRC_LEN;
1486
1487 m0 = m_devget(mtod(m, char *) - ETHER_ALIGN,
1488 total_len + ETHER_ALIGN, 0, ifp, NULL);
1489 wb_newbuf(sc, cur_rx, m);
1490 if (m0 == NULL) {
1491 ifp->if_ierrors++;
1181 }
1182
1183 /* No errors; receive the packet. */
1184 total_len = WB_RXBYTES(cur_rx->wb_ptr->wb_status);
1185
1186 /*
1187 * XXX The Winbond chip includes the CRC with every
1188 * received frame, and there's no way to turn this
1189 * behavior off (at least, I can't find anything in
1190 * the manual that explains how to do it) so we have
1191 * to trim off the CRC manually.
1192 */
1193 total_len -= ETHER_CRC_LEN;
1194
1195 m0 = m_devget(mtod(m, char *) - ETHER_ALIGN,
1196 total_len + ETHER_ALIGN, 0, ifp, NULL);
1197 wb_newbuf(sc, cur_rx, m);
1198 if (m0 == NULL) {
1199 ifp->if_ierrors++;
1492 continue;
1200 break;
1493 }
1494 m_adj(m0, ETHER_ALIGN);
1495 m = m0;
1496
1497 ifp->if_ipackets++;
1498 eh = mtod(m, struct ether_header *);
1499
1500#ifdef BRIDGE
1501 if (do_bridge) {
1502 struct ifnet *bdg_ifp;
1503 bdg_ifp = bridge_in(m);
1504 if (bdg_ifp != BDG_LOCAL && bdg_ifp != BDG_DROP)
1505 bdg_forward(&m, bdg_ifp);
1506 if (((bdg_ifp != BDG_LOCAL) && (bdg_ifp != BDG_BCAST) &&
1507 (bdg_ifp != BDG_MCAST)) || bdg_ifp == BDG_DROP) {
1508 m_freem(m);
1201 }
1202 m_adj(m0, ETHER_ALIGN);
1203 m = m0;
1204
1205 ifp->if_ipackets++;
1206 eh = mtod(m, struct ether_header *);
1207
1208#ifdef BRIDGE
1209 if (do_bridge) {
1210 struct ifnet *bdg_ifp;
1211 bdg_ifp = bridge_in(m);
1212 if (bdg_ifp != BDG_LOCAL && bdg_ifp != BDG_DROP)
1213 bdg_forward(&m, bdg_ifp);
1214 if (((bdg_ifp != BDG_LOCAL) && (bdg_ifp != BDG_BCAST) &&
1215 (bdg_ifp != BDG_MCAST)) || bdg_ifp == BDG_DROP) {
1216 m_freem(m);
1509 continue;
1217 break;
1510 }
1511 }
1512#endif
1513
1514#if NBPF > 0
1515 /*
1516 * Handle BPF listeners. Let the BPF user see the packet, but
1517 * don't pass it up to the ether_input() layer unless it's
1518 * a broadcast packet, multicast packet, matches our ethernet
1519 * address or the interface is in promiscuous mode.
1520 */
1521 if (ifp->if_bpf) {
1522 bpf_mtap(ifp, m);
1523 if (ifp->if_flags & IFF_PROMISC &&
1524 (bcmp(eh->ether_dhost, sc->arpcom.ac_enaddr,
1525 ETHER_ADDR_LEN) &&
1526 (eh->ether_dhost[0] & 1) == 0)) {
1527 m_freem(m);
1218 }
1219 }
1220#endif
1221
1222#if NBPF > 0
1223 /*
1224 * Handle BPF listeners. Let the BPF user see the packet, but
1225 * don't pass it up to the ether_input() layer unless it's
1226 * a broadcast packet, multicast packet, matches our ethernet
1227 * address or the interface is in promiscuous mode.
1228 */
1229 if (ifp->if_bpf) {
1230 bpf_mtap(ifp, m);
1231 if (ifp->if_flags & IFF_PROMISC &&
1232 (bcmp(eh->ether_dhost, sc->arpcom.ac_enaddr,
1233 ETHER_ADDR_LEN) &&
1234 (eh->ether_dhost[0] & 1) == 0)) {
1235 m_freem(m);
1528 continue;
1236 break;
1529 }
1530 }
1531#endif
1532 /* Remove header from mbuf and pass it on. */
1533 m_adj(m, sizeof(struct ether_header));
1534 ether_input(ifp, eh, m);
1535 }
1536

--- 81 unchanged lines hidden (view full) ---

1618
1619 ifp = &sc->arpcom.ac_if;
1620
1621 ifp->if_timer = 0;
1622
1623 if (sc->wb_cdata.wb_tx_head == NULL) {
1624 ifp->if_flags &= ~IFF_OACTIVE;
1625 sc->wb_cdata.wb_tx_tail = NULL;
1237 }
1238 }
1239#endif
1240 /* Remove header from mbuf and pass it on. */
1241 m_adj(m, sizeof(struct ether_header));
1242 ether_input(ifp, eh, m);
1243 }
1244

--- 81 unchanged lines hidden (view full) ---

1326
1327 ifp = &sc->arpcom.ac_if;
1328
1329 ifp->if_timer = 0;
1330
1331 if (sc->wb_cdata.wb_tx_head == NULL) {
1332 ifp->if_flags &= ~IFF_OACTIVE;
1333 sc->wb_cdata.wb_tx_tail = NULL;
1626 if (sc->wb_want_auto)
1627 wb_autoneg_mii(sc, WB_FLAG_SCHEDDELAY, 1);
1628 } else {
1629 if (WB_TXOWN(sc->wb_cdata.wb_tx_head) == WB_UNSENT) {
1630 WB_TXOWN(sc->wb_cdata.wb_tx_head) = WB_TXSTAT_OWN;
1631 ifp->if_timer = 5;
1632 CSR_WRITE_4(sc, WB_TXSTART, 0xFFFFFFFF);
1633 }
1634 }
1635

--- 20 unchanged lines hidden (view full) ---

1656
1657 status = CSR_READ_4(sc, WB_ISR);
1658 if (status)
1659 CSR_WRITE_4(sc, WB_ISR, status);
1660
1661 if ((status & WB_INTRS) == 0)
1662 break;
1663
1334 } else {
1335 if (WB_TXOWN(sc->wb_cdata.wb_tx_head) == WB_UNSENT) {
1336 WB_TXOWN(sc->wb_cdata.wb_tx_head) = WB_TXSTAT_OWN;
1337 ifp->if_timer = 5;
1338 CSR_WRITE_4(sc, WB_TXSTART, 0xFFFFFFFF);
1339 }
1340 }
1341

--- 20 unchanged lines hidden (view full) ---

1362
1363 status = CSR_READ_4(sc, WB_ISR);
1364 if (status)
1365 CSR_WRITE_4(sc, WB_ISR, status);
1366
1367 if ((status & WB_INTRS) == 0)
1368 break;
1369
1664 if (status & WB_ISR_RX_OK)
1665 wb_rxeof(sc);
1666
1667 if (status & WB_ISR_RX_IDLE)
1668 wb_rxeoc(sc);
1669
1670 if ((status & WB_ISR_RX_NOBUF) || (status & WB_ISR_RX_ERR)) {
1671 ifp->if_ierrors++;
1370 if ((status & WB_ISR_RX_NOBUF) || (status & WB_ISR_RX_ERR)) {
1371 ifp->if_ierrors++;
1672#ifdef foo
1673 wb_stop(sc);
1674 wb_reset(sc);
1372 wb_reset(sc);
1373 if (status & WB_ISR_RX_ERR)
1374 wb_fixmedia(sc);
1675 wb_init(sc);
1375 wb_init(sc);
1676#endif
1376 continue;
1677 }
1678
1377 }
1378
1379 if (status & WB_ISR_RX_OK)
1380 wb_rxeof(sc);
1381
1382 if (status & WB_ISR_RX_IDLE)
1383 wb_rxeoc(sc);
1384
1679 if (status & WB_ISR_TX_OK)
1680 wb_txeof(sc);
1681
1682 if (status & WB_ISR_TX_NOBUF)
1683 wb_txeoc(sc);
1684
1685 if (status & WB_ISR_TX_IDLE) {
1686 wb_txeof(sc);

--- 26 unchanged lines hidden (view full) ---

1713
1714 if (ifp->if_snd.ifq_head != NULL) {
1715 wb_start(ifp);
1716 }
1717
1718 return;
1719}
1720
1385 if (status & WB_ISR_TX_OK)
1386 wb_txeof(sc);
1387
1388 if (status & WB_ISR_TX_NOBUF)
1389 wb_txeoc(sc);
1390
1391 if (status & WB_ISR_TX_IDLE) {
1392 wb_txeof(sc);

--- 26 unchanged lines hidden (view full) ---

1419
1420 if (ifp->if_snd.ifq_head != NULL) {
1421 wb_start(ifp);
1422 }
1423
1424 return;
1425}
1426
1427static void wb_tick(xsc)
1428 void *xsc;
1429{
1430 struct wb_softc *sc;
1431 struct mii_data *mii;
1432
1433 sc = xsc;
1434 mii = device_get_softc(sc->wb_miibus);
1435
1436 mii_tick(mii);
1437
1438 sc->wb_stat_ch = timeout(wb_tick, sc, hz);
1439
1440 return;
1441}
1442
1721/*
1722 * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data
1723 * pointers to the fragment pointers.
1724 */
1725static int wb_encap(sc, c, m_head)
1726 struct wb_softc *sc;
1727 struct wb_chain *c;
1728 struct mbuf *m_head;

--- 95 unchanged lines hidden (view full) ---

1824 struct ifnet *ifp;
1825{
1826 struct wb_softc *sc;
1827 struct mbuf *m_head = NULL;
1828 struct wb_chain *cur_tx = NULL, *start_tx;
1829
1830 sc = ifp->if_softc;
1831
1443/*
1444 * Encapsulate an mbuf chain in a descriptor by coupling the mbuf data
1445 * pointers to the fragment pointers.
1446 */
1447static int wb_encap(sc, c, m_head)
1448 struct wb_softc *sc;
1449 struct wb_chain *c;
1450 struct mbuf *m_head;

--- 95 unchanged lines hidden (view full) ---

1546 struct ifnet *ifp;
1547{
1548 struct wb_softc *sc;
1549 struct mbuf *m_head = NULL;
1550 struct wb_chain *cur_tx = NULL, *start_tx;
1551
1552 sc = ifp->if_softc;
1553
1832 if (sc->wb_autoneg) {
1833 sc->wb_tx_pend = 1;
1834 return;
1835 }
1836
1837 /*
1838 * Check for an available queue slot. If there are none,
1839 * punt.
1840 */
1841 if (sc->wb_cdata.wb_tx_free->wb_mbuf != NULL) {
1842 ifp->if_flags |= IFF_OACTIVE;
1843 return;
1844 }

--- 71 unchanged lines hidden (view full) ---

1916}
1917
1918static void wb_init(xsc)
1919 void *xsc;
1920{
1921 struct wb_softc *sc = xsc;
1922 struct ifnet *ifp = &sc->arpcom.ac_if;
1923 int s, i;
1554 /*
1555 * Check for an available queue slot. If there are none,
1556 * punt.
1557 */
1558 if (sc->wb_cdata.wb_tx_free->wb_mbuf != NULL) {
1559 ifp->if_flags |= IFF_OACTIVE;
1560 return;
1561 }

--- 71 unchanged lines hidden (view full) ---

1633}
1634
1635static void wb_init(xsc)
1636 void *xsc;
1637{
1638 struct wb_softc *sc = xsc;
1639 struct ifnet *ifp = &sc->arpcom.ac_if;
1640 int s, i;
1924 u_int16_t phy_bmcr = 0;
1641 struct mii_data *mii;
1925
1642
1926 if (sc->wb_autoneg)
1927 return;
1928
1929 s = splimp();
1930
1643 s = splimp();
1644
1931 if (sc->wb_pinfo != NULL)
1932 phy_bmcr = wb_phy_readreg(sc, PHY_BMCR);
1645 mii = device_get_softc(sc->wb_miibus);
1933
1934 /*
1935 * Cancel pending I/O and free all RX/TX buffers.
1936 */
1937 wb_stop(sc);
1938 wb_reset(sc);
1939
1940 sc->wb_txthresh = WB_TXTHRESH_INIT;
1941
1942 /*
1943 * Set cache alignment and burst length.
1944 */
1646
1647 /*
1648 * Cancel pending I/O and free all RX/TX buffers.
1649 */
1650 wb_stop(sc);
1651 wb_reset(sc);
1652
1653 sc->wb_txthresh = WB_TXTHRESH_INIT;
1654
1655 /*
1656 * Set cache alignment and burst length.
1657 */
1658#ifdef foo
1945 CSR_WRITE_4(sc, WB_BUSCTL, WB_BUSCTL_CONFIG);
1946 WB_CLRBIT(sc, WB_NETCFG, WB_NETCFG_TX_THRESH);
1947 WB_SETBIT(sc, WB_NETCFG, WB_TXTHRESH(sc->wb_txthresh));
1659 CSR_WRITE_4(sc, WB_BUSCTL, WB_BUSCTL_CONFIG);
1660 WB_CLRBIT(sc, WB_NETCFG, WB_NETCFG_TX_THRESH);
1661 WB_SETBIT(sc, WB_NETCFG, WB_TXTHRESH(sc->wb_txthresh));
1662#endif
1948
1663
1664 CSR_WRITE_4(sc, WB_BUSCTL, WB_BUSCTL_MUSTBEONE|WB_BUSCTL_ARBITRATION);
1665 WB_SETBIT(sc, WB_BUSCTL, WB_BURSTLEN_16LONG);
1666 switch(sc->wb_cachesize) {
1667 case 32:
1668 WB_SETBIT(sc, WB_BUSCTL, WB_CACHEALIGN_32LONG);
1669 break;
1670 case 16:
1671 WB_SETBIT(sc, WB_BUSCTL, WB_CACHEALIGN_16LONG);
1672 break;
1673 case 8:
1674 WB_SETBIT(sc, WB_BUSCTL, WB_CACHEALIGN_8LONG);
1675 break;
1676 case 0:
1677 default:
1678 WB_SETBIT(sc, WB_BUSCTL, WB_CACHEALIGN_NONE);
1679 break;
1680 }
1681
1949 /* This doesn't tend to work too well at 100Mbps. */
1950 WB_CLRBIT(sc, WB_NETCFG, WB_NETCFG_TX_EARLY_ON);
1951
1682 /* This doesn't tend to work too well at 100Mbps. */
1683 WB_CLRBIT(sc, WB_NETCFG, WB_NETCFG_TX_EARLY_ON);
1684
1952 wb_setcfg(sc, phy_bmcr);
1953
1954 /* Init our MAC address */
1955 for (i = 0; i < ETHER_ADDR_LEN; i++) {
1956 CSR_WRITE_1(sc, WB_NODE0 + i, sc->arpcom.ac_enaddr[i]);
1957 }
1958
1959 /* Init circular RX list. */
1960 if (wb_list_rx_init(sc) == ENOBUFS) {
1961 printf("wb%d: initialization failed: no "

--- 42 unchanged lines hidden (view full) ---

2004 /* Enable receiver and transmitter. */
2005 WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_RX_ON);
2006 CSR_WRITE_4(sc, WB_RXSTART, 0xFFFFFFFF);
2007
2008 WB_CLRBIT(sc, WB_NETCFG, WB_NETCFG_TX_ON);
2009 CSR_WRITE_4(sc, WB_TXADDR, vtophys(&sc->wb_ldata->wb_tx_list[0]));
2010 WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_TX_ON);
2011
1685 /* Init our MAC address */
1686 for (i = 0; i < ETHER_ADDR_LEN; i++) {
1687 CSR_WRITE_1(sc, WB_NODE0 + i, sc->arpcom.ac_enaddr[i]);
1688 }
1689
1690 /* Init circular RX list. */
1691 if (wb_list_rx_init(sc) == ENOBUFS) {
1692 printf("wb%d: initialization failed: no "

--- 42 unchanged lines hidden (view full) ---

1735 /* Enable receiver and transmitter. */
1736 WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_RX_ON);
1737 CSR_WRITE_4(sc, WB_RXSTART, 0xFFFFFFFF);
1738
1739 WB_CLRBIT(sc, WB_NETCFG, WB_NETCFG_TX_ON);
1740 CSR_WRITE_4(sc, WB_TXADDR, vtophys(&sc->wb_ldata->wb_tx_list[0]));
1741 WB_SETBIT(sc, WB_NETCFG, WB_NETCFG_TX_ON);
1742
2012 /* Restore state of BMCR */
2013 if (sc->wb_pinfo != NULL)
2014 wb_phy_writereg(sc, PHY_BMCR, phy_bmcr);
1743 mii_mediachg(mii);
2015
2016 ifp->if_flags |= IFF_RUNNING;
2017 ifp->if_flags &= ~IFF_OACTIVE;
2018
2019 (void)splx(s);
2020
1744
1745 ifp->if_flags |= IFF_RUNNING;
1746 ifp->if_flags &= ~IFF_OACTIVE;
1747
1748 (void)splx(s);
1749
1750 sc->wb_stat_ch = timeout(wb_tick, sc, hz);
1751
2021 return;
2022}
2023
2024/*
2025 * Set media options.
2026 */
2027static int wb_ifmedia_upd(ifp)
2028 struct ifnet *ifp;
2029{
2030 struct wb_softc *sc;
1752 return;
1753}
1754
1755/*
1756 * Set media options.
1757 */
1758static int wb_ifmedia_upd(ifp)
1759 struct ifnet *ifp;
1760{
1761 struct wb_softc *sc;
2031 struct ifmedia *ifm;
2032
2033 sc = ifp->if_softc;
1762
1763 sc = ifp->if_softc;
2034 ifm = &sc->ifmedia;
2035
1764
2036 if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
2037 return(EINVAL);
1765 if (ifp->if_flags & IFF_UP)
1766 wb_init(sc);
2038
1767
2039 if (IFM_SUBTYPE(ifm->ifm_media) == IFM_AUTO)
2040 wb_autoneg_mii(sc, WB_FLAG_SCHEDDELAY, 1);
2041 else
2042 wb_setmode_mii(sc, ifm->ifm_media);
2043
2044 return(0);
2045}
2046
2047/*
2048 * Report current media status.
2049 */
2050static void wb_ifmedia_sts(ifp, ifmr)
2051 struct ifnet *ifp;
2052 struct ifmediareq *ifmr;
2053{
2054 struct wb_softc *sc;
1768 return(0);
1769}
1770
1771/*
1772 * Report current media status.
1773 */
1774static void wb_ifmedia_sts(ifp, ifmr)
1775 struct ifnet *ifp;
1776 struct ifmediareq *ifmr;
1777{
1778 struct wb_softc *sc;
2055 u_int16_t advert = 0, ability = 0;
1779 struct mii_data *mii;
2056
2057 sc = ifp->if_softc;
2058
1780
1781 sc = ifp->if_softc;
1782
2059 ifmr->ifm_active = IFM_ETHER;
1783 mii = device_get_softc(sc->wb_miibus);
2060
1784
2061 if (!(wb_phy_readreg(sc, PHY_BMCR) & PHY_BMCR_AUTONEGENBL)) {
2062 if (wb_phy_readreg(sc, PHY_BMCR) & PHY_BMCR_SPEEDSEL)
2063 ifmr->ifm_active = IFM_ETHER|IFM_100_TX;
2064 else
2065 ifmr->ifm_active = IFM_ETHER|IFM_10_T;
2066 if (wb_phy_readreg(sc, PHY_BMCR) & PHY_BMCR_DUPLEX)
2067 ifmr->ifm_active |= IFM_FDX;
2068 else
2069 ifmr->ifm_active |= IFM_HDX;
2070 return;
2071 }
1785 mii_pollstat(mii);
1786 ifmr->ifm_active = mii->mii_media_active;
1787 ifmr->ifm_status = mii->mii_media_status;
2072
1788
2073 ability = wb_phy_readreg(sc, PHY_LPAR);
2074 advert = wb_phy_readreg(sc, PHY_ANAR);
2075 if (advert & PHY_ANAR_100BT4 &&
2076 ability & PHY_ANAR_100BT4) {
2077 ifmr->ifm_active = IFM_ETHER|IFM_100_T4;
2078 } else if (advert & PHY_ANAR_100BTXFULL &&
2079 ability & PHY_ANAR_100BTXFULL) {
2080 ifmr->ifm_active = IFM_ETHER|IFM_100_TX|IFM_FDX;
2081 } else if (advert & PHY_ANAR_100BTXHALF &&
2082 ability & PHY_ANAR_100BTXHALF) {
2083 ifmr->ifm_active = IFM_ETHER|IFM_100_TX|IFM_HDX;
2084 } else if (advert & PHY_ANAR_10BTFULL &&
2085 ability & PHY_ANAR_10BTFULL) {
2086 ifmr->ifm_active = IFM_ETHER|IFM_10_T|IFM_FDX;
2087 } else if (advert & PHY_ANAR_10BTHALF &&
2088 ability & PHY_ANAR_10BTHALF) {
2089 ifmr->ifm_active = IFM_ETHER|IFM_10_T|IFM_HDX;
2090 }
2091
2092 return;
2093}
2094
2095static int wb_ioctl(ifp, command, data)
2096 struct ifnet *ifp;
2097 u_long command;
2098 caddr_t data;
2099{
2100 struct wb_softc *sc = ifp->if_softc;
1789 return;
1790}
1791
1792static int wb_ioctl(ifp, command, data)
1793 struct ifnet *ifp;
1794 u_long command;
1795 caddr_t data;
1796{
1797 struct wb_softc *sc = ifp->if_softc;
1798 struct mii_data *mii;
2101 struct ifreq *ifr = (struct ifreq *) data;
2102 int s, error = 0;
2103
2104 s = splimp();
2105
2106 switch(command) {
2107 case SIOCSIFADDR:
2108 case SIOCGIFADDR:

--- 11 unchanged lines hidden (view full) ---

2120 break;
2121 case SIOCADDMULTI:
2122 case SIOCDELMULTI:
2123 wb_setmulti(sc);
2124 error = 0;
2125 break;
2126 case SIOCGIFMEDIA:
2127 case SIOCSIFMEDIA:
1799 struct ifreq *ifr = (struct ifreq *) data;
1800 int s, error = 0;
1801
1802 s = splimp();
1803
1804 switch(command) {
1805 case SIOCSIFADDR:
1806 case SIOCGIFADDR:

--- 11 unchanged lines hidden (view full) ---

1818 break;
1819 case SIOCADDMULTI:
1820 case SIOCDELMULTI:
1821 wb_setmulti(sc);
1822 error = 0;
1823 break;
1824 case SIOCGIFMEDIA:
1825 case SIOCSIFMEDIA:
2128 error = ifmedia_ioctl(ifp, ifr, &sc->ifmedia, command);
1826 mii = device_get_softc(sc->wb_miibus);
1827 error = ifmedia_ioctl(ifp, ifr, &mii->mii_media, command);
2129 break;
2130 default:
2131 error = EINVAL;
2132 break;
2133 }
2134
2135 (void)splx(s);
2136
2137 return(error);
2138}
2139
2140static void wb_watchdog(ifp)
2141 struct ifnet *ifp;
2142{
2143 struct wb_softc *sc;
2144
2145 sc = ifp->if_softc;
2146
1828 break;
1829 default:
1830 error = EINVAL;
1831 break;
1832 }
1833
1834 (void)splx(s);
1835
1836 return(error);
1837}
1838
1839static void wb_watchdog(ifp)
1840 struct ifnet *ifp;
1841{
1842 struct wb_softc *sc;
1843
1844 sc = ifp->if_softc;
1845
2147 if (sc->wb_autoneg) {
2148 wb_autoneg_mii(sc, WB_FLAG_DELAYTIMEO, 1);
2149 if (!(ifp->if_flags & IFF_UP))
2150 wb_stop(sc);
2151 return;
2152 }
2153
2154 ifp->if_oerrors++;
2155 printf("wb%d: watchdog timeout\n", sc->wb_unit);
1846 ifp->if_oerrors++;
1847 printf("wb%d: watchdog timeout\n", sc->wb_unit);
2156
1848#ifdef foo
2157 if (!(wb_phy_readreg(sc, PHY_BMSR) & PHY_BMSR_LINKSTAT))
2158 printf("wb%d: no carrier - transceiver cable problem?\n",
2159 sc->wb_unit);
1849 if (!(wb_phy_readreg(sc, PHY_BMSR) & PHY_BMSR_LINKSTAT))
1850 printf("wb%d: no carrier - transceiver cable problem?\n",
1851 sc->wb_unit);
2160
1852#endif
2161 wb_stop(sc);
2162 wb_reset(sc);
2163 wb_init(sc);
2164
2165 if (ifp->if_snd.ifq_head != NULL)
2166 wb_start(ifp);
2167
2168 return;

--- 7 unchanged lines hidden (view full) ---

2176 struct wb_softc *sc;
2177{
2178 register int i;
2179 struct ifnet *ifp;
2180
2181 ifp = &sc->arpcom.ac_if;
2182 ifp->if_timer = 0;
2183
1853 wb_stop(sc);
1854 wb_reset(sc);
1855 wb_init(sc);
1856
1857 if (ifp->if_snd.ifq_head != NULL)
1858 wb_start(ifp);
1859
1860 return;

--- 7 unchanged lines hidden (view full) ---

1868 struct wb_softc *sc;
1869{
1870 register int i;
1871 struct ifnet *ifp;
1872
1873 ifp = &sc->arpcom.ac_if;
1874 ifp->if_timer = 0;
1875
1876 untimeout(wb_tick, sc, sc->wb_stat_ch);
1877
2184 WB_CLRBIT(sc, WB_NETCFG, (WB_NETCFG_RX_ON|WB_NETCFG_TX_ON));
2185 CSR_WRITE_4(sc, WB_IMR, 0x00000000);
2186 CSR_WRITE_4(sc, WB_TXADDR, 0x00000000);
2187 CSR_WRITE_4(sc, WB_RXADDR, 0x00000000);
2188
2189 /*
2190 * Free data in the RX lists.
2191 */

--- 41 unchanged lines hidden --- 		1878 WB_CLRBIT(sc, WB_NETCFG, (WB_NETCFG_RX_ON|WB_NETCFG_TX_ON));
1879 CSR_WRITE_4(sc, WB_IMR, 0x00000000);
1880 CSR_WRITE_4(sc, WB_TXADDR, 0x00000000);
1881 CSR_WRITE_4(sc, WB_RXADDR, 0x00000000);
1882
1883 /*
1884 * Free data in the RX lists.
1885 */

--- 41 unchanged lines hidden ---