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if_vr.c (102336) if_vr.c (105221)
1/*
2 * Copyright (c) 1997, 1998
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
1/*
2 * Copyright (c) 1997, 1998
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD: head/sys/dev/vr/if_vr.c 102336 2002-08-24 00:02:03Z alfred $
32 * $FreeBSD: head/sys/dev/vr/if_vr.c 105221 2002-10-16 09:14:59Z phk $
33 */
34
35/*
36 * VIA Rhine fast ethernet PCI NIC driver
37 *
38 * Supports various network adapters based on the VIA Rhine
39 * and Rhine II PCI controllers, including the D-Link DFE530TX.
40 * Datasheets are available at http://www.via.com.tw.

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96
97MODULE_DEPEND(vr, miibus, 1, 1, 1);
98
99/* "controller miibus0" required. See GENERIC if you get errors here. */
100#include "miibus_if.h"
101
102#ifndef lint
103static const char rcsid[] =
33 */
34
35/*
36 * VIA Rhine fast ethernet PCI NIC driver
37 *
38 * Supports various network adapters based on the VIA Rhine
39 * and Rhine II PCI controllers, including the D-Link DFE530TX.
40 * Datasheets are available at http://www.via.com.tw.

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96
97MODULE_DEPEND(vr, miibus, 1, 1, 1);
98
99/* "controller miibus0" required. See GENERIC if you get errors here. */
100#include "miibus_if.h"
101
102#ifndef lint
103static const char rcsid[] =
104 "$FreeBSD: head/sys/dev/vr/if_vr.c 102336 2002-08-24 00:02:03Z alfred $";
104 "$FreeBSD: head/sys/dev/vr/if_vr.c 105221 2002-10-16 09:14:59Z phk $";
105#endif
106
107/*
108 * Various supported device vendors/types and their names.
109 */
110static struct vr_type vr_devs[] = {
111 { VIA_VENDORID, VIA_DEVICEID_RHINE,
112 "VIA VT3043 Rhine I 10/100BaseTX" },

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196
197static devclass_t vr_devclass;
198
199DRIVER_MODULE(if_vr, pci, vr_driver, vr_devclass, 0, 0);
200DRIVER_MODULE(miibus, vr, miibus_driver, miibus_devclass, 0, 0);
201
202#define VR_SETBIT(sc, reg, x) \
203 CSR_WRITE_1(sc, reg, \
105#endif
106
107/*
108 * Various supported device vendors/types and their names.
109 */
110static struct vr_type vr_devs[] = {
111 { VIA_VENDORID, VIA_DEVICEID_RHINE,
112 "VIA VT3043 Rhine I 10/100BaseTX" },

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196
197static devclass_t vr_devclass;
198
199DRIVER_MODULE(if_vr, pci, vr_driver, vr_devclass, 0, 0);
200DRIVER_MODULE(miibus, vr, miibus_driver, miibus_devclass, 0, 0);
201
202#define VR_SETBIT(sc, reg, x) \
203 CSR_WRITE_1(sc, reg, \
204 CSR_READ_1(sc, reg) | x)
204 CSR_READ_1(sc, reg) | (x))
205
206#define VR_CLRBIT(sc, reg, x) \
207 CSR_WRITE_1(sc, reg, \
205
206#define VR_CLRBIT(sc, reg, x) \
207 CSR_WRITE_1(sc, reg, \
208 CSR_READ_1(sc, reg) & ~x)
208 CSR_READ_1(sc, reg) & ~(x))
209
210#define VR_SETBIT16(sc, reg, x) \
211 CSR_WRITE_2(sc, reg, \
209
210#define VR_SETBIT16(sc, reg, x) \
211 CSR_WRITE_2(sc, reg, \
212 CSR_READ_2(sc, reg) | x)
212 CSR_READ_2(sc, reg) | (x))
213
214#define VR_CLRBIT16(sc, reg, x) \
215 CSR_WRITE_2(sc, reg, \
213
214#define VR_CLRBIT16(sc, reg, x) \
215 CSR_WRITE_2(sc, reg, \
216 CSR_READ_2(sc, reg) & ~x)
216 CSR_READ_2(sc, reg) & ~(x))
217
218#define VR_SETBIT32(sc, reg, x) \
219 CSR_WRITE_4(sc, reg, \
217
218#define VR_SETBIT32(sc, reg, x) \
219 CSR_WRITE_4(sc, reg, \
220 CSR_READ_4(sc, reg) | x)
220 CSR_READ_4(sc, reg) | (x))
221
222#define VR_CLRBIT32(sc, reg, x) \
223 CSR_WRITE_4(sc, reg, \
221
222#define VR_CLRBIT32(sc, reg, x) \
223 CSR_WRITE_4(sc, reg, \
224 CSR_READ_4(sc, reg) & ~x)
224 CSR_READ_4(sc, reg) & ~(x))
225
226#define SIO_SET(x) \
227 CSR_WRITE_1(sc, VR_MIICMD, \
225
226#define SIO_SET(x) \
227 CSR_WRITE_1(sc, VR_MIICMD, \
228 CSR_READ_1(sc, VR_MIICMD) | x)
228 CSR_READ_1(sc, VR_MIICMD) | (x))
229
230#define SIO_CLR(x) \
231 CSR_WRITE_1(sc, VR_MIICMD, \
229
230#define SIO_CLR(x) \
231 CSR_WRITE_1(sc, VR_MIICMD, \
232 CSR_READ_1(sc, VR_MIICMD) & ~x)
232 CSR_READ_1(sc, VR_MIICMD) & ~(x))
233
234/*
235 * Sync the PHYs by setting data bit and strobing the clock 32 times.
236 */
237static void
238vr_mii_sync(sc)
239 struct vr_softc *sc;
240{

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1057 /* Remove header from mbuf and pass it on. */
1058 m_adj(m, sizeof(struct ether_header));
1059 ether_input(ifp, eh, m);
1060 }
1061
1062 return;
1063}
1064
233
234/*
235 * Sync the PHYs by setting data bit and strobing the clock 32 times.
236 */
237static void
238vr_mii_sync(sc)
239 struct vr_softc *sc;
240{

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1057 /* Remove header from mbuf and pass it on. */
1058 m_adj(m, sizeof(struct ether_header));
1059 ether_input(ifp, eh, m);
1060 }
1061
1062 return;
1063}
1064
1065void
1065static void
1066vr_rxeoc(sc)
1067 struct vr_softc *sc;
1068{
1069
1070 vr_rxeof(sc);
1071 VR_CLRBIT16(sc, VR_COMMAND, VR_CMD_RX_ON);
1072 CSR_WRITE_4(sc, VR_RXADDR, vtophys(sc->vr_cdata.vr_rx_head->vr_ptr));
1073 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_RX_ON);

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1066vr_rxeoc(sc)
1067 struct vr_softc *sc;
1068{
1069
1070 vr_rxeof(sc);
1071 VR_CLRBIT16(sc, VR_COMMAND, VR_CMD_RX_ON);
1072 CSR_WRITE_4(sc, VR_RXADDR, vtophys(sc->vr_cdata.vr_rx_head->vr_ptr));
1073 VR_SETBIT16(sc, VR_COMMAND, VR_CMD_RX_ON);

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