| if_vgereg.h (200615) | if_vgereg.h (200638) |
|---|---|
| 1/*- 2 * Copyright (c) 2004 3 * Bill Paul <wpaul@windriver.com>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * | 1/*- 2 * Copyright (c) 2004 3 * Bill Paul <wpaul@windriver.com>. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright --- 15 unchanged lines hidden (view full) --- 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 30 * THE POSSIBILITY OF SUCH DAMAGE. 31 * |
| 32 * $FreeBSD: head/sys/dev/vge/if_vgereg.h 200615 2009-12-16 19:41:40Z yongari $ | 32 * $FreeBSD: head/sys/dev/vge/if_vgereg.h 200638 2009-12-17 18:00:25Z yongari $ |
| 33 */ 34 35/* 36 * Register definitions for the VIA VT6122 gigabit ethernet controller. 37 * Definitions for the built-in copper PHY can be found in vgphy.h. 38 * 39 * The VT612x controllers have 256 bytes of register space. The 40 * manual seems to imply that the registers should all be accessed --- 254 unchanged lines hidden (view full) --- 295#define VGE_ISR_ISRC0 0x10000000 /* interrupt source indication */ 296#define VGE_ISR_ISRC1 0x20000000 /* interrupt source indication */ 297#define VGE_ISR_ISRC2 0x40000000 /* interrupt source indication */ 298#define VGE_ISR_ISRC3 0x80000000 /* interrupt source indication */ 299 300#define VGE_INTRS (VGE_ISR_TXOK0|VGE_ISR_RXOK|VGE_ISR_STOPPED| \ 301 VGE_ISR_RXOFLOW|VGE_ISR_PHYINT| \ 302 VGE_ISR_LINKSTS|VGE_ISR_RXNODESC| \ | 33 */ 34 35/* 36 * Register definitions for the VIA VT6122 gigabit ethernet controller. 37 * Definitions for the built-in copper PHY can be found in vgphy.h. 38 * 39 * The VT612x controllers have 256 bytes of register space. The 40 * manual seems to imply that the registers should all be accessed --- 254 unchanged lines hidden (view full) --- 295#define VGE_ISR_ISRC0 0x10000000 /* interrupt source indication */ 296#define VGE_ISR_ISRC1 0x20000000 /* interrupt source indication */ 297#define VGE_ISR_ISRC2 0x40000000 /* interrupt source indication */ 298#define VGE_ISR_ISRC3 0x80000000 /* interrupt source indication */ 299 300#define VGE_INTRS (VGE_ISR_TXOK0|VGE_ISR_RXOK|VGE_ISR_STOPPED| \ 301 VGE_ISR_RXOFLOW|VGE_ISR_PHYINT| \ 302 VGE_ISR_LINKSTS|VGE_ISR_RXNODESC| \ |
| 303 VGE_ISR_RXDMA_STALL|VGE_ISR_TXDMA_STALL| \ 304 VGE_ISR_TIMER0) | 303 VGE_ISR_RXDMA_STALL|VGE_ISR_TXDMA_STALL) |
| 305 306/* Interrupt mask register */ 307 308#define VGE_IMR_RXOK_HIPRIO 0x00000001 /* hi prio RX int */ 309#define VGE_IMR_TXOK_HIPRIO 0x00000002 /* hi prio TX int */ 310#define VGE_IMR_RXOK 0x00000004 /* normal RX done */ 311#define VGE_IMR_TXOK 0x00000008 /* combo results for next 4 bits */ 312#define VGE_IMR_TXOK0 0x00000010 /* TX complete on queue 0 */ --- 431 unchanged lines hidden --- | 304 305/* Interrupt mask register */ 306 307#define VGE_IMR_RXOK_HIPRIO 0x00000001 /* hi prio RX int */ 308#define VGE_IMR_TXOK_HIPRIO 0x00000002 /* hi prio TX int */ 309#define VGE_IMR_RXOK 0x00000004 /* normal RX done */ 310#define VGE_IMR_TXOK 0x00000008 /* combo results for next 4 bits */ 311#define VGE_IMR_TXOK0 0x00000010 /* TX complete on queue 0 */ --- 431 unchanged lines hidden --- |