uart_dev_sab82532.c (155973) | uart_dev_sab82532.c (157300) |
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1/*- 2 * Copyright (c) 2003 Marcel Moolenaar 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * --- 11 unchanged lines hidden (view full) --- 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> | 1/*- 2 * Copyright (c) 2003 Marcel Moolenaar 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * --- 11 unchanged lines hidden (view full) --- 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27#include <sys/cdefs.h> |
28__FBSDID("$FreeBSD: head/sys/dev/uart/uart_dev_sab82532.c 155973 2006-02-24 05:40:17Z marcel $"); | 28__FBSDID("$FreeBSD: head/sys/dev/uart/uart_dev_sab82532.c 157300 2006-03-30 18:37:03Z marcel $"); |
29 30#include <sys/param.h> 31#include <sys/systm.h> 32#include <sys/bus.h> 33#include <sys/conf.h> 34#include <machine/bus.h> 35 36#include <dev/uart/uart.h> --- 395 unchanged lines hidden (view full) --- 432 uart_barrier(bas); 433 return (0); 434} 435 436static int 437sab82532_bus_flush(struct uart_softc *sc, int what) 438{ 439 | 29 30#include <sys/param.h> 31#include <sys/systm.h> 32#include <sys/bus.h> 33#include <sys/conf.h> 34#include <machine/bus.h> 35 36#include <dev/uart/uart.h> --- 395 unchanged lines hidden (view full) --- 432 uart_barrier(bas); 433 return (0); 434} 435 436static int 437sab82532_bus_flush(struct uart_softc *sc, int what) 438{ 439 |
440 mtx_lock_spin(&sc->sc_hwmtx); | 440 uart_lock(sc->sc_hwmtx); |
441 sab82532_flush(&sc->sc_bas, what); | 441 sab82532_flush(&sc->sc_bas, what); |
442 mtx_unlock_spin(&sc->sc_hwmtx); | 442 uart_unlock(sc->sc_hwmtx); |
443 return (0); 444} 445 446static int 447sab82532_bus_getsig(struct uart_softc *sc) 448{ 449 struct uart_bas *bas; 450 uint32_t new, old, sig; 451 uint8_t pvr, star, vstr; 452 453 bas = &sc->sc_bas; 454 do { 455 old = sc->sc_hwsig; 456 sig = old; | 443 return (0); 444} 445 446static int 447sab82532_bus_getsig(struct uart_softc *sc) 448{ 449 struct uart_bas *bas; 450 uint32_t new, old, sig; 451 uint8_t pvr, star, vstr; 452 453 bas = &sc->sc_bas; 454 do { 455 old = sc->sc_hwsig; 456 sig = old; |
457 mtx_lock_spin(&sc->sc_hwmtx); | 457 uart_lock(sc->sc_hwmtx); |
458 star = uart_getreg(bas, SAB_STAR); 459 SIGCHG(star & SAB_STAR_CTS, sig, SER_CTS, SER_DCTS); 460 vstr = uart_getreg(bas, SAB_VSTR); 461 SIGCHG(vstr & SAB_VSTR_CD, sig, SER_DCD, SER_DDCD); 462 pvr = ~uart_getreg(bas, SAB_PVR); 463 switch (bas->chan) { 464 case 1: 465 pvr &= SAB_PVR_DSR_A; 466 break; 467 case 2: 468 pvr &= SAB_PVR_DSR_B; 469 break; 470 } 471 SIGCHG(pvr, sig, SER_DSR, SER_DDSR); | 458 star = uart_getreg(bas, SAB_STAR); 459 SIGCHG(star & SAB_STAR_CTS, sig, SER_CTS, SER_DCTS); 460 vstr = uart_getreg(bas, SAB_VSTR); 461 SIGCHG(vstr & SAB_VSTR_CD, sig, SER_DCD, SER_DDCD); 462 pvr = ~uart_getreg(bas, SAB_PVR); 463 switch (bas->chan) { 464 case 1: 465 pvr &= SAB_PVR_DSR_A; 466 break; 467 case 2: 468 pvr &= SAB_PVR_DSR_B; 469 break; 470 } 471 SIGCHG(pvr, sig, SER_DSR, SER_DDSR); |
472 mtx_unlock_spin(&sc->sc_hwmtx); | 472 uart_unlock(sc->sc_hwmtx); |
473 new = sig & ~SER_MASK_DELTA; 474 } while (!atomic_cmpset_32(&sc->sc_hwsig, old, new)); 475 return (sig); 476} 477 478static int 479sab82532_bus_ioctl(struct uart_softc *sc, int request, intptr_t data) 480{ 481 struct uart_bas *bas; 482 uint8_t dafo, mode; 483 int error; 484 485 bas = &sc->sc_bas; 486 error = 0; | 473 new = sig & ~SER_MASK_DELTA; 474 } while (!atomic_cmpset_32(&sc->sc_hwsig, old, new)); 475 return (sig); 476} 477 478static int 479sab82532_bus_ioctl(struct uart_softc *sc, int request, intptr_t data) 480{ 481 struct uart_bas *bas; 482 uint8_t dafo, mode; 483 int error; 484 485 bas = &sc->sc_bas; 486 error = 0; |
487 mtx_lock_spin(&sc->sc_hwmtx); | 487 uart_lock(sc->sc_hwmtx); |
488 switch (request) { 489 case UART_IOCTL_BREAK: 490 dafo = uart_getreg(bas, SAB_DAFO); 491 if (data) 492 dafo |= SAB_DAFO_XBRK; 493 else 494 dafo &= ~SAB_DAFO_XBRK; 495 uart_setreg(bas, SAB_DAFO, dafo); --- 19 unchanged lines hidden (view full) --- 515 mode |= SAB_MODE_FCTS; 516 uart_setreg(bas, SAB_MODE, mode); 517 uart_barrier(bas); 518 break; 519 default: 520 error = EINVAL; 521 break; 522 } | 488 switch (request) { 489 case UART_IOCTL_BREAK: 490 dafo = uart_getreg(bas, SAB_DAFO); 491 if (data) 492 dafo |= SAB_DAFO_XBRK; 493 else 494 dafo &= ~SAB_DAFO_XBRK; 495 uart_setreg(bas, SAB_DAFO, dafo); --- 19 unchanged lines hidden (view full) --- 515 mode |= SAB_MODE_FCTS; 516 uart_setreg(bas, SAB_MODE, mode); 517 uart_barrier(bas); 518 break; 519 default: 520 error = EINVAL; 521 break; 522 } |
523 mtx_unlock_spin(&sc->sc_hwmtx); | 523 uart_unlock(sc->sc_hwmtx); |
524 return (error); 525} 526 527static int 528sab82532_bus_ipend(struct uart_softc *sc) 529{ 530 struct uart_bas *bas; 531 int ipend; 532 uint8_t isr0, isr1; 533 534 bas = &sc->sc_bas; | 524 return (error); 525} 526 527static int 528sab82532_bus_ipend(struct uart_softc *sc) 529{ 530 struct uart_bas *bas; 531 int ipend; 532 uint8_t isr0, isr1; 533 534 bas = &sc->sc_bas; |
535 mtx_lock_spin(&sc->sc_hwmtx); | 535 uart_lock(sc->sc_hwmtx); |
536 isr0 = uart_getreg(bas, SAB_ISR0); 537 isr1 = uart_getreg(bas, SAB_ISR1); 538 uart_barrier(bas); 539 if (isr0 & SAB_ISR0_TIME) { 540 while (uart_getreg(bas, SAB_STAR) & SAB_STAR_CEC) 541 ; 542 uart_setreg(bas, SAB_CMDR, SAB_CMDR_RFRD); 543 uart_barrier(bas); 544 } | 536 isr0 = uart_getreg(bas, SAB_ISR0); 537 isr1 = uart_getreg(bas, SAB_ISR1); 538 uart_barrier(bas); 539 if (isr0 & SAB_ISR0_TIME) { 540 while (uart_getreg(bas, SAB_STAR) & SAB_STAR_CEC) 541 ; 542 uart_setreg(bas, SAB_CMDR, SAB_CMDR_RFRD); 543 uart_barrier(bas); 544 } |
545 mtx_unlock_spin(&sc->sc_hwmtx); | 545 uart_unlock(sc->sc_hwmtx); |
546 547 ipend = 0; 548 if (isr1 & SAB_ISR1_BRKT) 549 ipend |= SER_INT_BREAK; 550 if (isr0 & SAB_ISR0_RFO) 551 ipend |= SER_INT_OVERRUN; 552 if (isr0 & (SAB_ISR0_TCD|SAB_ISR0_RPF)) 553 ipend |= SER_INT_RXREADY; --- 8 unchanged lines hidden (view full) --- 562static int 563sab82532_bus_param(struct uart_softc *sc, int baudrate, int databits, 564 int stopbits, int parity) 565{ 566 struct uart_bas *bas; 567 int error; 568 569 bas = &sc->sc_bas; | 546 547 ipend = 0; 548 if (isr1 & SAB_ISR1_BRKT) 549 ipend |= SER_INT_BREAK; 550 if (isr0 & SAB_ISR0_RFO) 551 ipend |= SER_INT_OVERRUN; 552 if (isr0 & (SAB_ISR0_TCD|SAB_ISR0_RPF)) 553 ipend |= SER_INT_RXREADY; --- 8 unchanged lines hidden (view full) --- 562static int 563sab82532_bus_param(struct uart_softc *sc, int baudrate, int databits, 564 int stopbits, int parity) 565{ 566 struct uart_bas *bas; 567 int error; 568 569 bas = &sc->sc_bas; |
570 mtx_lock_spin(&sc->sc_hwmtx); | 570 uart_lock(sc->sc_hwmtx); |
571 error = sab82532_param(bas, baudrate, databits, stopbits, parity); | 571 error = sab82532_param(bas, baudrate, databits, stopbits, parity); |
572 mtx_unlock_spin(&sc->sc_hwmtx); | 572 uart_unlock(sc->sc_hwmtx); |
573 return (error); 574} 575 576static int 577sab82532_bus_probe(struct uart_softc *sc) 578{ 579 char buf[80]; 580 const char *vstr; --- 31 unchanged lines hidden (view full) --- 612static int 613sab82532_bus_receive(struct uart_softc *sc) 614{ 615 struct uart_bas *bas; 616 int i, rbcl, xc; 617 uint8_t s; 618 619 bas = &sc->sc_bas; | 573 return (error); 574} 575 576static int 577sab82532_bus_probe(struct uart_softc *sc) 578{ 579 char buf[80]; 580 const char *vstr; --- 31 unchanged lines hidden (view full) --- 612static int 613sab82532_bus_receive(struct uart_softc *sc) 614{ 615 struct uart_bas *bas; 616 int i, rbcl, xc; 617 uint8_t s; 618 619 bas = &sc->sc_bas; |
620 mtx_lock_spin(&sc->sc_hwmtx); | 620 uart_lock(sc->sc_hwmtx); |
621 if (uart_getreg(bas, SAB_STAR) & SAB_STAR_RFNE) { 622 rbcl = uart_getreg(bas, SAB_RBCL) & 31; 623 if (rbcl == 0) 624 rbcl = 32; 625 for (i = 0; i < rbcl; i += 2) { 626 if (uart_rx_full(sc)) { 627 sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN; 628 break; --- 7 unchanged lines hidden (view full) --- 636 uart_rx_put(sc, xc); 637 } 638 } 639 640 while (uart_getreg(bas, SAB_STAR) & SAB_STAR_CEC) 641 ; 642 uart_setreg(bas, SAB_CMDR, SAB_CMDR_RMC); 643 uart_barrier(bas); | 621 if (uart_getreg(bas, SAB_STAR) & SAB_STAR_RFNE) { 622 rbcl = uart_getreg(bas, SAB_RBCL) & 31; 623 if (rbcl == 0) 624 rbcl = 32; 625 for (i = 0; i < rbcl; i += 2) { 626 if (uart_rx_full(sc)) { 627 sc->sc_rxbuf[sc->sc_rxput] = UART_STAT_OVERRUN; 628 break; --- 7 unchanged lines hidden (view full) --- 636 uart_rx_put(sc, xc); 637 } 638 } 639 640 while (uart_getreg(bas, SAB_STAR) & SAB_STAR_CEC) 641 ; 642 uart_setreg(bas, SAB_CMDR, SAB_CMDR_RMC); 643 uart_barrier(bas); |
644 mtx_unlock_spin(&sc->sc_hwmtx); | 644 uart_unlock(sc->sc_hwmtx); |
645 return (0); 646} 647 648static int 649sab82532_bus_setsig(struct uart_softc *sc, int sig) 650{ 651 struct uart_bas *bas; 652 uint32_t new, old; --- 8 unchanged lines hidden (view full) --- 661 SER_DDTR); 662 } 663 if (sig & SER_DRTS) { 664 SIGCHG(sig & SER_RTS, new, SER_RTS, 665 SER_DRTS); 666 } 667 } while (!atomic_cmpset_32(&sc->sc_hwsig, old, new)); 668 | 645 return (0); 646} 647 648static int 649sab82532_bus_setsig(struct uart_softc *sc, int sig) 650{ 651 struct uart_bas *bas; 652 uint32_t new, old; --- 8 unchanged lines hidden (view full) --- 661 SER_DDTR); 662 } 663 if (sig & SER_DRTS) { 664 SIGCHG(sig & SER_RTS, new, SER_RTS, 665 SER_DRTS); 666 } 667 } while (!atomic_cmpset_32(&sc->sc_hwsig, old, new)); 668 |
669 mtx_lock_spin(&sc->sc_hwmtx); | 669 uart_lock(sc->sc_hwmtx); |
670 /* Set DTR pin. */ 671 pvr = uart_getreg(bas, SAB_PVR); 672 switch (bas->chan) { 673 case 1: 674 if (new & SER_DTR) 675 pvr &= ~SAB_PVR_DTR_A; 676 else 677 pvr |= SAB_PVR_DTR_A; --- 10 unchanged lines hidden (view full) --- 688 /* Set RTS pin. */ 689 mode = uart_getreg(bas, SAB_MODE); 690 if (new & SER_RTS) 691 mode &= ~SAB_MODE_FRTS; 692 else 693 mode |= SAB_MODE_FRTS; 694 uart_setreg(bas, SAB_MODE, mode); 695 uart_barrier(bas); | 670 /* Set DTR pin. */ 671 pvr = uart_getreg(bas, SAB_PVR); 672 switch (bas->chan) { 673 case 1: 674 if (new & SER_DTR) 675 pvr &= ~SAB_PVR_DTR_A; 676 else 677 pvr |= SAB_PVR_DTR_A; --- 10 unchanged lines hidden (view full) --- 688 /* Set RTS pin. */ 689 mode = uart_getreg(bas, SAB_MODE); 690 if (new & SER_RTS) 691 mode &= ~SAB_MODE_FRTS; 692 else 693 mode |= SAB_MODE_FRTS; 694 uart_setreg(bas, SAB_MODE, mode); 695 uart_barrier(bas); |
696 mtx_unlock_spin(&sc->sc_hwmtx); | 696 uart_unlock(sc->sc_hwmtx); |
697 return (0); 698} 699 700static int 701sab82532_bus_transmit(struct uart_softc *sc) 702{ 703 struct uart_bas *bas; 704 int i; 705 706 bas = &sc->sc_bas; | 697 return (0); 698} 699 700static int 701sab82532_bus_transmit(struct uart_softc *sc) 702{ 703 struct uart_bas *bas; 704 int i; 705 706 bas = &sc->sc_bas; |
707 mtx_lock_spin(&sc->sc_hwmtx); | 707 uart_lock(sc->sc_hwmtx); |
708 while (!(uart_getreg(bas, SAB_STAR) & SAB_STAR_XFW)) 709 ; 710 for (i = 0; i < sc->sc_txdatasz; i++) 711 uart_setreg(bas, SAB_XFIFO + i, sc->sc_txbuf[i]); 712 uart_barrier(bas); 713 while (uart_getreg(bas, SAB_STAR) & SAB_STAR_CEC) 714 ; 715 uart_setreg(bas, SAB_CMDR, SAB_CMDR_XF); 716 sc->sc_txbusy = 1; | 708 while (!(uart_getreg(bas, SAB_STAR) & SAB_STAR_XFW)) 709 ; 710 for (i = 0; i < sc->sc_txdatasz; i++) 711 uart_setreg(bas, SAB_XFIFO + i, sc->sc_txbuf[i]); 712 uart_barrier(bas); 713 while (uart_getreg(bas, SAB_STAR) & SAB_STAR_CEC) 714 ; 715 uart_setreg(bas, SAB_CMDR, SAB_CMDR_XF); 716 sc->sc_txbusy = 1; |
717 mtx_unlock_spin(&sc->sc_hwmtx); | 717 uart_unlock(sc->sc_hwmtx); |
718 return (0); 719} | 718 return (0); 719} |