1/*-
2 * Copyright (c) 2003 Marcel Moolenaar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
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20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: stable/10/sys/dev/uart/uart_dev_lpc.c 262649 2014-03-01 04:16:54Z imp $");
29
30#include <sys/param.h>
31#include <sys/systm.h>
32#include <sys/bus.h>
33#include <sys/conf.h>
34#include <machine/bus.h>
35
36#include <dev/uart/uart.h>
37#include <dev/uart/uart_cpu.h>
38#include <dev/uart/uart_bus.h>
39
40#include <dev/ic/ns16550.h>
41#include <arm/lpc/lpcreg.h>
42
43#include "uart_if.h"
44
45#define DEFAULT_RCLK (13 * 1000 * 1000)
46#define LPC_UART_NO(_bas) (((_bas->bsh) - LPC_UART_BASE) >> 15)
47
48#define lpc_ns8250_get_auxreg(_bas, _reg) \
49 bus_space_read_4((_bas)->bst, LPC_UART_CONTROL_BASE, _reg)
50#define lpc_ns8250_set_auxreg(_bas, _reg, _val) \
51 bus_space_write_4((_bas)->bst, LPC_UART_CONTROL_BASE, _reg, _val);
52#define lpc_ns8250_get_clkreg(_bas, _reg) \
53 bus_space_read_4((_bas)->bst, LPC_CLKPWR_BASE, (_reg))
54#define lpc_ns8250_set_clkreg(_bas, _reg, _val) \
55 bus_space_write_4((_bas)->bst, LPC_CLKPWR_BASE, (_reg), (_val))
56
57/*
58 * Clear pending interrupts. THRE is cleared by reading IIR. Data
59 * that may have been received gets lost here.
60 */
61static void
62lpc_ns8250_clrint(struct uart_bas *bas)
63{
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288static void
289lpc_ns8250_init(struct uart_bas *bas, int baudrate, int databits, int stopbits,
290 int parity)
291{
292 u_char ier;
293 u_long clkmode;
294
295 /* Enable UART clock */
296 clkmode = lpc_ns8250_get_auxreg(bas, LPC_UART_CLKMODE);
297 lpc_ns8250_set_auxreg(bas, LPC_UART_CLKMODE,
298 clkmode | LPC_UART_CLKMODE_UART5(1));
299#if 0
300 /* Work around H/W bug */
301 uart_setreg(bas, REG_DATA, 0x00);
302#endif
303 if (bas->rclk == 0)
304 bas->rclk = DEFAULT_RCLK;
305 lpc_ns8250_param(bas, baudrate, databits, stopbits, parity);
306
--- 620 unchanged lines hidden ---
2 * Copyright (c) 2003 Marcel Moolenaar
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *
--- 11 unchanged lines hidden (view full) ---
20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD: stable/10/sys/dev/uart/uart_dev_lpc.c 262649 2014-03-01 04:16:54Z imp $");
29
30#include <sys/param.h>
31#include <sys/systm.h>
32#include <sys/bus.h>
33#include <sys/conf.h>
34#include <machine/bus.h>
35
36#include <dev/uart/uart.h>
37#include <dev/uart/uart_cpu.h>
38#include <dev/uart/uart_bus.h>
39
40#include <dev/ic/ns16550.h>
41#include <arm/lpc/lpcreg.h>
42
43#include "uart_if.h"
44
45#define DEFAULT_RCLK (13 * 1000 * 1000)
46#define LPC_UART_NO(_bas) (((_bas->bsh) - LPC_UART_BASE) >> 15)
47
48#define lpc_ns8250_get_auxreg(_bas, _reg) \
49 bus_space_read_4((_bas)->bst, LPC_UART_CONTROL_BASE, _reg)
50#define lpc_ns8250_set_auxreg(_bas, _reg, _val) \
51 bus_space_write_4((_bas)->bst, LPC_UART_CONTROL_BASE, _reg, _val);
52#define lpc_ns8250_get_clkreg(_bas, _reg) \
53 bus_space_read_4((_bas)->bst, LPC_CLKPWR_BASE, (_reg))
54#define lpc_ns8250_set_clkreg(_bas, _reg, _val) \
55 bus_space_write_4((_bas)->bst, LPC_CLKPWR_BASE, (_reg), (_val))
56
57/*
58 * Clear pending interrupts. THRE is cleared by reading IIR. Data
59 * that may have been received gets lost here.
60 */
61static void
62lpc_ns8250_clrint(struct uart_bas *bas)
63{
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288static void
289lpc_ns8250_init(struct uart_bas *bas, int baudrate, int databits, int stopbits,
290 int parity)
291{
292 u_char ier;
293 u_long clkmode;
294
295 /* Enable UART clock */
296 clkmode = lpc_ns8250_get_auxreg(bas, LPC_UART_CLKMODE);
297 lpc_ns8250_set_auxreg(bas, LPC_UART_CLKMODE,
298 clkmode | LPC_UART_CLKMODE_UART5(1));
299#if 0
300 /* Work around H/W bug */
301 uart_setreg(bas, REG_DATA, 0x00);
302#endif
303 if (bas->rclk == 0)
304 bas->rclk = DEFAULT_RCLK;
305 lpc_ns8250_param(bas, baudrate, databits, stopbits, parity);
306
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