87}; 88 89/******************************************************************************** 90 * Accept an open operation on the control device. 91 */ 92static int 93twe_open(dev_t dev, int flags, int fmt, d_thread_t *td) 94{ 95 int unit = minor(dev); 96 struct twe_softc *sc = devclass_get_softc(twe_devclass, unit); 97 98 sc->twe_state |= TWE_STATE_OPEN; 99 return(0); 100} 101 102/******************************************************************************** 103 * Accept the last close on the control device. 104 */ 105static int 106twe_close(dev_t dev, int flags, int fmt, d_thread_t *td) 107{ 108 int unit = minor(dev); 109 struct twe_softc *sc = devclass_get_softc(twe_devclass, unit); 110 111 sc->twe_state &= ~TWE_STATE_OPEN; 112 return (0); 113} 114 115/******************************************************************************** 116 * Handle controller-specific control operations. 117 */ 118static int 119twe_ioctl_wrapper(dev_t dev, u_long cmd, caddr_t addr, int32_t flag, d_thread_t *td) 120{ 121 struct twe_softc *sc = (struct twe_softc *)dev->si_drv1; 122 123 return(twe_ioctl(sc, cmd, addr)); 124} 125 126/******************************************************************************** 127 ******************************************************************************** 128 PCI device interface 129 ******************************************************************************** 130 ********************************************************************************/ 131 132static int twe_probe(device_t dev); 133static int twe_attach(device_t dev); 134static void twe_free(struct twe_softc *sc); 135static int twe_detach(device_t dev); 136static int twe_shutdown(device_t dev); 137static int twe_suspend(device_t dev); 138static int twe_resume(device_t dev); 139static void twe_pci_intr(void *arg); 140static void twe_intrhook(void *arg); 141 142static device_method_t twe_methods[] = { 143 /* Device interface */ 144 DEVMETHOD(device_probe, twe_probe), 145 DEVMETHOD(device_attach, twe_attach), 146 DEVMETHOD(device_detach, twe_detach), 147 DEVMETHOD(device_shutdown, twe_shutdown), 148 DEVMETHOD(device_suspend, twe_suspend), 149 DEVMETHOD(device_resume, twe_resume), 150 151 DEVMETHOD(bus_print_child, bus_generic_print_child), 152 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 153 { 0, 0 } 154}; 155 156static driver_t twe_pci_driver = { 157 "twe", 158 twe_methods, 159 sizeof(struct twe_softc) 160}; 161 162#ifdef TWE_OVERRIDE 163DRIVER_MODULE(Xtwe, pci, twe_pci_driver, twe_devclass, 0, 0); 164#else 165DRIVER_MODULE(twe, pci, twe_pci_driver, twe_devclass, 0, 0); 166#endif 167 168/******************************************************************************** 169 * Match a 3ware Escalade ATA RAID controller. 170 */ 171static int 172twe_probe(device_t dev) 173{ 174 175 debug_called(4); 176 177 if ((pci_get_vendor(dev) == TWE_VENDOR_ID) && 178 ((pci_get_device(dev) == TWE_DEVICE_ID) || 179 (pci_get_device(dev) == TWE_DEVICE_ID_ASIC))) { 180 device_set_desc(dev, TWE_DEVICE_NAME); 181#ifdef TWE_OVERRIDE 182 return(0); 183#else 184 return(-10); 185#endif 186 } 187 return(ENXIO); 188} 189 190/******************************************************************************** 191 * Allocate resources, initialise the controller. 192 */ 193static int 194twe_attach(device_t dev) 195{ 196 struct twe_softc *sc; 197 int rid, error; 198 u_int32_t command; 199 200 debug_called(4); 201 202 /* 203 * Initialise the softc structure. 204 */ 205 sc = device_get_softc(dev); 206 sc->twe_dev = dev; 207 208 /* 209 * Make sure we are going to be able to talk to this board. 210 */ 211 command = pci_read_config(dev, PCIR_COMMAND, 2); 212 if ((command & PCIM_CMD_PORTEN) == 0) { 213 twe_printf(sc, "register window not available\n"); 214 return(ENXIO); 215 } 216 /* 217 * Force the busmaster enable bit on, in case the BIOS forgot. 218 */ 219 command |= PCIM_CMD_BUSMASTEREN; 220 pci_write_config(dev, PCIR_COMMAND, command, 2); 221 222 /* 223 * Allocate the PCI register window. 224 */ 225 rid = TWE_IO_CONFIG_REG; 226 if ((sc->twe_io = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 0, ~0, 1, RF_ACTIVE)) == NULL) { 227 twe_printf(sc, "can't allocate register window\n"); 228 twe_free(sc); 229 return(ENXIO); 230 } 231 sc->twe_btag = rman_get_bustag(sc->twe_io); 232 sc->twe_bhandle = rman_get_bushandle(sc->twe_io); 233 234 /* 235 * Allocate the parent bus DMA tag appropriate for PCI. 236 */ 237 if (bus_dma_tag_create(NULL, /* parent */ 238 1, 0, /* alignment, boundary */ 239 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 240 BUS_SPACE_MAXADDR, /* highaddr */ 241 NULL, NULL, /* filter, filterarg */ 242 MAXBSIZE, TWE_MAX_SGL_LENGTH, /* maxsize, nsegments */ 243 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ 244 BUS_DMA_ALLOCNOW, /* flags */ 245 &sc->twe_parent_dmat)) { 246 twe_printf(sc, "can't allocate parent DMA tag\n"); 247 twe_free(sc); 248 return(ENOMEM); 249 } 250 251 /* 252 * Allocate and connect our interrupt. 253 */ 254 rid = 0; 255 if ((sc->twe_irq = bus_alloc_resource(sc->twe_dev, SYS_RES_IRQ, &rid, 0, ~0, 1, RF_SHAREABLE | RF_ACTIVE)) == NULL) { 256 twe_printf(sc, "can't allocate interrupt\n"); 257 twe_free(sc); 258 return(ENXIO); 259 } 260 if (bus_setup_intr(sc->twe_dev, sc->twe_irq, INTR_TYPE_BIO | INTR_ENTROPY, twe_pci_intr, sc, &sc->twe_intr)) { 261 twe_printf(sc, "can't set up interrupt\n"); 262 twe_free(sc); 263 return(ENXIO); 264 } 265 266 /* 267 * Create DMA tag for mapping objects into controller-addressable space. 268 */ 269 if (bus_dma_tag_create(sc->twe_parent_dmat, /* parent */ 270 1, 0, /* alignment, boundary */ 271 BUS_SPACE_MAXADDR, /* lowaddr */ 272 BUS_SPACE_MAXADDR, /* highaddr */ 273 NULL, NULL, /* filter, filterarg */ 274 MAXBSIZE, TWE_MAX_SGL_LENGTH,/* maxsize, nsegments */ 275 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ 276 0, /* flags */ 277 &sc->twe_buffer_dmat)) { 278 twe_printf(sc, "can't allocate data buffer DMA tag\n"); 279 twe_free(sc); 280 return(ENOMEM); 281 } 282 283 /* 284 * Initialise the controller and driver core. 285 */ 286 if ((error = twe_setup(sc))) 287 return(error); 288 289 /* 290 * Print some information about the controller and configuration. 291 */ 292 twe_describe_controller(sc); 293 294 /* 295 * Create the control device. 296 */ 297 sc->twe_dev_t = make_dev(&twe_cdevsw, device_get_unit(sc->twe_dev), UID_ROOT, GID_OPERATOR, 298 S_IRUSR | S_IWUSR, "twe%d", device_get_unit(sc->twe_dev)); 299 sc->twe_dev_t->si_drv1 = sc; 300 /* 301 * Schedule ourselves to bring the controller up once interrupts are available. 302 * This isn't strictly necessary, since we disable interrupts while probing the 303 * controller, but it is more in keeping with common practice for other disk 304 * devices. 305 */ 306 sc->twe_ich.ich_func = twe_intrhook; 307 sc->twe_ich.ich_arg = sc; 308 if (config_intrhook_establish(&sc->twe_ich) != 0) { 309 twe_printf(sc, "can't establish configuration hook\n"); 310 twe_free(sc); 311 return(ENXIO); 312 } 313 314 return(0); 315} 316 317/******************************************************************************** 318 * Free all of the resources associated with (sc). 319 * 320 * Should not be called if the controller is active. 321 */ 322static void 323twe_free(struct twe_softc *sc) 324{ 325 struct twe_request *tr; 326 327 debug_called(4); 328 329 /* throw away any command buffers */ 330 while ((tr = twe_dequeue_free(sc)) != NULL) 331 twe_free_request(tr); 332 333 /* destroy the data-transfer DMA tag */ 334 if (sc->twe_buffer_dmat) 335 bus_dma_tag_destroy(sc->twe_buffer_dmat); 336 337 /* disconnect the interrupt handler */ 338 if (sc->twe_intr) 339 bus_teardown_intr(sc->twe_dev, sc->twe_irq, sc->twe_intr); 340 if (sc->twe_irq != NULL) 341 bus_release_resource(sc->twe_dev, SYS_RES_IRQ, 0, sc->twe_irq); 342 343 /* destroy the parent DMA tag */ 344 if (sc->twe_parent_dmat) 345 bus_dma_tag_destroy(sc->twe_parent_dmat); 346 347 /* release the register window mapping */ 348 if (sc->twe_io != NULL) 349 bus_release_resource(sc->twe_dev, SYS_RES_IOPORT, TWE_IO_CONFIG_REG, sc->twe_io); 350 351 /* destroy control device */ 352 if (sc->twe_dev_t != (dev_t)NULL) 353 destroy_dev(sc->twe_dev_t); 354} 355 356/******************************************************************************** 357 * Disconnect from the controller completely, in preparation for unload. 358 */ 359static int 360twe_detach(device_t dev) 361{ 362 struct twe_softc *sc = device_get_softc(dev); 363 int s, error; 364 365 debug_called(4); 366 367 error = EBUSY; 368 s = splbio(); 369 if (sc->twe_state & TWE_STATE_OPEN) 370 goto out; 371 372 /* 373 * Shut the controller down. 374 */ 375 if ((error = twe_shutdown(dev))) 376 goto out; 377 378 twe_free(sc); 379 380 error = 0; 381 out: 382 splx(s); 383 return(error); 384} 385 386/******************************************************************************** 387 * Bring the controller down to a dormant state and detach all child devices. 388 * 389 * Note that we can assume that the bioq on the controller is empty, as we won't 390 * allow shutdown if any device is open. 391 */ 392static int 393twe_shutdown(device_t dev) 394{ 395 struct twe_softc *sc = device_get_softc(dev); 396 int i, s, error; 397 398 debug_called(4); 399 400 s = splbio(); 401 error = 0; 402 403 /* 404 * Delete all our child devices. 405 */ 406 for (i = 0; i < TWE_MAX_UNITS; i++) { 407 if (sc->twe_drive[i].td_disk != 0) { 408 if ((error = device_delete_child(sc->twe_dev, sc->twe_drive[i].td_disk)) != 0) 409 goto out; 410 sc->twe_drive[i].td_disk = 0; 411 } 412 } 413 414 /* 415 * Bring the controller down. 416 */ 417 twe_deinit(sc); 418 419 out: 420 splx(s); 421 return(error); 422} 423 424/******************************************************************************** 425 * Bring the controller to a quiescent state, ready for system suspend. 426 */ 427static int 428twe_suspend(device_t dev) 429{ 430 struct twe_softc *sc = device_get_softc(dev); 431 int s; 432 433 debug_called(4); 434 435 s = splbio(); 436 sc->twe_state |= TWE_STATE_SUSPEND; 437 438 twe_disable_interrupts(sc); 439 splx(s); 440 441 return(0); 442} 443 444/******************************************************************************** 445 * Bring the controller back to a state ready for operation. 446 */ 447static int 448twe_resume(device_t dev) 449{ 450 struct twe_softc *sc = device_get_softc(dev); 451 452 debug_called(4); 453 454 sc->twe_state &= ~TWE_STATE_SUSPEND; 455 twe_enable_interrupts(sc); 456 457 return(0); 458} 459 460/******************************************************************************* 461 * Take an interrupt, or be poked by other code to look for interrupt-worthy 462 * status. 463 */ 464static void 465twe_pci_intr(void *arg) 466{ 467 twe_intr((struct twe_softc *)arg); 468} 469 470/******************************************************************************** 471 * Delayed-startup hook 472 */ 473static void 474twe_intrhook(void *arg) 475{ 476 struct twe_softc *sc = (struct twe_softc *)arg; 477 478 /* pull ourselves off the intrhook chain */ 479 config_intrhook_disestablish(&sc->twe_ich); 480 481 /* call core startup routine */ 482 twe_init(sc); 483} 484 485/******************************************************************************** 486 * Given a detected drive, attach it to the bio interface. 487 * 488 * This is called from twe_init. 489 */ 490void 491twe_attach_drive(struct twe_softc *sc, struct twe_drive *dr) 492{ 493 char buf[80]; 494 int error; 495 496 dr->td_disk = device_add_child(sc->twe_dev, NULL, -1); 497 if (dr->td_disk == NULL) { 498 twe_printf(sc, "device_add_child failed\n"); 499 return; 500 } 501 device_set_ivars(dr->td_disk, dr); 502 503 /* 504 * XXX It would make sense to test the online/initialising bits, but they seem to be 505 * always set... 506 */ 507 sprintf(buf, "%s, %s", twe_describe_code(twe_table_unittype, dr->td_type), 508 twe_describe_code(twe_table_unitstate, dr->td_state & TWE_PARAM_UNITSTATUS_MASK)); 509 device_set_desc_copy(dr->td_disk, buf); 510 511 if ((error = bus_generic_attach(sc->twe_dev)) != 0) 512 twe_printf(sc, "bus_generic_attach returned %d\n", error); 513} 514 515/******************************************************************************** 516 * Clear a PCI parity error. 517 */ 518void 519twe_clear_pci_parity_error(struct twe_softc *sc) 520{ 521 TWE_CONTROL(sc, TWE_CONTROL_CLEAR_PARITY_ERROR); 522 pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PARITY_ERROR, 2); 523} 524 525/******************************************************************************** 526 * Clear a PCI abort. 527 */ 528void 529twe_clear_pci_abort(struct twe_softc *sc) 530{ 531 TWE_CONTROL(sc, TWE_CONTROL_CLEAR_PCI_ABORT); 532 pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PCI_ABORT, 2); 533} 534 535/******************************************************************************** 536 ******************************************************************************** 537 Disk device 538 ******************************************************************************** 539 ********************************************************************************/ 540 541/* 542 * Disk device softc 543 */ 544struct twed_softc 545{ 546 device_t twed_dev; 547 struct twe_softc *twed_controller; /* parent device softc */ 548 struct twe_drive *twed_drive; /* drive data in parent softc */ 549 struct disk twed_disk; /* generic disk handle */ 550 struct devstat twed_stats; /* accounting */ 551}; 552 553/* 554 * Disk device bus interface 555 */ 556static int twed_probe(device_t dev); 557static int twed_attach(device_t dev); 558static int twed_detach(device_t dev); 559 560static device_method_t twed_methods[] = { 561 DEVMETHOD(device_probe, twed_probe), 562 DEVMETHOD(device_attach, twed_attach), 563 DEVMETHOD(device_detach, twed_detach), 564 { 0, 0 } 565}; 566 567static driver_t twed_driver = { 568 "twed", 569 twed_methods, 570 sizeof(struct twed_softc) 571}; 572 573static devclass_t twed_devclass; 574#ifdef TWE_OVERRIDE 575DRIVER_MODULE(Xtwed, Xtwe, twed_driver, twed_devclass, 0, 0); 576#else 577DRIVER_MODULE(twed, twe, twed_driver, twed_devclass, 0, 0); 578#endif 579 580/* 581 * Disk device control interface. 582 */ 583 584#ifdef FREEBSD_4 585static int disks_registered = 0; 586#endif 587 588/******************************************************************************** 589 * Handle open from generic layer. 590 * 591 * Note that this is typically only called by the diskslice code, and not 592 * for opens on subdevices (eg. slices, partitions). 593 */ 594static int 595twed_open(struct disk *dp) 596{ 597 struct twed_softc *sc = (struct twed_softc *)dp->d_drv1; 598 599 debug_called(4); 600 601 if (sc == NULL) 602 return (ENXIO); 603 604 /* check that the controller is up and running */ 605 if (sc->twed_controller->twe_state & TWE_STATE_SHUTDOWN) 606 return(ENXIO); 607 608 return (0); 609} 610 611/******************************************************************************** 612 * Handle an I/O request. 613 */ 614static void 615twed_strategy(twe_bio *bp) 616{ 617 struct twed_softc *sc = (struct twed_softc *)TWE_BIO_SOFTC(bp); 618 619 debug_called(4); 620 621 TWED_BIO_IN; 622 623 /* bogus disk? */ 624 if (sc == NULL) { 625 TWE_BIO_SET_ERROR(bp, EINVAL); 626 printf("twe: bio for invalid disk!\n"); 627 TWE_BIO_DONE(bp); 628 TWED_BIO_OUT; 629 return; 630 } 631 632 /* perform accounting */ 633 TWE_BIO_STATS_START(bp); 634 635 /* queue the bio on the controller */ 636 twe_enqueue_bio(sc->twed_controller, bp); 637 638 /* poke the controller to start I/O */ 639 twe_startio(sc->twed_controller); 640 return; 641} 642 643/******************************************************************************** 644 * System crashdump support 645 */ 646static int 647twed_dump(void *arg, void *virtual, vm_offset_t physical, off_t offset, size_t length) 648{ 649 struct twed_softc *twed_sc; 650 struct twe_softc *twe_sc; 651 int error; 652 struct disk *dp; 653 654 dp = arg; 655 twed_sc = (struct twed_softc *)dp->d_drv1; 656 twe_sc = (struct twe_softc *)twed_sc->twed_controller; 657 if (!twed_sc || !twe_sc) 658 return(ENXIO); 659 660 if (length > 0) { 661 if ((error = twe_dump_blocks(twe_sc, twed_sc->twed_drive->td_unit, offset / TWE_BLOCK_SIZE, virtual, length / TWE_BLOCK_SIZE)) != 0) 662 return(error); 663 } 664 return(0); 665} 666 667/******************************************************************************** 668 * Handle completion of an I/O request. 669 */ 670void 671twed_intr(twe_bio *bp) 672{ 673 debug_called(4); 674 675 /* if no error, transfer completed */ 676 if (!TWE_BIO_HAS_ERROR(bp)) 677 TWE_BIO_RESID(bp) = 0; 678 679 TWE_BIO_STATS_END(bp); 680 TWE_BIO_DONE(bp); 681 TWED_BIO_OUT; 682} 683 684/******************************************************************************** 685 * Default probe stub. 686 */ 687static int 688twed_probe(device_t dev) 689{ 690 return (0); 691} 692 693/******************************************************************************** 694 * Attach a unit to the controller. 695 */ 696static int 697twed_attach(device_t dev) 698{ 699 struct twed_softc *sc; 700 device_t parent; 701 702 debug_called(4); 703 704 /* initialise our softc */ 705 sc = device_get_softc(dev); 706 parent = device_get_parent(dev); 707 sc->twed_controller = (struct twe_softc *)device_get_softc(parent); 708 sc->twed_drive = device_get_ivars(dev); 709 sc->twed_dev = dev; 710 711 /* report the drive */ 712 twed_printf(sc, "%uMB (%u sectors)\n", 713 sc->twed_drive->td_size / ((1024 * 1024) / TWE_BLOCK_SIZE), 714 sc->twed_drive->td_size); 715 716 devstat_add_entry(&sc->twed_stats, "twed", device_get_unit(dev), TWE_BLOCK_SIZE, 717 DEVSTAT_NO_ORDERED_TAGS, 718 DEVSTAT_TYPE_STORARRAY | DEVSTAT_TYPE_IF_OTHER, 719 DEVSTAT_PRIORITY_ARRAY); 720 721 /* attach a generic disk device to ourselves */ 722 723 sc->twed_disk.d_open = twed_open; 724 sc->twed_disk.d_strategy = twed_strategy; 725 sc->twed_disk.d_dump = (dumper_t *)twed_dump; 726 sc->twed_disk.d_name = "twed"; 727 sc->twed_disk.d_drv1 = sc; 728 sc->twed_disk.d_maxsize = (TWE_MAX_SGL_LENGTH - 1) * PAGE_SIZE; 729 sc->twed_disk.d_sectorsize = TWE_BLOCK_SIZE; 730 sc->twed_disk.d_mediasize = TWE_BLOCK_SIZE * (off_t)sc->twed_drive->td_size; 731 sc->twed_disk.d_fwsectors = sc->twed_drive->td_sectors; 732 sc->twed_disk.d_fwheads = sc->twed_drive->td_heads; 733 734 disk_create(device_get_unit(dev), &sc->twed_disk, 0, NULL, NULL); 735#ifdef FREEBSD_4 736 disks_registered++; 737#endif 738 739 /* set the maximum I/O size to the theoretical maximum allowed by the S/G list size */ 740 741 return (0); 742} 743 744/******************************************************************************** 745 * Disconnect ourselves from the system. 746 */ 747static int 748twed_detach(device_t dev) 749{ 750 struct twed_softc *sc = (struct twed_softc *)device_get_softc(dev); 751 752 debug_called(4); 753 754 if (sc->twed_disk.d_flags & DISKFLAG_OPEN) 755 return(EBUSY); 756 757 devstat_remove_entry(&sc->twed_stats); 758#ifdef FREEBSD_4 759 if (--disks_registered == 0) 760 cdevsw_remove(&tweddisk_cdevsw); 761#else 762 disk_destroy(&sc->twed_disk); 763#endif 764 765 return(0); 766} 767 768/******************************************************************************** 769 ******************************************************************************** 770 Misc 771 ******************************************************************************** 772 ********************************************************************************/ 773 774static void twe_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error); 775static void twe_setup_request_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error); 776 777/******************************************************************************** 778 * Allocate a command buffer 779 */ 780MALLOC_DEFINE(TWE_MALLOC_CLASS, "twe commands", "twe commands"); 781 782struct twe_request * 783twe_allocate_request(struct twe_softc *sc) 784{ 785 struct twe_request *tr; 786 787 if ((tr = malloc(sizeof(struct twe_request), TWE_MALLOC_CLASS, M_NOWAIT)) == NULL) 788 return(NULL); 789 bzero(tr, sizeof(*tr)); 790 tr->tr_sc = sc; 791 if (bus_dmamap_create(sc->twe_buffer_dmat, 0, &tr->tr_cmdmap)) { 792 twe_free_request(tr); 793 return(NULL); 794 } 795 if (bus_dmamap_create(sc->twe_buffer_dmat, 0, &tr->tr_dmamap)) { 796 bus_dmamap_destroy(sc->twe_buffer_dmat, tr->tr_cmdmap); 797 twe_free_request(tr); 798 return(NULL); 799 } 800 return(tr); 801} 802 803/******************************************************************************** 804 * Permanently discard a command buffer. 805 */ 806void 807twe_free_request(struct twe_request *tr) 808{ 809 struct twe_softc *sc = tr->tr_sc; 810 811 debug_called(4); 812 813 bus_dmamap_destroy(sc->twe_buffer_dmat, tr->tr_cmdmap); 814 bus_dmamap_destroy(sc->twe_buffer_dmat, tr->tr_dmamap); 815 free(tr, TWE_MALLOC_CLASS); 816} 817 818/******************************************************************************** 819 * Map/unmap (tr)'s command and data in the controller's addressable space. 820 * 821 * These routines ensure that the data which the controller is going to try to 822 * access is actually visible to the controller, in a machine-independant 823 * fashion. Due to a hardware limitation, I/O buffers must be 512-byte aligned 824 * and we take care of that here as well. 825 */ 826static void 827twe_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error) 828{ 829 struct twe_request *tr = (struct twe_request *)arg; 830 TWE_Command *cmd = &tr->tr_command; 831 int i; 832 833 debug_called(4); 834 835 /* save base of first segment in command (applicable if there only one segment) */ 836 tr->tr_dataphys = segs[0].ds_addr; 837 838 /* correct command size for s/g list size */ 839 tr->tr_command.generic.size += 2 * nsegments; 840 841 /* 842 * Due to the fact that parameter and I/O commands have the scatter/gather list in 843 * different places, we need to determine which sort of command this actually is 844 * before we can populate it correctly. 845 */ 846 switch(cmd->generic.opcode) { 847 case TWE_OP_GET_PARAM: 848 case TWE_OP_SET_PARAM: 849 cmd->generic.sgl_offset = 2; 850 for (i = 0; i < nsegments; i++) { 851 cmd->param.sgl[i].address = segs[i].ds_addr; 852 cmd->param.sgl[i].length = segs[i].ds_len; 853 } 854 for (; i < TWE_MAX_SGL_LENGTH; i++) { /* XXX necessary? */ 855 cmd->param.sgl[i].address = 0; 856 cmd->param.sgl[i].length = 0; 857 } 858 break; 859 case TWE_OP_READ: 860 case TWE_OP_WRITE: 861 cmd->generic.sgl_offset = 3; 862 for (i = 0; i < nsegments; i++) { 863 cmd->io.sgl[i].address = segs[i].ds_addr; 864 cmd->io.sgl[i].length = segs[i].ds_len; 865 } 866 for (; i < TWE_MAX_SGL_LENGTH; i++) { /* XXX necessary? */ 867 cmd->io.sgl[i].address = 0; 868 cmd->io.sgl[i].length = 0; 869 } 870 break; 871 default: 872 /* no s/g list, nothing to do */ 873 break; 874 } 875} 876 877static void 878twe_setup_request_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error) 879{ 880 struct twe_request *tr = (struct twe_request *)arg; 881 882 debug_called(4); 883 884 /* command can't cross a page boundary */ 885 tr->tr_cmdphys = segs[0].ds_addr; 886} 887 888void 889twe_map_request(struct twe_request *tr) 890{ 891 struct twe_softc *sc = tr->tr_sc; 892 893 debug_called(4); 894 895 896 /* 897 * Map the command into bus space. 898 */ 899 bus_dmamap_load(sc->twe_buffer_dmat, tr->tr_cmdmap, &tr->tr_command, sizeof(tr->tr_command), 900 twe_setup_request_dmamap, tr, 0); 901 bus_dmamap_sync(sc->twe_buffer_dmat, tr->tr_cmdmap, BUS_DMASYNC_PREWRITE); 902 903 /* 904 * If the command involves data, map that too. 905 */ 906 if (tr->tr_data != NULL) { 907 908 /* 909 * Data must be 64-byte aligned; allocate a fixup buffer if it's not. 910 */ 911 if (((vm_offset_t)tr->tr_data % TWE_ALIGNMENT) != 0) { 912 tr->tr_realdata = tr->tr_data; /* save pointer to 'real' data */ 913 tr->tr_flags |= TWE_CMD_ALIGNBUF; 914 tr->tr_data = malloc(tr->tr_length, TWE_MALLOC_CLASS, M_NOWAIT); /* XXX check result here */ 915 } 916 917 /* 918 * Map the data buffer into bus space and build the s/g list. 919 */ 920 bus_dmamap_load(sc->twe_buffer_dmat, tr->tr_dmamap, tr->tr_data, tr->tr_length, 921 twe_setup_data_dmamap, tr, 0); 922 if (tr->tr_flags & TWE_CMD_DATAIN) 923 bus_dmamap_sync(sc->twe_buffer_dmat, tr->tr_dmamap, BUS_DMASYNC_PREREAD); 924 if (tr->tr_flags & TWE_CMD_DATAOUT) { 925 /* if we're using an alignment buffer, and we're writing data, copy the real data out */ 926 if (tr->tr_flags & TWE_CMD_ALIGNBUF) 927 bcopy(tr->tr_realdata, tr->tr_data, tr->tr_length); 928 bus_dmamap_sync(sc->twe_buffer_dmat, tr->tr_dmamap, BUS_DMASYNC_PREWRITE); 929 } 930 } 931} 932 933void 934twe_unmap_request(struct twe_request *tr) 935{ 936 struct twe_softc *sc = tr->tr_sc; 937 938 debug_called(4); 939 940 /* 941 * Unmap the command from bus space. 942 */ 943 bus_dmamap_sync(sc->twe_buffer_dmat, tr->tr_cmdmap, BUS_DMASYNC_POSTWRITE); 944 bus_dmamap_unload(sc->twe_buffer_dmat, tr->tr_cmdmap); 945 946 /* 947 * If the command involved data, unmap that too. 948 */ 949 if (tr->tr_data != NULL) { 950 951 if (tr->tr_flags & TWE_CMD_DATAIN) { 952 bus_dmamap_sync(sc->twe_buffer_dmat, tr->tr_dmamap, BUS_DMASYNC_POSTREAD); 953 /* if we're using an alignment buffer, and we're reading data, copy the real data in */ 954 if (tr->tr_flags & TWE_CMD_ALIGNBUF) 955 bcopy(tr->tr_data, tr->tr_realdata, tr->tr_length); 956 } 957 if (tr->tr_flags & TWE_CMD_DATAOUT) 958 bus_dmamap_sync(sc->twe_buffer_dmat, tr->tr_dmamap, BUS_DMASYNC_POSTWRITE); 959 960 bus_dmamap_unload(sc->twe_buffer_dmat, tr->tr_dmamap); 961 } 962 963 /* free alignment buffer if it was used */ 964 if (tr->tr_flags & TWE_CMD_ALIGNBUF) { 965 free(tr->tr_data, TWE_MALLOC_CLASS); 966 tr->tr_data = tr->tr_realdata; /* restore 'real' data pointer */ 967 } 968} 969 970#ifdef TWE_DEBUG 971/******************************************************************************** 972 * Print current controller status, call from DDB. 973 */ 974void 975twe_report(void) 976{ 977 struct twe_softc *sc; 978 int i, s; 979 980 s = splbio(); 981 for (i = 0; (sc = devclass_get_softc(twe_devclass, i)) != NULL; i++) 982 twe_print_controller(sc); 983 printf("twed: total bio count in %u out %u\n", twed_bio_in, twed_bio_out); 984 splx(s); 985} 986#endif
| 79}; 80 81/******************************************************************************** 82 * Accept an open operation on the control device. 83 */ 84static int 85twe_open(dev_t dev, int flags, int fmt, d_thread_t *td) 86{ 87 int unit = minor(dev); 88 struct twe_softc *sc = devclass_get_softc(twe_devclass, unit); 89 90 sc->twe_state |= TWE_STATE_OPEN; 91 return(0); 92} 93 94/******************************************************************************** 95 * Accept the last close on the control device. 96 */ 97static int 98twe_close(dev_t dev, int flags, int fmt, d_thread_t *td) 99{ 100 int unit = minor(dev); 101 struct twe_softc *sc = devclass_get_softc(twe_devclass, unit); 102 103 sc->twe_state &= ~TWE_STATE_OPEN; 104 return (0); 105} 106 107/******************************************************************************** 108 * Handle controller-specific control operations. 109 */ 110static int 111twe_ioctl_wrapper(dev_t dev, u_long cmd, caddr_t addr, int32_t flag, d_thread_t *td) 112{ 113 struct twe_softc *sc = (struct twe_softc *)dev->si_drv1; 114 115 return(twe_ioctl(sc, cmd, addr)); 116} 117 118/******************************************************************************** 119 ******************************************************************************** 120 PCI device interface 121 ******************************************************************************** 122 ********************************************************************************/ 123 124static int twe_probe(device_t dev); 125static int twe_attach(device_t dev); 126static void twe_free(struct twe_softc *sc); 127static int twe_detach(device_t dev); 128static int twe_shutdown(device_t dev); 129static int twe_suspend(device_t dev); 130static int twe_resume(device_t dev); 131static void twe_pci_intr(void *arg); 132static void twe_intrhook(void *arg); 133 134static device_method_t twe_methods[] = { 135 /* Device interface */ 136 DEVMETHOD(device_probe, twe_probe), 137 DEVMETHOD(device_attach, twe_attach), 138 DEVMETHOD(device_detach, twe_detach), 139 DEVMETHOD(device_shutdown, twe_shutdown), 140 DEVMETHOD(device_suspend, twe_suspend), 141 DEVMETHOD(device_resume, twe_resume), 142 143 DEVMETHOD(bus_print_child, bus_generic_print_child), 144 DEVMETHOD(bus_driver_added, bus_generic_driver_added), 145 { 0, 0 } 146}; 147 148static driver_t twe_pci_driver = { 149 "twe", 150 twe_methods, 151 sizeof(struct twe_softc) 152}; 153 154#ifdef TWE_OVERRIDE 155DRIVER_MODULE(Xtwe, pci, twe_pci_driver, twe_devclass, 0, 0); 156#else 157DRIVER_MODULE(twe, pci, twe_pci_driver, twe_devclass, 0, 0); 158#endif 159 160/******************************************************************************** 161 * Match a 3ware Escalade ATA RAID controller. 162 */ 163static int 164twe_probe(device_t dev) 165{ 166 167 debug_called(4); 168 169 if ((pci_get_vendor(dev) == TWE_VENDOR_ID) && 170 ((pci_get_device(dev) == TWE_DEVICE_ID) || 171 (pci_get_device(dev) == TWE_DEVICE_ID_ASIC))) { 172 device_set_desc(dev, TWE_DEVICE_NAME); 173#ifdef TWE_OVERRIDE 174 return(0); 175#else 176 return(-10); 177#endif 178 } 179 return(ENXIO); 180} 181 182/******************************************************************************** 183 * Allocate resources, initialise the controller. 184 */ 185static int 186twe_attach(device_t dev) 187{ 188 struct twe_softc *sc; 189 int rid, error; 190 u_int32_t command; 191 192 debug_called(4); 193 194 /* 195 * Initialise the softc structure. 196 */ 197 sc = device_get_softc(dev); 198 sc->twe_dev = dev; 199 200 /* 201 * Make sure we are going to be able to talk to this board. 202 */ 203 command = pci_read_config(dev, PCIR_COMMAND, 2); 204 if ((command & PCIM_CMD_PORTEN) == 0) { 205 twe_printf(sc, "register window not available\n"); 206 return(ENXIO); 207 } 208 /* 209 * Force the busmaster enable bit on, in case the BIOS forgot. 210 */ 211 command |= PCIM_CMD_BUSMASTEREN; 212 pci_write_config(dev, PCIR_COMMAND, command, 2); 213 214 /* 215 * Allocate the PCI register window. 216 */ 217 rid = TWE_IO_CONFIG_REG; 218 if ((sc->twe_io = bus_alloc_resource(dev, SYS_RES_IOPORT, &rid, 0, ~0, 1, RF_ACTIVE)) == NULL) { 219 twe_printf(sc, "can't allocate register window\n"); 220 twe_free(sc); 221 return(ENXIO); 222 } 223 sc->twe_btag = rman_get_bustag(sc->twe_io); 224 sc->twe_bhandle = rman_get_bushandle(sc->twe_io); 225 226 /* 227 * Allocate the parent bus DMA tag appropriate for PCI. 228 */ 229 if (bus_dma_tag_create(NULL, /* parent */ 230 1, 0, /* alignment, boundary */ 231 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */ 232 BUS_SPACE_MAXADDR, /* highaddr */ 233 NULL, NULL, /* filter, filterarg */ 234 MAXBSIZE, TWE_MAX_SGL_LENGTH, /* maxsize, nsegments */ 235 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ 236 BUS_DMA_ALLOCNOW, /* flags */ 237 &sc->twe_parent_dmat)) { 238 twe_printf(sc, "can't allocate parent DMA tag\n"); 239 twe_free(sc); 240 return(ENOMEM); 241 } 242 243 /* 244 * Allocate and connect our interrupt. 245 */ 246 rid = 0; 247 if ((sc->twe_irq = bus_alloc_resource(sc->twe_dev, SYS_RES_IRQ, &rid, 0, ~0, 1, RF_SHAREABLE | RF_ACTIVE)) == NULL) { 248 twe_printf(sc, "can't allocate interrupt\n"); 249 twe_free(sc); 250 return(ENXIO); 251 } 252 if (bus_setup_intr(sc->twe_dev, sc->twe_irq, INTR_TYPE_BIO | INTR_ENTROPY, twe_pci_intr, sc, &sc->twe_intr)) { 253 twe_printf(sc, "can't set up interrupt\n"); 254 twe_free(sc); 255 return(ENXIO); 256 } 257 258 /* 259 * Create DMA tag for mapping objects into controller-addressable space. 260 */ 261 if (bus_dma_tag_create(sc->twe_parent_dmat, /* parent */ 262 1, 0, /* alignment, boundary */ 263 BUS_SPACE_MAXADDR, /* lowaddr */ 264 BUS_SPACE_MAXADDR, /* highaddr */ 265 NULL, NULL, /* filter, filterarg */ 266 MAXBSIZE, TWE_MAX_SGL_LENGTH,/* maxsize, nsegments */ 267 BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ 268 0, /* flags */ 269 &sc->twe_buffer_dmat)) { 270 twe_printf(sc, "can't allocate data buffer DMA tag\n"); 271 twe_free(sc); 272 return(ENOMEM); 273 } 274 275 /* 276 * Initialise the controller and driver core. 277 */ 278 if ((error = twe_setup(sc))) 279 return(error); 280 281 /* 282 * Print some information about the controller and configuration. 283 */ 284 twe_describe_controller(sc); 285 286 /* 287 * Create the control device. 288 */ 289 sc->twe_dev_t = make_dev(&twe_cdevsw, device_get_unit(sc->twe_dev), UID_ROOT, GID_OPERATOR, 290 S_IRUSR | S_IWUSR, "twe%d", device_get_unit(sc->twe_dev)); 291 sc->twe_dev_t->si_drv1 = sc; 292 /* 293 * Schedule ourselves to bring the controller up once interrupts are available. 294 * This isn't strictly necessary, since we disable interrupts while probing the 295 * controller, but it is more in keeping with common practice for other disk 296 * devices. 297 */ 298 sc->twe_ich.ich_func = twe_intrhook; 299 sc->twe_ich.ich_arg = sc; 300 if (config_intrhook_establish(&sc->twe_ich) != 0) { 301 twe_printf(sc, "can't establish configuration hook\n"); 302 twe_free(sc); 303 return(ENXIO); 304 } 305 306 return(0); 307} 308 309/******************************************************************************** 310 * Free all of the resources associated with (sc). 311 * 312 * Should not be called if the controller is active. 313 */ 314static void 315twe_free(struct twe_softc *sc) 316{ 317 struct twe_request *tr; 318 319 debug_called(4); 320 321 /* throw away any command buffers */ 322 while ((tr = twe_dequeue_free(sc)) != NULL) 323 twe_free_request(tr); 324 325 /* destroy the data-transfer DMA tag */ 326 if (sc->twe_buffer_dmat) 327 bus_dma_tag_destroy(sc->twe_buffer_dmat); 328 329 /* disconnect the interrupt handler */ 330 if (sc->twe_intr) 331 bus_teardown_intr(sc->twe_dev, sc->twe_irq, sc->twe_intr); 332 if (sc->twe_irq != NULL) 333 bus_release_resource(sc->twe_dev, SYS_RES_IRQ, 0, sc->twe_irq); 334 335 /* destroy the parent DMA tag */ 336 if (sc->twe_parent_dmat) 337 bus_dma_tag_destroy(sc->twe_parent_dmat); 338 339 /* release the register window mapping */ 340 if (sc->twe_io != NULL) 341 bus_release_resource(sc->twe_dev, SYS_RES_IOPORT, TWE_IO_CONFIG_REG, sc->twe_io); 342 343 /* destroy control device */ 344 if (sc->twe_dev_t != (dev_t)NULL) 345 destroy_dev(sc->twe_dev_t); 346} 347 348/******************************************************************************** 349 * Disconnect from the controller completely, in preparation for unload. 350 */ 351static int 352twe_detach(device_t dev) 353{ 354 struct twe_softc *sc = device_get_softc(dev); 355 int s, error; 356 357 debug_called(4); 358 359 error = EBUSY; 360 s = splbio(); 361 if (sc->twe_state & TWE_STATE_OPEN) 362 goto out; 363 364 /* 365 * Shut the controller down. 366 */ 367 if ((error = twe_shutdown(dev))) 368 goto out; 369 370 twe_free(sc); 371 372 error = 0; 373 out: 374 splx(s); 375 return(error); 376} 377 378/******************************************************************************** 379 * Bring the controller down to a dormant state and detach all child devices. 380 * 381 * Note that we can assume that the bioq on the controller is empty, as we won't 382 * allow shutdown if any device is open. 383 */ 384static int 385twe_shutdown(device_t dev) 386{ 387 struct twe_softc *sc = device_get_softc(dev); 388 int i, s, error; 389 390 debug_called(4); 391 392 s = splbio(); 393 error = 0; 394 395 /* 396 * Delete all our child devices. 397 */ 398 for (i = 0; i < TWE_MAX_UNITS; i++) { 399 if (sc->twe_drive[i].td_disk != 0) { 400 if ((error = device_delete_child(sc->twe_dev, sc->twe_drive[i].td_disk)) != 0) 401 goto out; 402 sc->twe_drive[i].td_disk = 0; 403 } 404 } 405 406 /* 407 * Bring the controller down. 408 */ 409 twe_deinit(sc); 410 411 out: 412 splx(s); 413 return(error); 414} 415 416/******************************************************************************** 417 * Bring the controller to a quiescent state, ready for system suspend. 418 */ 419static int 420twe_suspend(device_t dev) 421{ 422 struct twe_softc *sc = device_get_softc(dev); 423 int s; 424 425 debug_called(4); 426 427 s = splbio(); 428 sc->twe_state |= TWE_STATE_SUSPEND; 429 430 twe_disable_interrupts(sc); 431 splx(s); 432 433 return(0); 434} 435 436/******************************************************************************** 437 * Bring the controller back to a state ready for operation. 438 */ 439static int 440twe_resume(device_t dev) 441{ 442 struct twe_softc *sc = device_get_softc(dev); 443 444 debug_called(4); 445 446 sc->twe_state &= ~TWE_STATE_SUSPEND; 447 twe_enable_interrupts(sc); 448 449 return(0); 450} 451 452/******************************************************************************* 453 * Take an interrupt, or be poked by other code to look for interrupt-worthy 454 * status. 455 */ 456static void 457twe_pci_intr(void *arg) 458{ 459 twe_intr((struct twe_softc *)arg); 460} 461 462/******************************************************************************** 463 * Delayed-startup hook 464 */ 465static void 466twe_intrhook(void *arg) 467{ 468 struct twe_softc *sc = (struct twe_softc *)arg; 469 470 /* pull ourselves off the intrhook chain */ 471 config_intrhook_disestablish(&sc->twe_ich); 472 473 /* call core startup routine */ 474 twe_init(sc); 475} 476 477/******************************************************************************** 478 * Given a detected drive, attach it to the bio interface. 479 * 480 * This is called from twe_init. 481 */ 482void 483twe_attach_drive(struct twe_softc *sc, struct twe_drive *dr) 484{ 485 char buf[80]; 486 int error; 487 488 dr->td_disk = device_add_child(sc->twe_dev, NULL, -1); 489 if (dr->td_disk == NULL) { 490 twe_printf(sc, "device_add_child failed\n"); 491 return; 492 } 493 device_set_ivars(dr->td_disk, dr); 494 495 /* 496 * XXX It would make sense to test the online/initialising bits, but they seem to be 497 * always set... 498 */ 499 sprintf(buf, "%s, %s", twe_describe_code(twe_table_unittype, dr->td_type), 500 twe_describe_code(twe_table_unitstate, dr->td_state & TWE_PARAM_UNITSTATUS_MASK)); 501 device_set_desc_copy(dr->td_disk, buf); 502 503 if ((error = bus_generic_attach(sc->twe_dev)) != 0) 504 twe_printf(sc, "bus_generic_attach returned %d\n", error); 505} 506 507/******************************************************************************** 508 * Clear a PCI parity error. 509 */ 510void 511twe_clear_pci_parity_error(struct twe_softc *sc) 512{ 513 TWE_CONTROL(sc, TWE_CONTROL_CLEAR_PARITY_ERROR); 514 pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PARITY_ERROR, 2); 515} 516 517/******************************************************************************** 518 * Clear a PCI abort. 519 */ 520void 521twe_clear_pci_abort(struct twe_softc *sc) 522{ 523 TWE_CONTROL(sc, TWE_CONTROL_CLEAR_PCI_ABORT); 524 pci_write_config(sc->twe_dev, PCIR_STATUS, TWE_PCI_CLEAR_PCI_ABORT, 2); 525} 526 527/******************************************************************************** 528 ******************************************************************************** 529 Disk device 530 ******************************************************************************** 531 ********************************************************************************/ 532 533/* 534 * Disk device softc 535 */ 536struct twed_softc 537{ 538 device_t twed_dev; 539 struct twe_softc *twed_controller; /* parent device softc */ 540 struct twe_drive *twed_drive; /* drive data in parent softc */ 541 struct disk twed_disk; /* generic disk handle */ 542 struct devstat twed_stats; /* accounting */ 543}; 544 545/* 546 * Disk device bus interface 547 */ 548static int twed_probe(device_t dev); 549static int twed_attach(device_t dev); 550static int twed_detach(device_t dev); 551 552static device_method_t twed_methods[] = { 553 DEVMETHOD(device_probe, twed_probe), 554 DEVMETHOD(device_attach, twed_attach), 555 DEVMETHOD(device_detach, twed_detach), 556 { 0, 0 } 557}; 558 559static driver_t twed_driver = { 560 "twed", 561 twed_methods, 562 sizeof(struct twed_softc) 563}; 564 565static devclass_t twed_devclass; 566#ifdef TWE_OVERRIDE 567DRIVER_MODULE(Xtwed, Xtwe, twed_driver, twed_devclass, 0, 0); 568#else 569DRIVER_MODULE(twed, twe, twed_driver, twed_devclass, 0, 0); 570#endif 571 572/* 573 * Disk device control interface. 574 */ 575 576#ifdef FREEBSD_4 577static int disks_registered = 0; 578#endif 579 580/******************************************************************************** 581 * Handle open from generic layer. 582 * 583 * Note that this is typically only called by the diskslice code, and not 584 * for opens on subdevices (eg. slices, partitions). 585 */ 586static int 587twed_open(struct disk *dp) 588{ 589 struct twed_softc *sc = (struct twed_softc *)dp->d_drv1; 590 591 debug_called(4); 592 593 if (sc == NULL) 594 return (ENXIO); 595 596 /* check that the controller is up and running */ 597 if (sc->twed_controller->twe_state & TWE_STATE_SHUTDOWN) 598 return(ENXIO); 599 600 return (0); 601} 602 603/******************************************************************************** 604 * Handle an I/O request. 605 */ 606static void 607twed_strategy(twe_bio *bp) 608{ 609 struct twed_softc *sc = (struct twed_softc *)TWE_BIO_SOFTC(bp); 610 611 debug_called(4); 612 613 TWED_BIO_IN; 614 615 /* bogus disk? */ 616 if (sc == NULL) { 617 TWE_BIO_SET_ERROR(bp, EINVAL); 618 printf("twe: bio for invalid disk!\n"); 619 TWE_BIO_DONE(bp); 620 TWED_BIO_OUT; 621 return; 622 } 623 624 /* perform accounting */ 625 TWE_BIO_STATS_START(bp); 626 627 /* queue the bio on the controller */ 628 twe_enqueue_bio(sc->twed_controller, bp); 629 630 /* poke the controller to start I/O */ 631 twe_startio(sc->twed_controller); 632 return; 633} 634 635/******************************************************************************** 636 * System crashdump support 637 */ 638static int 639twed_dump(void *arg, void *virtual, vm_offset_t physical, off_t offset, size_t length) 640{ 641 struct twed_softc *twed_sc; 642 struct twe_softc *twe_sc; 643 int error; 644 struct disk *dp; 645 646 dp = arg; 647 twed_sc = (struct twed_softc *)dp->d_drv1; 648 twe_sc = (struct twe_softc *)twed_sc->twed_controller; 649 if (!twed_sc || !twe_sc) 650 return(ENXIO); 651 652 if (length > 0) { 653 if ((error = twe_dump_blocks(twe_sc, twed_sc->twed_drive->td_unit, offset / TWE_BLOCK_SIZE, virtual, length / TWE_BLOCK_SIZE)) != 0) 654 return(error); 655 } 656 return(0); 657} 658 659/******************************************************************************** 660 * Handle completion of an I/O request. 661 */ 662void 663twed_intr(twe_bio *bp) 664{ 665 debug_called(4); 666 667 /* if no error, transfer completed */ 668 if (!TWE_BIO_HAS_ERROR(bp)) 669 TWE_BIO_RESID(bp) = 0; 670 671 TWE_BIO_STATS_END(bp); 672 TWE_BIO_DONE(bp); 673 TWED_BIO_OUT; 674} 675 676/******************************************************************************** 677 * Default probe stub. 678 */ 679static int 680twed_probe(device_t dev) 681{ 682 return (0); 683} 684 685/******************************************************************************** 686 * Attach a unit to the controller. 687 */ 688static int 689twed_attach(device_t dev) 690{ 691 struct twed_softc *sc; 692 device_t parent; 693 694 debug_called(4); 695 696 /* initialise our softc */ 697 sc = device_get_softc(dev); 698 parent = device_get_parent(dev); 699 sc->twed_controller = (struct twe_softc *)device_get_softc(parent); 700 sc->twed_drive = device_get_ivars(dev); 701 sc->twed_dev = dev; 702 703 /* report the drive */ 704 twed_printf(sc, "%uMB (%u sectors)\n", 705 sc->twed_drive->td_size / ((1024 * 1024) / TWE_BLOCK_SIZE), 706 sc->twed_drive->td_size); 707 708 devstat_add_entry(&sc->twed_stats, "twed", device_get_unit(dev), TWE_BLOCK_SIZE, 709 DEVSTAT_NO_ORDERED_TAGS, 710 DEVSTAT_TYPE_STORARRAY | DEVSTAT_TYPE_IF_OTHER, 711 DEVSTAT_PRIORITY_ARRAY); 712 713 /* attach a generic disk device to ourselves */ 714 715 sc->twed_disk.d_open = twed_open; 716 sc->twed_disk.d_strategy = twed_strategy; 717 sc->twed_disk.d_dump = (dumper_t *)twed_dump; 718 sc->twed_disk.d_name = "twed"; 719 sc->twed_disk.d_drv1 = sc; 720 sc->twed_disk.d_maxsize = (TWE_MAX_SGL_LENGTH - 1) * PAGE_SIZE; 721 sc->twed_disk.d_sectorsize = TWE_BLOCK_SIZE; 722 sc->twed_disk.d_mediasize = TWE_BLOCK_SIZE * (off_t)sc->twed_drive->td_size; 723 sc->twed_disk.d_fwsectors = sc->twed_drive->td_sectors; 724 sc->twed_disk.d_fwheads = sc->twed_drive->td_heads; 725 726 disk_create(device_get_unit(dev), &sc->twed_disk, 0, NULL, NULL); 727#ifdef FREEBSD_4 728 disks_registered++; 729#endif 730 731 /* set the maximum I/O size to the theoretical maximum allowed by the S/G list size */ 732 733 return (0); 734} 735 736/******************************************************************************** 737 * Disconnect ourselves from the system. 738 */ 739static int 740twed_detach(device_t dev) 741{ 742 struct twed_softc *sc = (struct twed_softc *)device_get_softc(dev); 743 744 debug_called(4); 745 746 if (sc->twed_disk.d_flags & DISKFLAG_OPEN) 747 return(EBUSY); 748 749 devstat_remove_entry(&sc->twed_stats); 750#ifdef FREEBSD_4 751 if (--disks_registered == 0) 752 cdevsw_remove(&tweddisk_cdevsw); 753#else 754 disk_destroy(&sc->twed_disk); 755#endif 756 757 return(0); 758} 759 760/******************************************************************************** 761 ******************************************************************************** 762 Misc 763 ******************************************************************************** 764 ********************************************************************************/ 765 766static void twe_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error); 767static void twe_setup_request_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error); 768 769/******************************************************************************** 770 * Allocate a command buffer 771 */ 772MALLOC_DEFINE(TWE_MALLOC_CLASS, "twe commands", "twe commands"); 773 774struct twe_request * 775twe_allocate_request(struct twe_softc *sc) 776{ 777 struct twe_request *tr; 778 779 if ((tr = malloc(sizeof(struct twe_request), TWE_MALLOC_CLASS, M_NOWAIT)) == NULL) 780 return(NULL); 781 bzero(tr, sizeof(*tr)); 782 tr->tr_sc = sc; 783 if (bus_dmamap_create(sc->twe_buffer_dmat, 0, &tr->tr_cmdmap)) { 784 twe_free_request(tr); 785 return(NULL); 786 } 787 if (bus_dmamap_create(sc->twe_buffer_dmat, 0, &tr->tr_dmamap)) { 788 bus_dmamap_destroy(sc->twe_buffer_dmat, tr->tr_cmdmap); 789 twe_free_request(tr); 790 return(NULL); 791 } 792 return(tr); 793} 794 795/******************************************************************************** 796 * Permanently discard a command buffer. 797 */ 798void 799twe_free_request(struct twe_request *tr) 800{ 801 struct twe_softc *sc = tr->tr_sc; 802 803 debug_called(4); 804 805 bus_dmamap_destroy(sc->twe_buffer_dmat, tr->tr_cmdmap); 806 bus_dmamap_destroy(sc->twe_buffer_dmat, tr->tr_dmamap); 807 free(tr, TWE_MALLOC_CLASS); 808} 809 810/******************************************************************************** 811 * Map/unmap (tr)'s command and data in the controller's addressable space. 812 * 813 * These routines ensure that the data which the controller is going to try to 814 * access is actually visible to the controller, in a machine-independant 815 * fashion. Due to a hardware limitation, I/O buffers must be 512-byte aligned 816 * and we take care of that here as well. 817 */ 818static void 819twe_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error) 820{ 821 struct twe_request *tr = (struct twe_request *)arg; 822 TWE_Command *cmd = &tr->tr_command; 823 int i; 824 825 debug_called(4); 826 827 /* save base of first segment in command (applicable if there only one segment) */ 828 tr->tr_dataphys = segs[0].ds_addr; 829 830 /* correct command size for s/g list size */ 831 tr->tr_command.generic.size += 2 * nsegments; 832 833 /* 834 * Due to the fact that parameter and I/O commands have the scatter/gather list in 835 * different places, we need to determine which sort of command this actually is 836 * before we can populate it correctly. 837 */ 838 switch(cmd->generic.opcode) { 839 case TWE_OP_GET_PARAM: 840 case TWE_OP_SET_PARAM: 841 cmd->generic.sgl_offset = 2; 842 for (i = 0; i < nsegments; i++) { 843 cmd->param.sgl[i].address = segs[i].ds_addr; 844 cmd->param.sgl[i].length = segs[i].ds_len; 845 } 846 for (; i < TWE_MAX_SGL_LENGTH; i++) { /* XXX necessary? */ 847 cmd->param.sgl[i].address = 0; 848 cmd->param.sgl[i].length = 0; 849 } 850 break; 851 case TWE_OP_READ: 852 case TWE_OP_WRITE: 853 cmd->generic.sgl_offset = 3; 854 for (i = 0; i < nsegments; i++) { 855 cmd->io.sgl[i].address = segs[i].ds_addr; 856 cmd->io.sgl[i].length = segs[i].ds_len; 857 } 858 for (; i < TWE_MAX_SGL_LENGTH; i++) { /* XXX necessary? */ 859 cmd->io.sgl[i].address = 0; 860 cmd->io.sgl[i].length = 0; 861 } 862 break; 863 default: 864 /* no s/g list, nothing to do */ 865 break; 866 } 867} 868 869static void 870twe_setup_request_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error) 871{ 872 struct twe_request *tr = (struct twe_request *)arg; 873 874 debug_called(4); 875 876 /* command can't cross a page boundary */ 877 tr->tr_cmdphys = segs[0].ds_addr; 878} 879 880void 881twe_map_request(struct twe_request *tr) 882{ 883 struct twe_softc *sc = tr->tr_sc; 884 885 debug_called(4); 886 887 888 /* 889 * Map the command into bus space. 890 */ 891 bus_dmamap_load(sc->twe_buffer_dmat, tr->tr_cmdmap, &tr->tr_command, sizeof(tr->tr_command), 892 twe_setup_request_dmamap, tr, 0); 893 bus_dmamap_sync(sc->twe_buffer_dmat, tr->tr_cmdmap, BUS_DMASYNC_PREWRITE); 894 895 /* 896 * If the command involves data, map that too. 897 */ 898 if (tr->tr_data != NULL) { 899 900 /* 901 * Data must be 64-byte aligned; allocate a fixup buffer if it's not. 902 */ 903 if (((vm_offset_t)tr->tr_data % TWE_ALIGNMENT) != 0) { 904 tr->tr_realdata = tr->tr_data; /* save pointer to 'real' data */ 905 tr->tr_flags |= TWE_CMD_ALIGNBUF; 906 tr->tr_data = malloc(tr->tr_length, TWE_MALLOC_CLASS, M_NOWAIT); /* XXX check result here */ 907 } 908 909 /* 910 * Map the data buffer into bus space and build the s/g list. 911 */ 912 bus_dmamap_load(sc->twe_buffer_dmat, tr->tr_dmamap, tr->tr_data, tr->tr_length, 913 twe_setup_data_dmamap, tr, 0); 914 if (tr->tr_flags & TWE_CMD_DATAIN) 915 bus_dmamap_sync(sc->twe_buffer_dmat, tr->tr_dmamap, BUS_DMASYNC_PREREAD); 916 if (tr->tr_flags & TWE_CMD_DATAOUT) { 917 /* if we're using an alignment buffer, and we're writing data, copy the real data out */ 918 if (tr->tr_flags & TWE_CMD_ALIGNBUF) 919 bcopy(tr->tr_realdata, tr->tr_data, tr->tr_length); 920 bus_dmamap_sync(sc->twe_buffer_dmat, tr->tr_dmamap, BUS_DMASYNC_PREWRITE); 921 } 922 } 923} 924 925void 926twe_unmap_request(struct twe_request *tr) 927{ 928 struct twe_softc *sc = tr->tr_sc; 929 930 debug_called(4); 931 932 /* 933 * Unmap the command from bus space. 934 */ 935 bus_dmamap_sync(sc->twe_buffer_dmat, tr->tr_cmdmap, BUS_DMASYNC_POSTWRITE); 936 bus_dmamap_unload(sc->twe_buffer_dmat, tr->tr_cmdmap); 937 938 /* 939 * If the command involved data, unmap that too. 940 */ 941 if (tr->tr_data != NULL) { 942 943 if (tr->tr_flags & TWE_CMD_DATAIN) { 944 bus_dmamap_sync(sc->twe_buffer_dmat, tr->tr_dmamap, BUS_DMASYNC_POSTREAD); 945 /* if we're using an alignment buffer, and we're reading data, copy the real data in */ 946 if (tr->tr_flags & TWE_CMD_ALIGNBUF) 947 bcopy(tr->tr_data, tr->tr_realdata, tr->tr_length); 948 } 949 if (tr->tr_flags & TWE_CMD_DATAOUT) 950 bus_dmamap_sync(sc->twe_buffer_dmat, tr->tr_dmamap, BUS_DMASYNC_POSTWRITE); 951 952 bus_dmamap_unload(sc->twe_buffer_dmat, tr->tr_dmamap); 953 } 954 955 /* free alignment buffer if it was used */ 956 if (tr->tr_flags & TWE_CMD_ALIGNBUF) { 957 free(tr->tr_data, TWE_MALLOC_CLASS); 958 tr->tr_data = tr->tr_realdata; /* restore 'real' data pointer */ 959 } 960} 961 962#ifdef TWE_DEBUG 963/******************************************************************************** 964 * Print current controller status, call from DDB. 965 */ 966void 967twe_report(void) 968{ 969 struct twe_softc *sc; 970 int i, s; 971 972 s = splbio(); 973 for (i = 0; (sc = devclass_get_softc(twe_devclass, i)) != NULL; i++) 974 twe_print_controller(sc); 975 printf("twed: total bio count in %u out %u\n", twed_bio_in, twed_bio_out); 976 splx(s); 977} 978#endif
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