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if_tireg.h (59605) if_tireg.h (60833)
1/*
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
1/*
2 * Copyright (c) 1997, 1998, 1999
3 * Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright

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24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30 * THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * $FreeBSD: head/sys/dev/ti/if_tireg.h 59605 2000-04-24 17:44:45Z wpaul $
32 * $FreeBSD: head/sys/dev/ti/if_tireg.h 60833 2000-05-23 20:41:01Z jake $
33 */
34
35/*
36 * Tigon register offsets. These are memory mapped registers
37 * which can be accessed with the CSR_READ_4()/CSR_WRITE_4() macros.
38 * Each register must be accessed using 32 bit operations.
39 *
40 * All reegisters are accessed through a 16K shared memory block.

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1098
1099#define TI_HWREV_TIGON 0x01
1100#define TI_HWREV_TIGON_II 0x02
1101#define TI_TIMEOUT 1000
1102#define TI_TXCONS_UNSET 0xFFFF /* impossible value */
1103
1104struct ti_mc_entry {
1105 struct ether_addr mc_addr;
33 */
34
35/*
36 * Tigon register offsets. These are memory mapped registers
37 * which can be accessed with the CSR_READ_4()/CSR_WRITE_4() macros.
38 * Each register must be accessed using 32 bit operations.
39 *
40 * All reegisters are accessed through a 16K shared memory block.

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1098
1099#define TI_HWREV_TIGON 0x01
1100#define TI_HWREV_TIGON_II 0x02
1101#define TI_TIMEOUT 1000
1102#define TI_TXCONS_UNSET 0xFFFF /* impossible value */
1103
1104struct ti_mc_entry {
1105 struct ether_addr mc_addr;
1106 SLIST_ENTRY(ti_mc_entry) mc_entries;
1106 SLIST_ENTRY(struct ti_mc_entry) mc_entries;
1107};
1108
1109struct ti_jpool_entry {
1110 int slot;
1107};
1108
1109struct ti_jpool_entry {
1110 int slot;
1111 SLIST_ENTRY(ti_jpool_entry) jpool_entries;
1111 SLIST_ENTRY(struct ti_jpool_entry) jpool_entries;
1112};
1113
1114struct ti_softc {
1115 struct arpcom arpcom; /* interface info */
1116 bus_space_handle_t ti_bhandle;
1117 vm_offset_t ti_vhandle;
1118 bus_space_tag_t ti_btag;
1119 void *ti_intrhand;

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1130#define ti_tx_considx ti_rdata->ti_tx_considx_r
1131 u_int16_t ti_tx_saved_considx;
1132 u_int16_t ti_rx_saved_considx;
1133 u_int16_t ti_ev_saved_considx;
1134 u_int16_t ti_cmd_saved_prodidx;
1135 u_int16_t ti_std; /* current std ring head */
1136 u_int16_t ti_mini; /* current mini ring head */
1137 u_int16_t ti_jumbo; /* current jumo ring head */
1112};
1113
1114struct ti_softc {
1115 struct arpcom arpcom; /* interface info */
1116 bus_space_handle_t ti_bhandle;
1117 vm_offset_t ti_vhandle;
1118 bus_space_tag_t ti_btag;
1119 void *ti_intrhand;

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1130#define ti_tx_considx ti_rdata->ti_tx_considx_r
1131 u_int16_t ti_tx_saved_considx;
1132 u_int16_t ti_rx_saved_considx;
1133 u_int16_t ti_ev_saved_considx;
1134 u_int16_t ti_cmd_saved_prodidx;
1135 u_int16_t ti_std; /* current std ring head */
1136 u_int16_t ti_mini; /* current mini ring head */
1137 u_int16_t ti_jumbo; /* current jumo ring head */
1138 SLIST_HEAD(__ti_mchead, ti_mc_entry) ti_mc_listhead;
1139 SLIST_HEAD(__ti_jfreehead, ti_jpool_entry) ti_jfree_listhead;
1140 SLIST_HEAD(__ti_jinusehead, ti_jpool_entry) ti_jinuse_listhead;
1138 SLIST_HEAD(__ti_mchead, struct ti_mc_entry) ti_mc_listhead;
1139 SLIST_HEAD(__ti_jfreehead, struct ti_jpool_entry) ti_jfree_listhead;
1140 SLIST_HEAD(__ti_jinusehead, struct ti_jpool_entry) ti_jinuse_listhead;
1141 u_int32_t ti_stat_ticks;
1142 u_int32_t ti_rx_coal_ticks;
1143 u_int32_t ti_tx_coal_ticks;
1144 u_int32_t ti_rx_max_coal_bds;
1145 u_int32_t ti_tx_max_coal_bds;
1146 u_int32_t ti_tx_buf_ratio;
1147 int ti_if_flags;
1148 int ti_txcnt;

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1141 u_int32_t ti_stat_ticks;
1142 u_int32_t ti_rx_coal_ticks;
1143 u_int32_t ti_tx_coal_ticks;
1144 u_int32_t ti_rx_max_coal_bds;
1145 u_int32_t ti_tx_max_coal_bds;
1146 u_int32_t ti_tx_buf_ratio;
1147 int ti_if_flags;
1148 int ti_txcnt;

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