40
41/* ------------------------------------------------------------------------- */
42/* Constants */
43
44#define SV_PCI_ID 0xca005333
45#define SV_DEFAULT_BUFSZ 16384
46#define SV_MIN_BLKSZ 128
47#define SV_INTR_PER_BUFFER 2
48
49#ifndef DEB
50#define DEB(x) /* (x) */
51#endif
52
53/* ------------------------------------------------------------------------- */
54/* Structures */
55
56struct sc_info;
57
58struct sc_chinfo {
59 struct sc_info *parent;
60 struct pcm_channel *channel;
61 struct snd_dbuf *buffer;
62 u_int32_t fmt, spd;
63 int dir;
64 int dma_active, dma_was_active;
65};
66
67struct sc_info {
68 device_t dev;
69
70 /* DMA buffer allocator */
71 bus_dma_tag_t parent_dmat;
72
73 /* Enhanced register resources */
74 struct resource *enh_reg;
75 bus_space_tag_t enh_st;
76 bus_space_handle_t enh_sh;
77 int enh_type;
78 int enh_rid;
79
80 /* DMA configuration */
81 struct resource *dmaa_reg, *dmac_reg;
82 bus_space_tag_t dmaa_st, dmac_st;
83 bus_space_handle_t dmaa_sh, dmac_sh;
84 int dmaa_type, dmac_type;
85 int dmaa_rid, dmac_rid;
86
87 /* Interrupt resources */
88 struct resource *irq;
89 int irqid;
90 void *ih;
91
92 /* User configurable buffer size */
93 unsigned int bufsz;
94
95 struct sc_chinfo rch, pch;
96 u_int8_t rev;
97};
98
99static u_int32_t sc_fmt[] = {
100 AFMT_U8,
101 AFMT_U8 | AFMT_STEREO,
102 AFMT_S16_LE,
103 AFMT_S16_LE | AFMT_STEREO,
104 0
105};
106
107static struct pcmchan_caps sc_caps = {8000, 48000, sc_fmt, 0};
108
109/* ------------------------------------------------------------------------- */
110/* Register Manipulations */
111
112#define sv_direct_set(x, y, z) _sv_direct_set(x, y, z, __LINE__)
113
114static u_int8_t
115sv_direct_get(struct sc_info *sc, u_int8_t reg)
116{
117 return bus_space_read_1(sc->enh_st, sc->enh_sh, reg);
118}
119
120static void
121_sv_direct_set(struct sc_info *sc, u_int8_t reg, u_int8_t val, int line)
122{
123 u_int8_t n;
124 bus_space_write_1(sc->enh_st, sc->enh_sh, reg, val);
125
126 n = sv_direct_get(sc, reg);
127 if (n != val) {
128 device_printf(sc->dev, "sv_direct_set register 0x%02x %d != %d from line %d\n", reg, n, val, line);
129 }
130}
131
132static u_int8_t
133sv_indirect_get(struct sc_info *sc, u_int8_t reg)
134{
135 if (reg == SV_REG_FORMAT || reg == SV_REG_ANALOG_PWR)
136 reg |= SV_CM_INDEX_MCE;
137
138 bus_space_write_1(sc->enh_st, sc->enh_sh, SV_CM_INDEX, reg);
139 return bus_space_read_1(sc->enh_st, sc->enh_sh, SV_CM_DATA);
140}
141
142#define sv_indirect_set(x, y, z) _sv_indirect_set(x, y, z, __LINE__)
143
144static void
145_sv_indirect_set(struct sc_info *sc, u_int8_t reg, u_int8_t val, int line)
146{
147 if (reg == SV_REG_FORMAT || reg == SV_REG_ANALOG_PWR)
148 reg |= SV_CM_INDEX_MCE;
149
150 bus_space_write_1(sc->enh_st, sc->enh_sh, SV_CM_INDEX, reg);
151 bus_space_write_1(sc->enh_st, sc->enh_sh, SV_CM_DATA, val);
152
153 reg &= ~SV_CM_INDEX_MCE;
154 if (reg != SV_REG_ADC_PLLM) {
155 u_int8_t n;
156 n = sv_indirect_get(sc, reg);
157 if (n != val) {
158 device_printf(sc->dev, "sv_indirect_set register 0x%02x %d != %d line %d\n", reg, n, val, line);
159 }
160 }
161}
162
163static void
164sv_dma_set_config(bus_space_tag_t st, bus_space_handle_t sh,
165 u_int32_t base, u_int32_t count, u_int8_t mode)
166{
167 bus_space_write_4(st, sh, SV_DMA_ADDR, base);
168 bus_space_write_4(st, sh, SV_DMA_COUNT, count & 0xffffff);
169 bus_space_write_1(st, sh, SV_DMA_MODE, mode);
170
171 DEB(printf("base 0x%08x count %5d mode 0x%02x\n",
172 base, count, mode));
173}
174
175static u_int32_t
176sv_dma_get_count(bus_space_tag_t st, bus_space_handle_t sh)
177{
178 return bus_space_read_4(st, sh, SV_DMA_COUNT) & 0xffffff;
179}
180
181/* ------------------------------------------------------------------------- */
182/* Play / Record Common Interface */
183
184static void *
185svchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir)
186{
187 struct sc_info *sc = devinfo;
188 struct sc_chinfo *ch;
189 ch = (dir == PCMDIR_PLAY) ? &sc->pch : &sc->rch;
190
191 ch->parent = sc;
192 ch->channel = c;
193 ch->dir = dir;
194
195 if (sndbuf_alloc(b, sc->parent_dmat, sc->bufsz) != 0) {
196 DEB(printf("svchan_init failed\n"));
197 return NULL;
198 }
199 ch->buffer = b;
200 ch->fmt = AFMT_U8;
201 ch->spd = DSP_DEFAULT_SPEED;
202 ch->dma_active = ch->dma_was_active = 0;
203
204 return ch;
205}
206
207static struct pcmchan_caps *
208svchan_getcaps(kobj_t obj, void *data)
209{
210 return &sc_caps;
211}
212
213static int
214svchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize)
215{
216 struct sc_chinfo *ch = data;
217 struct sc_info *sc = ch->parent;
218
219 /* user has requested interrupts every blocksize bytes */
220 RANGE(blocksize, SV_MIN_BLKSZ, sc->bufsz / SV_INTR_PER_BUFFER);
221 sndbuf_resize(ch->buffer, SV_INTR_PER_BUFFER, blocksize);
222 DEB(printf("svchan_setblocksize: %d\n", blocksize));
223 return blocksize;
224}
225
226static int
227svchan_setformat(kobj_t obj, void *data, u_int32_t format)
228{
229 struct sc_chinfo *ch = data;
230 /* NB Just note format here as setting format register
231 * generates noise if dma channel is inactive. */
232 ch->fmt = (format & AFMT_STEREO) ? SV_AFMT_STEREO : SV_AFMT_MONO;
233 ch->fmt |= (format & AFMT_16BIT) ? SV_AFMT_S16 : SV_AFMT_U8;
234 return 0;
235}
236
237static int
238svchan_setspeed(kobj_t obj, void *data, u_int32_t speed)
239{
240 struct sc_chinfo *ch = data;
241 RANGE(speed, 8000, 48000);
242 ch->spd = speed;
243 return speed;
244}
245
246/* ------------------------------------------------------------------------- */
247/* Recording interface */
248
249static int
250sv_set_recspeed(struct sc_info *sc, u_int32_t speed)
251{
252 u_int32_t f_out, f_actual;
253 u_int32_t rs, re, r, best_r = 0, r2, t, n, best_n = 0;
254 int32_t m, best_m = 0, ms, me, err, min_err;
255
256 /* This algorithm is a variant described in sonicvibes.pdf
257 * appendix A. This search is marginally more extensive and
258 * results in (nominally) better sample rate matching. */
259
260 f_out = SV_F_SCALE * speed;
261 min_err = 0x7fffffff;
262
263 /* Find bounds of r to examine, rs <= r <= re */
264 t = 80000000 / f_out;
265 for (rs = 1; (1 << rs) < t; rs++);
266
267 t = 150000000 / f_out;
268 for (re = 1; (2 << re) < t; re++);
269 if (re > 7) re = 7;
270
271 /* Search over r, n, m */
272 for (r = rs; r <= re; r++) {
273 r2 = (1 << r);
274 for (n = 3; n < 34; n++) {
275 m = f_out * n / (SV_F_REF / r2);
276 ms = (m > 3) ? (m - 1) : 3;
277 me = (m < 129) ? (m + 1) : 129;
278 for (m = ms; m <= me; m++) {
279 f_actual = m * SV_F_REF / (n * r2);
280 if (f_actual > f_out) {
281 err = f_actual - f_out;
282 } else {
283 err = f_out - f_actual;
284 }
285 if (err < min_err) {
286 best_r = r;
287 best_m = m - 2;
288 best_n = n - 2;
289 min_err = err;
290 if (err == 0) break;
291 }
292 }
293 }
294 }
295
296 sv_indirect_set(sc, SV_REG_ADC_PLLM, best_m);
297 sv_indirect_set(sc, SV_REG_ADC_PLLN,
298 SV_ADC_PLLN(best_n) | SV_ADC_PLLR(best_r));
299 DEB(printf("svrchan_setspeed: %d -> PLLM 0x%02x PLLNR 0x%08x\n",
300 speed,
301 sv_indirect_get(sc, SV_REG_ADC_PLLM),
302 sv_indirect_get(sc, SV_REG_ADC_PLLN)));
303 return 0;
304}
305
306static int
307svrchan_trigger(kobj_t obj, void *data, int go)
308{
309 struct sc_chinfo *ch = data;
310 struct sc_info *sc = ch->parent;
311 u_int32_t count, enable;
312 u_int8_t v;
313
314 switch(go) {
315 case PCMTRIG_START:
316 /* Set speed */
317 sv_set_recspeed(sc, ch->spd);
318
319 /* Set format */
320 v = sv_indirect_get(sc, SV_REG_FORMAT) & ~SV_AFMT_DMAC_MSK;
321 v |= SV_AFMT_DMAC(ch->fmt);
322 sv_indirect_set(sc, SV_REG_FORMAT, v);
323
324 /* Program DMA */
325 count = sndbuf_getsize(ch->buffer) / 2; /* DMAC uses words */
326 sv_dma_set_config(sc->dmac_st, sc->dmac_sh,
327 sndbuf_getbufaddr(ch->buffer),
328 count - 1,
329 SV_DMA_MODE_AUTO | SV_DMA_MODE_RD);
330 count = count / SV_INTR_PER_BUFFER - 1;
331 sv_indirect_set(sc, SV_REG_DMAC_COUNT_HI, count >> 8);
332 sv_indirect_set(sc, SV_REG_DMAC_COUNT_LO, count & 0xff);
333
334 /* Enable DMA */
335 enable = sv_indirect_get(sc, SV_REG_ENABLE) | SV_RECORD_ENABLE;
336 sv_indirect_set(sc, SV_REG_ENABLE, enable);
337 ch->dma_active = 1;
338 break;
339 case PCMTRIG_ABORT:
340 enable = sv_indirect_get(sc, SV_REG_ENABLE) & ~SV_RECORD_ENABLE;
341 sv_indirect_set(sc, SV_REG_ENABLE, enable);
342 ch->dma_active = 0;
343 break;
344 }
345
346 return 0;
347}
348
349static int
350svrchan_getptr(kobj_t obj, void *data)
351{
352 struct sc_chinfo *ch = data;
353 struct sc_info *sc = ch->parent;
354 u_int32_t sz, remain;
355
356 sz = sndbuf_getsize(ch->buffer);
357 /* DMAC uses words */
358 remain = (sv_dma_get_count(sc->dmac_st, sc->dmac_sh) + 1) * 2;
359 return sz - remain;
360}
361
362static kobj_method_t svrchan_methods[] = {
363 KOBJMETHOD(channel_init, svchan_init),
364 KOBJMETHOD(channel_setformat, svchan_setformat),
365 KOBJMETHOD(channel_setspeed, svchan_setspeed),
366 KOBJMETHOD(channel_setblocksize, svchan_setblocksize),
367 KOBJMETHOD(channel_trigger, svrchan_trigger),
368 KOBJMETHOD(channel_getptr, svrchan_getptr),
369 KOBJMETHOD(channel_getcaps, svchan_getcaps),
370 { 0, 0 }
371};
372CHANNEL_DECLARE(svrchan);
373
374/* ------------------------------------------------------------------------- */
375/* Playback interface */
376
377static int
378svpchan_trigger(kobj_t obj, void *data, int go)
379{
380 struct sc_chinfo *ch = data;
381 struct sc_info *sc = ch->parent;
382 u_int32_t count, enable, speed;
383 u_int8_t v;
384
385 switch(go) {
386 case PCMTRIG_START:
387 /* Set speed */
388 speed = (ch->spd * 65536) / 48000;
389 if (speed > 65535)
390 speed = 65535;
391 sv_indirect_set(sc, SV_REG_PCM_SAMPLING_HI, speed >> 8);
392 sv_indirect_set(sc, SV_REG_PCM_SAMPLING_LO, speed & 0xff);
393
394 /* Set format */
395 v = sv_indirect_get(sc, SV_REG_FORMAT) & ~SV_AFMT_DMAA_MSK;
396 v |= SV_AFMT_DMAA(ch->fmt);
397 sv_indirect_set(sc, SV_REG_FORMAT, v);
398
399 /* Program DMA */
400 count = sndbuf_getsize(ch->buffer);
401 sv_dma_set_config(sc->dmaa_st, sc->dmaa_sh,
402 sndbuf_getbufaddr(ch->buffer),
403 count - 1,
404 SV_DMA_MODE_AUTO | SV_DMA_MODE_WR);
405 count = count / SV_INTR_PER_BUFFER - 1;
406 sv_indirect_set(sc, SV_REG_DMAA_COUNT_HI, count >> 8);
407 sv_indirect_set(sc, SV_REG_DMAA_COUNT_LO, count & 0xff);
408
409 /* Enable DMA */
410 enable = sv_indirect_get(sc, SV_REG_ENABLE);
411 enable = (enable | SV_PLAY_ENABLE) & ~SV_PLAYBACK_PAUSE;
412 sv_indirect_set(sc, SV_REG_ENABLE, enable);
413 ch->dma_active = 1;
414 break;
415 case PCMTRIG_ABORT:
416 enable = sv_indirect_get(sc, SV_REG_ENABLE) & ~SV_PLAY_ENABLE;
417 sv_indirect_set(sc, SV_REG_ENABLE, enable);
418 ch->dma_active = 0;
419 break;
420 }
421
422 return 0;
423}
424
425static int
426svpchan_getptr(kobj_t obj, void *data)
427{
428 struct sc_chinfo *ch = data;
429 struct sc_info *sc = ch->parent;
430 u_int32_t sz, remain;
431
432 sz = sndbuf_getsize(ch->buffer);
433 /* DMAA uses bytes */
434 remain = sv_dma_get_count(sc->dmaa_st, sc->dmaa_sh) + 1;
435 return (sz - remain);
436}
437
438static kobj_method_t svpchan_methods[] = {
439 KOBJMETHOD(channel_init, svchan_init),
440 KOBJMETHOD(channel_setformat, svchan_setformat),
441 KOBJMETHOD(channel_setspeed, svchan_setspeed),
442 KOBJMETHOD(channel_setblocksize, svchan_setblocksize),
443 KOBJMETHOD(channel_trigger, svpchan_trigger),
444 KOBJMETHOD(channel_getptr, svpchan_getptr),
445 KOBJMETHOD(channel_getcaps, svchan_getcaps),
446 { 0, 0 }
447};
448CHANNEL_DECLARE(svpchan);
449
450/* ------------------------------------------------------------------------- */
451/* Mixer support */
452
453struct sv_mix_props {
454 u_int8_t reg; /* Register */
455 u_int8_t stereo:1; /* Supports 2 channels */
456 u_int8_t mute:1; /* Supports muting */
457 u_int8_t neg:1; /* Negative gain */
458 u_int8_t max; /* Max gain */
459 u_int8_t iselect; /* Input selector */
460} static const mt [SOUND_MIXER_NRDEVICES] = {
461 [SOUND_MIXER_LINE1] = {SV_REG_AUX1, 1, 1, 1, SV_DEFAULT_MAX, SV_INPUT_AUX1},
462 [SOUND_MIXER_CD] = {SV_REG_CD, 1, 1, 1, SV_DEFAULT_MAX, SV_INPUT_CD},
463 [SOUND_MIXER_LINE] = {SV_REG_LINE, 1, 1, 1, SV_DEFAULT_MAX, SV_INPUT_LINE},
464 [SOUND_MIXER_MIC] = {SV_REG_MIC, 0, 1, 1, SV_MIC_MAX, SV_INPUT_MIC},
465 [SOUND_MIXER_SYNTH] = {SV_REG_SYNTH, 0, 1, 1, SV_DEFAULT_MAX, 0},
466 [SOUND_MIXER_LINE2] = {SV_REG_AUX2, 1, 1, 1, SV_DEFAULT_MAX, SV_INPUT_AUX2},
467 [SOUND_MIXER_VOLUME] = {SV_REG_MIX, 1, 1, 1, SV_DEFAULT_MAX, 0},
468 [SOUND_MIXER_PCM] = {SV_REG_PCM, 1, 1, 1, SV_PCM_MAX, 0},
469 [SOUND_MIXER_RECLEV] = {SV_REG_ADC_INPUT, 1, 0, 0, SV_ADC_MAX, 0},
470};
471
472static void
473sv_channel_gain(struct sc_info *sc, u_int32_t dev, u_int32_t gain, u_int32_t channel)
474{
475 u_int8_t v;
476 int32_t g;
477
478 g = mt[dev].max * gain / 100;
479 if (mt[dev].neg)
480 g = mt[dev].max - g;
481 v = sv_indirect_get(sc, mt[dev].reg + channel) & ~mt[dev].max;
482 v |= g;
483
484 if (mt[dev].mute) {
485 if (gain == 0) {
486 v |= SV_MUTE;
487 } else {
488 v &= ~SV_MUTE;
489 }
490 }
491 sv_indirect_set(sc, mt[dev].reg + channel, v);
492}
493
494static int
495sv_gain(struct sc_info *sc, u_int32_t dev, u_int32_t left, u_int32_t right)
496{
497 sv_channel_gain(sc, dev, left, 0);
498 if (mt[dev].stereo)
499 sv_channel_gain(sc, dev, right, 1);
500 return 0;
501}
502
503static void
504sv_mix_mute_all(struct sc_info *sc)
505{
506 int32_t i;
507 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
508 if (mt[i].reg) sv_gain(sc, i, 0, 0);
509 }
510}
511
512static int
513sv_mix_init(struct snd_mixer *m)
514{
515 u_int32_t i, v;
516
517 for(i = v = 0; i < SOUND_MIXER_NRDEVICES; i++) {
518 if (mt[i].max) v |= (1 << i);
519 }
520 mix_setdevs(m, v);
521
522 for(i = v = 0; i < SOUND_MIXER_NRDEVICES; i++) {
523 if (mt[i].iselect) v |= (1 << i);
524 }
525 mix_setrecdevs(m, v);
526
527 return 0;
528}
529
530static int
531sv_mix_set(struct snd_mixer *m, u_int32_t dev, u_int32_t left, u_int32_t right)
532{
533 struct sc_info *sc = mix_getdevinfo(m);
534 return sv_gain(sc, dev, left, right);
535}
536
537static int
538sv_mix_setrecsrc(struct snd_mixer *m, u_int32_t mask)
539{
540 struct sc_info *sc = mix_getdevinfo(m);
541 u_int32_t i, v;
542
543 v = sv_indirect_get(sc, SV_REG_ADC_INPUT) & SV_INPUT_GAIN_MASK;
544 for(i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
545 if ((1 << i) & mask) {
546 v |= mt[i].iselect;
547 }
548 }
549 DEB(printf("sv_mix_setrecsrc: mask 0x%08x adc_input 0x%02x\n", mask, v));
550 return mask;
551}
552
553static kobj_method_t sv_mixer_methods[] = {
554 KOBJMETHOD(mixer_init, sv_mix_init),
555 KOBJMETHOD(mixer_set, sv_mix_set),
556 KOBJMETHOD(mixer_setrecsrc, sv_mix_setrecsrc),
557 { 0, 0 }
558};
559MIXER_DECLARE(sv_mixer);
560
561/* ------------------------------------------------------------------------- */
562/* Power management and reset */
563
564static void
565sv_power(struct sc_info *sc, int state)
566{
567 u_int8_t v;
568
569 switch (state) {
570 case 0:
571 /* power on */
572 v = sv_indirect_get(sc, SV_REG_ANALOG_PWR) &~ SV_ANALOG_OFF;
573 v |= SV_ANALOG_OFF_SRS | SV_ANALOG_OFF_SPLL;
574 sv_indirect_set(sc, SV_REG_ANALOG_PWR, v);
575 v = sv_indirect_get(sc, SV_REG_DIGITAL_PWR) &~ SV_DIGITAL_OFF;
576 v |= SV_DIGITAL_OFF_SYN | SV_DIGITAL_OFF_MU | SV_DIGITAL_OFF_GP;
577 sv_indirect_set(sc, SV_REG_DIGITAL_PWR, v);
578 break;
579 default:
580 /* power off */
581 v = sv_indirect_get(sc, SV_REG_ANALOG_PWR) | SV_ANALOG_OFF;
582 sv_indirect_set(sc, SV_REG_ANALOG_PWR, v);
583 v = sv_indirect_get(sc, SV_REG_DIGITAL_PWR) | SV_DIGITAL_OFF;
584 sv_indirect_set(sc, SV_REG_DIGITAL_PWR, SV_DIGITAL_OFF);
585 break;
586 }
587 DEB(printf("Power state %d\n", state));
588}
589
590static int
591sv_init(struct sc_info *sc)
592{
593 u_int8_t v;
594
595 /* Effect reset */
596 v = sv_direct_get(sc, SV_CM_CONTROL) & ~SV_CM_CONTROL_ENHANCED;
597 v |= SV_CM_CONTROL_RESET;
598 sv_direct_set(sc, SV_CM_CONTROL, v);
599 DELAY(50);
600
601 v = sv_direct_get(sc, SV_CM_CONTROL) & ~SV_CM_CONTROL_RESET;
602 sv_direct_set(sc, SV_CM_CONTROL, v);
603 DELAY(50);
604
605 /* Set in enhanced mode */
606 v = sv_direct_get(sc, SV_CM_CONTROL);
607 v |= SV_CM_CONTROL_ENHANCED;
608 sv_direct_set(sc, SV_CM_CONTROL, v);
609
610 /* Enable interrupts (UDM and MIDM are superfluous) */
611 v = sv_direct_get(sc, SV_CM_IMR);
612 v &= ~(SV_CM_IMR_AMSK | SV_CM_IMR_CMSK | SV_CM_IMR_SMSK);
613 sv_direct_set(sc, SV_CM_IMR, v);
614
615 /* Select ADC PLL for ADC clock */
616 v = sv_indirect_get(sc, SV_REG_CLOCK_SOURCE) & ~SV_CLOCK_ALTERNATE;
617 sv_indirect_set(sc, SV_REG_CLOCK_SOURCE, v);
618
619 /* Disable loopback - binds ADC and DAC rates */
620 v = sv_indirect_get(sc, SV_REG_LOOPBACK) & ~SV_LOOPBACK_ENABLE;
621 sv_indirect_set(sc, SV_REG_LOOPBACK, v);
622
623 /* Disable SRS */
624 v = sv_indirect_get(sc, SV_REG_SRS_SPACE) | SV_SRS_DISABLED;
625 sv_indirect_set(sc, SV_REG_SRS_SPACE, v);
626
627 /* Get revision */
628 sc->rev = sv_indirect_get(sc, SV_REG_REVISION);
629
630 return 0;
631}
632
633static int
634sv_suspend(device_t dev)
635{
636 struct sc_info *sc = pcm_getdevinfo(dev);
637
638 sc->rch.dma_was_active = sc->rch.dma_active;
639 svrchan_trigger(NULL, &sc->rch, PCMTRIG_ABORT);
640
641 sc->pch.dma_was_active = sc->pch.dma_active;
642 svrchan_trigger(NULL, &sc->pch, PCMTRIG_ABORT);
643
644 sv_mix_mute_all(sc);
645 sv_power(sc, 3);
646
647 return 0;
648}
649
650static int
651sv_resume(device_t dev)
652{
653 struct sc_info *sc = pcm_getdevinfo(dev);
654
655 sv_mix_mute_all(sc);
656 sv_power(sc, 0);
657 if (sv_init(sc) == -1) {
658 device_printf(dev, "unable to reinitialize the card\n");
659 return ENXIO;
660 }
661
662 if (mixer_reinit(dev) == -1) {
663 device_printf(dev, "unable to reinitialize the mixer\n");
664 return ENXIO;
665 }
666
667 if (sc->rch.dma_was_active) {
668 svrchan_trigger(0, &sc->rch, PCMTRIG_START);
669 }
670
671 if (sc->pch.dma_was_active) {
672 svpchan_trigger(0, &sc->pch, PCMTRIG_START);
673 }
674
675 return 0;
676}
677
678/* ------------------------------------------------------------------------- */
679/* Resource related */
680
681static void
682sv_intr(void *data)
683{
684 struct sc_info *sc = data;
685 u_int8_t status;
686
687 status = sv_direct_get(sc, SV_CM_STATUS);
688 if (status & SV_CM_STATUS_AINT)
689 chn_intr(sc->pch.channel);
690
691 if (status & SV_CM_STATUS_CINT)
692 chn_intr(sc->rch.channel);
693
694 status &= ~(SV_CM_STATUS_AINT|SV_CM_STATUS_CINT);
695 DEB(if (status) printf("intr 0x%02x ?\n", status));
696
697 return;
698}
699
700static int
701sv_probe(device_t dev)
702{
703 switch(pci_get_devid(dev)) {
704 case SV_PCI_ID:
705 device_set_desc(dev, "S3 Sonicvibes");
706 return 0;
707 default:
708 return ENXIO;
709 }
710}
711
712static int
713sv_attach(device_t dev) {
714 struct snddev_info *d;
715 struct sc_info *sc;
716 u_int32_t data;
717 char status[SND_STATUSLEN];
718 u_long midi_start, games_start, count, sdmaa, sdmac, ml, mu;
719
720 d = device_get_softc(dev);
721
722 sc = malloc(sizeof(struct sc_info), M_DEVBUF, M_NOWAIT | M_ZERO);
723 if (sc == NULL) {
724 device_printf(dev, "cannot allocate softc");
725 return ENXIO;
726 }
727 sc->dev = dev;
728
729 data = pci_read_config(dev, PCIR_COMMAND, 2);
730 data |= (PCIM_CMD_PORTEN|PCIM_CMD_BUSMASTEREN);
731 pci_write_config(dev, PCIR_COMMAND, data, 2);
732 data = pci_read_config(dev, PCIR_COMMAND, 2);
733
734#if __FreeBSD_version > 500000
735 if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
736 device_printf(dev, "chip is in D%d power mode "
737 "-- setting to D0\n", pci_get_powerstate(dev));
738 pci_set_powerstate(dev, PCI_POWERSTATE_D0);
739 }
740#endif
741 sc->enh_rid = SV_PCI_ENHANCED;
742 sc->enh_type = SYS_RES_IOPORT;
743 sc->enh_reg = bus_alloc_resource(dev, sc->enh_type,
744 &sc->enh_rid, 0, ~0,
745 SV_PCI_ENHANCED_SIZE, RF_ACTIVE);
746 if (sc->enh_reg == NULL) {
747 device_printf(dev, "sv_attach: cannot allocate enh\n");
748 return ENXIO;
749 }
750 sc->enh_st = rman_get_bustag(sc->enh_reg);
751 sc->enh_sh = rman_get_bushandle(sc->enh_reg);
752
753 data = pci_read_config(dev, SV_PCI_DMAA, 4);
754 DEB(printf("sv_attach: initial dmaa 0x%08x\n", data));
755 data = pci_read_config(dev, SV_PCI_DMAC, 4);
756 DEB(printf("sv_attach: initial dmac 0x%08x\n", data));
757
758 /* Initialize DMA_A and DMA_C */
759 pci_write_config(dev, SV_PCI_DMAA, SV_PCI_DMA_EXTENDED, 4);
760 pci_write_config(dev, SV_PCI_DMAC, 0, 4);
761
762 /* Register IRQ handler */
763 sc->irqid = 0;
764 sc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->irqid,
765 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
766 if (!sc->irq ||
767 bus_setup_intr(dev, sc->irq, INTR_TYPE_AV, sv_intr, sc, &sc->ih)) {
768 device_printf(dev, "sv_attach: Unable to map interrupt\n");
769 goto fail;
770 }
771
772 sc->bufsz = pcm_getbuffersize(dev, 4096, SV_DEFAULT_BUFSZ, 65536);
773 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0,
774 /*lowaddr*/BUS_SPACE_MAXADDR_24BIT,
775 /*highaddr*/BUS_SPACE_MAXADDR,
776 /*filter*/NULL, /*filterarg*/NULL,
777 /*maxsize*/sc->bufsz, /*nsegments*/1,
778 /*maxsegz*/0x3ffff, /*flags*/0,
779 /*lockfunc*/busdma_lock_mutex,
780 /*lockarg*/&Giant, &sc->parent_dmat) != 0) {
781 device_printf(dev, "sv_attach: Unable to create dma tag\n");
782 goto fail;
783 }
784
785 /* Power up and initialize */
786 sv_mix_mute_all(sc);
787 sv_power(sc, 0);
788 sv_init(sc);
789
790 if (mixer_init(dev, &sv_mixer_class, sc) != 0) {
791 device_printf(dev, "sv_attach: Mixer failed to initialize\n");
792 goto fail;
793 }
794
795 /* XXX This is a hack, and it's ugly. Okay, the deal is this
796 * card has two more io regions that available for automatic
797 * configuration by the pci code. These need to be allocated
798 * to used as control registers for the DMA engines.
799 * Unfortunately FBSD has no bus_space_foo() functions so we
800 * have to grab port space in region of existing resources. Go
801 * for space between midi and game ports.
802 */
803 bus_get_resource(dev, SYS_RES_IOPORT, SV_PCI_MIDI, &midi_start, &count);
804 bus_get_resource(dev, SYS_RES_IOPORT, SV_PCI_GAMES, &games_start, &count);
805
806 if (games_start < midi_start) {
807 ml = games_start;
808 mu = midi_start;
809 } else {
810 ml = midi_start;
811 mu = games_start;
812 }
813 /* Check assumptions about space availability and
814 alignment. How driver loaded can determine whether
815 games_start > midi_start or vice versa */
816 if ((mu - ml >= 0x800) ||
817 ((mu - ml) % 0x200)) {
818 device_printf(dev, "sv_attach: resource assumptions not met "
819 "(midi 0x%08lx, games 0x%08lx)\n",
820 midi_start, games_start);
821 goto fail;
822 }
823
824 sdmaa = ml + 0x40;
825 sdmac = sdmaa + 0x40;
826
827 /* Add resources to list of pci resources for this device - from here on
828 * they look like normal pci resources. */
829 bus_set_resource(dev, SYS_RES_IOPORT, SV_PCI_DMAA, sdmaa, SV_PCI_DMAA_SIZE);
830 bus_set_resource(dev, SYS_RES_IOPORT, SV_PCI_DMAC, sdmac, SV_PCI_DMAC_SIZE);
831
832 /* Cache resource short-cuts for dma_a */
833 sc->dmaa_rid = SV_PCI_DMAA;
834 sc->dmaa_type = SYS_RES_IOPORT;
835 sc->dmaa_reg = bus_alloc_resource(dev, sc->dmaa_type,
836 &sc->dmaa_rid, 0, ~0,
837 SV_PCI_ENHANCED_SIZE, RF_ACTIVE);
838 if (sc->dmaa_reg == NULL) {
839 device_printf(dev, "sv_attach: cannot allocate dmaa\n");
840 goto fail;
841 }
842 sc->dmaa_st = rman_get_bustag(sc->dmaa_reg);
843 sc->dmaa_sh = rman_get_bushandle(sc->dmaa_reg);
844
845 /* Poke port into dma_a configuration, nb bit flags to enable dma */
846 data = pci_read_config(dev, SV_PCI_DMAA, 4) | SV_PCI_DMA_ENABLE | SV_PCI_DMA_EXTENDED;
847 data = ((u_int32_t)sdmaa & 0xfffffff0) | (data & 0x0f);
848 pci_write_config(dev, SV_PCI_DMAA, data, 4);
849 DEB(printf("dmaa: 0x%x 0x%x\n", data, pci_read_config(dev, SV_PCI_DMAA, 4)));
850
851 /* Cache resource short-cuts for dma_c */
852 sc->dmac_rid = SV_PCI_DMAC;
853 sc->dmac_type = SYS_RES_IOPORT;
854 sc->dmac_reg = bus_alloc_resource(dev, sc->dmac_type,
855 &sc->dmac_rid, 0, ~0,
856 SV_PCI_ENHANCED_SIZE, RF_ACTIVE);
857 if (sc->dmac_reg == NULL) {
858 device_printf(dev, "sv_attach: cannot allocate dmac\n");
859 goto fail;
860 }
861 sc->dmac_st = rman_get_bustag(sc->dmac_reg);
862 sc->dmac_sh = rman_get_bushandle(sc->dmac_reg);
863
864 /* Poke port into dma_c configuration, nb bit flags to enable dma */
865 data = pci_read_config(dev, SV_PCI_DMAC, 4) | SV_PCI_DMA_ENABLE | SV_PCI_DMA_EXTENDED;
866 data = ((u_int32_t)sdmac & 0xfffffff0) | (data & 0x0f);
867 pci_write_config(dev, SV_PCI_DMAC, data, 4);
868 DEB(printf("dmac: 0x%x 0x%x\n", data, pci_read_config(dev, SV_PCI_DMAC, 4)));
869
870 if (bootverbose)
871 printf("Sonicvibes: revision %d.\n", sc->rev);
872
873 if (pcm_register(dev, sc, 1, 1)) {
874 device_printf(dev, "sv_attach: pcm_register fail\n");
875 goto fail;
876 }
877
878 pcm_addchan(dev, PCMDIR_PLAY, &svpchan_class, sc);
879 pcm_addchan(dev, PCMDIR_REC, &svrchan_class, sc);
880
| 40
41/* ------------------------------------------------------------------------- */
42/* Constants */
43
44#define SV_PCI_ID 0xca005333
45#define SV_DEFAULT_BUFSZ 16384
46#define SV_MIN_BLKSZ 128
47#define SV_INTR_PER_BUFFER 2
48
49#ifndef DEB
50#define DEB(x) /* (x) */
51#endif
52
53/* ------------------------------------------------------------------------- */
54/* Structures */
55
56struct sc_info;
57
58struct sc_chinfo {
59 struct sc_info *parent;
60 struct pcm_channel *channel;
61 struct snd_dbuf *buffer;
62 u_int32_t fmt, spd;
63 int dir;
64 int dma_active, dma_was_active;
65};
66
67struct sc_info {
68 device_t dev;
69
70 /* DMA buffer allocator */
71 bus_dma_tag_t parent_dmat;
72
73 /* Enhanced register resources */
74 struct resource *enh_reg;
75 bus_space_tag_t enh_st;
76 bus_space_handle_t enh_sh;
77 int enh_type;
78 int enh_rid;
79
80 /* DMA configuration */
81 struct resource *dmaa_reg, *dmac_reg;
82 bus_space_tag_t dmaa_st, dmac_st;
83 bus_space_handle_t dmaa_sh, dmac_sh;
84 int dmaa_type, dmac_type;
85 int dmaa_rid, dmac_rid;
86
87 /* Interrupt resources */
88 struct resource *irq;
89 int irqid;
90 void *ih;
91
92 /* User configurable buffer size */
93 unsigned int bufsz;
94
95 struct sc_chinfo rch, pch;
96 u_int8_t rev;
97};
98
99static u_int32_t sc_fmt[] = {
100 AFMT_U8,
101 AFMT_U8 | AFMT_STEREO,
102 AFMT_S16_LE,
103 AFMT_S16_LE | AFMT_STEREO,
104 0
105};
106
107static struct pcmchan_caps sc_caps = {8000, 48000, sc_fmt, 0};
108
109/* ------------------------------------------------------------------------- */
110/* Register Manipulations */
111
112#define sv_direct_set(x, y, z) _sv_direct_set(x, y, z, __LINE__)
113
114static u_int8_t
115sv_direct_get(struct sc_info *sc, u_int8_t reg)
116{
117 return bus_space_read_1(sc->enh_st, sc->enh_sh, reg);
118}
119
120static void
121_sv_direct_set(struct sc_info *sc, u_int8_t reg, u_int8_t val, int line)
122{
123 u_int8_t n;
124 bus_space_write_1(sc->enh_st, sc->enh_sh, reg, val);
125
126 n = sv_direct_get(sc, reg);
127 if (n != val) {
128 device_printf(sc->dev, "sv_direct_set register 0x%02x %d != %d from line %d\n", reg, n, val, line);
129 }
130}
131
132static u_int8_t
133sv_indirect_get(struct sc_info *sc, u_int8_t reg)
134{
135 if (reg == SV_REG_FORMAT || reg == SV_REG_ANALOG_PWR)
136 reg |= SV_CM_INDEX_MCE;
137
138 bus_space_write_1(sc->enh_st, sc->enh_sh, SV_CM_INDEX, reg);
139 return bus_space_read_1(sc->enh_st, sc->enh_sh, SV_CM_DATA);
140}
141
142#define sv_indirect_set(x, y, z) _sv_indirect_set(x, y, z, __LINE__)
143
144static void
145_sv_indirect_set(struct sc_info *sc, u_int8_t reg, u_int8_t val, int line)
146{
147 if (reg == SV_REG_FORMAT || reg == SV_REG_ANALOG_PWR)
148 reg |= SV_CM_INDEX_MCE;
149
150 bus_space_write_1(sc->enh_st, sc->enh_sh, SV_CM_INDEX, reg);
151 bus_space_write_1(sc->enh_st, sc->enh_sh, SV_CM_DATA, val);
152
153 reg &= ~SV_CM_INDEX_MCE;
154 if (reg != SV_REG_ADC_PLLM) {
155 u_int8_t n;
156 n = sv_indirect_get(sc, reg);
157 if (n != val) {
158 device_printf(sc->dev, "sv_indirect_set register 0x%02x %d != %d line %d\n", reg, n, val, line);
159 }
160 }
161}
162
163static void
164sv_dma_set_config(bus_space_tag_t st, bus_space_handle_t sh,
165 u_int32_t base, u_int32_t count, u_int8_t mode)
166{
167 bus_space_write_4(st, sh, SV_DMA_ADDR, base);
168 bus_space_write_4(st, sh, SV_DMA_COUNT, count & 0xffffff);
169 bus_space_write_1(st, sh, SV_DMA_MODE, mode);
170
171 DEB(printf("base 0x%08x count %5d mode 0x%02x\n",
172 base, count, mode));
173}
174
175static u_int32_t
176sv_dma_get_count(bus_space_tag_t st, bus_space_handle_t sh)
177{
178 return bus_space_read_4(st, sh, SV_DMA_COUNT) & 0xffffff;
179}
180
181/* ------------------------------------------------------------------------- */
182/* Play / Record Common Interface */
183
184static void *
185svchan_init(kobj_t obj, void *devinfo, struct snd_dbuf *b, struct pcm_channel *c, int dir)
186{
187 struct sc_info *sc = devinfo;
188 struct sc_chinfo *ch;
189 ch = (dir == PCMDIR_PLAY) ? &sc->pch : &sc->rch;
190
191 ch->parent = sc;
192 ch->channel = c;
193 ch->dir = dir;
194
195 if (sndbuf_alloc(b, sc->parent_dmat, sc->bufsz) != 0) {
196 DEB(printf("svchan_init failed\n"));
197 return NULL;
198 }
199 ch->buffer = b;
200 ch->fmt = AFMT_U8;
201 ch->spd = DSP_DEFAULT_SPEED;
202 ch->dma_active = ch->dma_was_active = 0;
203
204 return ch;
205}
206
207static struct pcmchan_caps *
208svchan_getcaps(kobj_t obj, void *data)
209{
210 return &sc_caps;
211}
212
213static int
214svchan_setblocksize(kobj_t obj, void *data, u_int32_t blocksize)
215{
216 struct sc_chinfo *ch = data;
217 struct sc_info *sc = ch->parent;
218
219 /* user has requested interrupts every blocksize bytes */
220 RANGE(blocksize, SV_MIN_BLKSZ, sc->bufsz / SV_INTR_PER_BUFFER);
221 sndbuf_resize(ch->buffer, SV_INTR_PER_BUFFER, blocksize);
222 DEB(printf("svchan_setblocksize: %d\n", blocksize));
223 return blocksize;
224}
225
226static int
227svchan_setformat(kobj_t obj, void *data, u_int32_t format)
228{
229 struct sc_chinfo *ch = data;
230 /* NB Just note format here as setting format register
231 * generates noise if dma channel is inactive. */
232 ch->fmt = (format & AFMT_STEREO) ? SV_AFMT_STEREO : SV_AFMT_MONO;
233 ch->fmt |= (format & AFMT_16BIT) ? SV_AFMT_S16 : SV_AFMT_U8;
234 return 0;
235}
236
237static int
238svchan_setspeed(kobj_t obj, void *data, u_int32_t speed)
239{
240 struct sc_chinfo *ch = data;
241 RANGE(speed, 8000, 48000);
242 ch->spd = speed;
243 return speed;
244}
245
246/* ------------------------------------------------------------------------- */
247/* Recording interface */
248
249static int
250sv_set_recspeed(struct sc_info *sc, u_int32_t speed)
251{
252 u_int32_t f_out, f_actual;
253 u_int32_t rs, re, r, best_r = 0, r2, t, n, best_n = 0;
254 int32_t m, best_m = 0, ms, me, err, min_err;
255
256 /* This algorithm is a variant described in sonicvibes.pdf
257 * appendix A. This search is marginally more extensive and
258 * results in (nominally) better sample rate matching. */
259
260 f_out = SV_F_SCALE * speed;
261 min_err = 0x7fffffff;
262
263 /* Find bounds of r to examine, rs <= r <= re */
264 t = 80000000 / f_out;
265 for (rs = 1; (1 << rs) < t; rs++);
266
267 t = 150000000 / f_out;
268 for (re = 1; (2 << re) < t; re++);
269 if (re > 7) re = 7;
270
271 /* Search over r, n, m */
272 for (r = rs; r <= re; r++) {
273 r2 = (1 << r);
274 for (n = 3; n < 34; n++) {
275 m = f_out * n / (SV_F_REF / r2);
276 ms = (m > 3) ? (m - 1) : 3;
277 me = (m < 129) ? (m + 1) : 129;
278 for (m = ms; m <= me; m++) {
279 f_actual = m * SV_F_REF / (n * r2);
280 if (f_actual > f_out) {
281 err = f_actual - f_out;
282 } else {
283 err = f_out - f_actual;
284 }
285 if (err < min_err) {
286 best_r = r;
287 best_m = m - 2;
288 best_n = n - 2;
289 min_err = err;
290 if (err == 0) break;
291 }
292 }
293 }
294 }
295
296 sv_indirect_set(sc, SV_REG_ADC_PLLM, best_m);
297 sv_indirect_set(sc, SV_REG_ADC_PLLN,
298 SV_ADC_PLLN(best_n) | SV_ADC_PLLR(best_r));
299 DEB(printf("svrchan_setspeed: %d -> PLLM 0x%02x PLLNR 0x%08x\n",
300 speed,
301 sv_indirect_get(sc, SV_REG_ADC_PLLM),
302 sv_indirect_get(sc, SV_REG_ADC_PLLN)));
303 return 0;
304}
305
306static int
307svrchan_trigger(kobj_t obj, void *data, int go)
308{
309 struct sc_chinfo *ch = data;
310 struct sc_info *sc = ch->parent;
311 u_int32_t count, enable;
312 u_int8_t v;
313
314 switch(go) {
315 case PCMTRIG_START:
316 /* Set speed */
317 sv_set_recspeed(sc, ch->spd);
318
319 /* Set format */
320 v = sv_indirect_get(sc, SV_REG_FORMAT) & ~SV_AFMT_DMAC_MSK;
321 v |= SV_AFMT_DMAC(ch->fmt);
322 sv_indirect_set(sc, SV_REG_FORMAT, v);
323
324 /* Program DMA */
325 count = sndbuf_getsize(ch->buffer) / 2; /* DMAC uses words */
326 sv_dma_set_config(sc->dmac_st, sc->dmac_sh,
327 sndbuf_getbufaddr(ch->buffer),
328 count - 1,
329 SV_DMA_MODE_AUTO | SV_DMA_MODE_RD);
330 count = count / SV_INTR_PER_BUFFER - 1;
331 sv_indirect_set(sc, SV_REG_DMAC_COUNT_HI, count >> 8);
332 sv_indirect_set(sc, SV_REG_DMAC_COUNT_LO, count & 0xff);
333
334 /* Enable DMA */
335 enable = sv_indirect_get(sc, SV_REG_ENABLE) | SV_RECORD_ENABLE;
336 sv_indirect_set(sc, SV_REG_ENABLE, enable);
337 ch->dma_active = 1;
338 break;
339 case PCMTRIG_ABORT:
340 enable = sv_indirect_get(sc, SV_REG_ENABLE) & ~SV_RECORD_ENABLE;
341 sv_indirect_set(sc, SV_REG_ENABLE, enable);
342 ch->dma_active = 0;
343 break;
344 }
345
346 return 0;
347}
348
349static int
350svrchan_getptr(kobj_t obj, void *data)
351{
352 struct sc_chinfo *ch = data;
353 struct sc_info *sc = ch->parent;
354 u_int32_t sz, remain;
355
356 sz = sndbuf_getsize(ch->buffer);
357 /* DMAC uses words */
358 remain = (sv_dma_get_count(sc->dmac_st, sc->dmac_sh) + 1) * 2;
359 return sz - remain;
360}
361
362static kobj_method_t svrchan_methods[] = {
363 KOBJMETHOD(channel_init, svchan_init),
364 KOBJMETHOD(channel_setformat, svchan_setformat),
365 KOBJMETHOD(channel_setspeed, svchan_setspeed),
366 KOBJMETHOD(channel_setblocksize, svchan_setblocksize),
367 KOBJMETHOD(channel_trigger, svrchan_trigger),
368 KOBJMETHOD(channel_getptr, svrchan_getptr),
369 KOBJMETHOD(channel_getcaps, svchan_getcaps),
370 { 0, 0 }
371};
372CHANNEL_DECLARE(svrchan);
373
374/* ------------------------------------------------------------------------- */
375/* Playback interface */
376
377static int
378svpchan_trigger(kobj_t obj, void *data, int go)
379{
380 struct sc_chinfo *ch = data;
381 struct sc_info *sc = ch->parent;
382 u_int32_t count, enable, speed;
383 u_int8_t v;
384
385 switch(go) {
386 case PCMTRIG_START:
387 /* Set speed */
388 speed = (ch->spd * 65536) / 48000;
389 if (speed > 65535)
390 speed = 65535;
391 sv_indirect_set(sc, SV_REG_PCM_SAMPLING_HI, speed >> 8);
392 sv_indirect_set(sc, SV_REG_PCM_SAMPLING_LO, speed & 0xff);
393
394 /* Set format */
395 v = sv_indirect_get(sc, SV_REG_FORMAT) & ~SV_AFMT_DMAA_MSK;
396 v |= SV_AFMT_DMAA(ch->fmt);
397 sv_indirect_set(sc, SV_REG_FORMAT, v);
398
399 /* Program DMA */
400 count = sndbuf_getsize(ch->buffer);
401 sv_dma_set_config(sc->dmaa_st, sc->dmaa_sh,
402 sndbuf_getbufaddr(ch->buffer),
403 count - 1,
404 SV_DMA_MODE_AUTO | SV_DMA_MODE_WR);
405 count = count / SV_INTR_PER_BUFFER - 1;
406 sv_indirect_set(sc, SV_REG_DMAA_COUNT_HI, count >> 8);
407 sv_indirect_set(sc, SV_REG_DMAA_COUNT_LO, count & 0xff);
408
409 /* Enable DMA */
410 enable = sv_indirect_get(sc, SV_REG_ENABLE);
411 enable = (enable | SV_PLAY_ENABLE) & ~SV_PLAYBACK_PAUSE;
412 sv_indirect_set(sc, SV_REG_ENABLE, enable);
413 ch->dma_active = 1;
414 break;
415 case PCMTRIG_ABORT:
416 enable = sv_indirect_get(sc, SV_REG_ENABLE) & ~SV_PLAY_ENABLE;
417 sv_indirect_set(sc, SV_REG_ENABLE, enable);
418 ch->dma_active = 0;
419 break;
420 }
421
422 return 0;
423}
424
425static int
426svpchan_getptr(kobj_t obj, void *data)
427{
428 struct sc_chinfo *ch = data;
429 struct sc_info *sc = ch->parent;
430 u_int32_t sz, remain;
431
432 sz = sndbuf_getsize(ch->buffer);
433 /* DMAA uses bytes */
434 remain = sv_dma_get_count(sc->dmaa_st, sc->dmaa_sh) + 1;
435 return (sz - remain);
436}
437
438static kobj_method_t svpchan_methods[] = {
439 KOBJMETHOD(channel_init, svchan_init),
440 KOBJMETHOD(channel_setformat, svchan_setformat),
441 KOBJMETHOD(channel_setspeed, svchan_setspeed),
442 KOBJMETHOD(channel_setblocksize, svchan_setblocksize),
443 KOBJMETHOD(channel_trigger, svpchan_trigger),
444 KOBJMETHOD(channel_getptr, svpchan_getptr),
445 KOBJMETHOD(channel_getcaps, svchan_getcaps),
446 { 0, 0 }
447};
448CHANNEL_DECLARE(svpchan);
449
450/* ------------------------------------------------------------------------- */
451/* Mixer support */
452
453struct sv_mix_props {
454 u_int8_t reg; /* Register */
455 u_int8_t stereo:1; /* Supports 2 channels */
456 u_int8_t mute:1; /* Supports muting */
457 u_int8_t neg:1; /* Negative gain */
458 u_int8_t max; /* Max gain */
459 u_int8_t iselect; /* Input selector */
460} static const mt [SOUND_MIXER_NRDEVICES] = {
461 [SOUND_MIXER_LINE1] = {SV_REG_AUX1, 1, 1, 1, SV_DEFAULT_MAX, SV_INPUT_AUX1},
462 [SOUND_MIXER_CD] = {SV_REG_CD, 1, 1, 1, SV_DEFAULT_MAX, SV_INPUT_CD},
463 [SOUND_MIXER_LINE] = {SV_REG_LINE, 1, 1, 1, SV_DEFAULT_MAX, SV_INPUT_LINE},
464 [SOUND_MIXER_MIC] = {SV_REG_MIC, 0, 1, 1, SV_MIC_MAX, SV_INPUT_MIC},
465 [SOUND_MIXER_SYNTH] = {SV_REG_SYNTH, 0, 1, 1, SV_DEFAULT_MAX, 0},
466 [SOUND_MIXER_LINE2] = {SV_REG_AUX2, 1, 1, 1, SV_DEFAULT_MAX, SV_INPUT_AUX2},
467 [SOUND_MIXER_VOLUME] = {SV_REG_MIX, 1, 1, 1, SV_DEFAULT_MAX, 0},
468 [SOUND_MIXER_PCM] = {SV_REG_PCM, 1, 1, 1, SV_PCM_MAX, 0},
469 [SOUND_MIXER_RECLEV] = {SV_REG_ADC_INPUT, 1, 0, 0, SV_ADC_MAX, 0},
470};
471
472static void
473sv_channel_gain(struct sc_info *sc, u_int32_t dev, u_int32_t gain, u_int32_t channel)
474{
475 u_int8_t v;
476 int32_t g;
477
478 g = mt[dev].max * gain / 100;
479 if (mt[dev].neg)
480 g = mt[dev].max - g;
481 v = sv_indirect_get(sc, mt[dev].reg + channel) & ~mt[dev].max;
482 v |= g;
483
484 if (mt[dev].mute) {
485 if (gain == 0) {
486 v |= SV_MUTE;
487 } else {
488 v &= ~SV_MUTE;
489 }
490 }
491 sv_indirect_set(sc, mt[dev].reg + channel, v);
492}
493
494static int
495sv_gain(struct sc_info *sc, u_int32_t dev, u_int32_t left, u_int32_t right)
496{
497 sv_channel_gain(sc, dev, left, 0);
498 if (mt[dev].stereo)
499 sv_channel_gain(sc, dev, right, 1);
500 return 0;
501}
502
503static void
504sv_mix_mute_all(struct sc_info *sc)
505{
506 int32_t i;
507 for (i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
508 if (mt[i].reg) sv_gain(sc, i, 0, 0);
509 }
510}
511
512static int
513sv_mix_init(struct snd_mixer *m)
514{
515 u_int32_t i, v;
516
517 for(i = v = 0; i < SOUND_MIXER_NRDEVICES; i++) {
518 if (mt[i].max) v |= (1 << i);
519 }
520 mix_setdevs(m, v);
521
522 for(i = v = 0; i < SOUND_MIXER_NRDEVICES; i++) {
523 if (mt[i].iselect) v |= (1 << i);
524 }
525 mix_setrecdevs(m, v);
526
527 return 0;
528}
529
530static int
531sv_mix_set(struct snd_mixer *m, u_int32_t dev, u_int32_t left, u_int32_t right)
532{
533 struct sc_info *sc = mix_getdevinfo(m);
534 return sv_gain(sc, dev, left, right);
535}
536
537static int
538sv_mix_setrecsrc(struct snd_mixer *m, u_int32_t mask)
539{
540 struct sc_info *sc = mix_getdevinfo(m);
541 u_int32_t i, v;
542
543 v = sv_indirect_get(sc, SV_REG_ADC_INPUT) & SV_INPUT_GAIN_MASK;
544 for(i = 0; i < SOUND_MIXER_NRDEVICES; i++) {
545 if ((1 << i) & mask) {
546 v |= mt[i].iselect;
547 }
548 }
549 DEB(printf("sv_mix_setrecsrc: mask 0x%08x adc_input 0x%02x\n", mask, v));
550 return mask;
551}
552
553static kobj_method_t sv_mixer_methods[] = {
554 KOBJMETHOD(mixer_init, sv_mix_init),
555 KOBJMETHOD(mixer_set, sv_mix_set),
556 KOBJMETHOD(mixer_setrecsrc, sv_mix_setrecsrc),
557 { 0, 0 }
558};
559MIXER_DECLARE(sv_mixer);
560
561/* ------------------------------------------------------------------------- */
562/* Power management and reset */
563
564static void
565sv_power(struct sc_info *sc, int state)
566{
567 u_int8_t v;
568
569 switch (state) {
570 case 0:
571 /* power on */
572 v = sv_indirect_get(sc, SV_REG_ANALOG_PWR) &~ SV_ANALOG_OFF;
573 v |= SV_ANALOG_OFF_SRS | SV_ANALOG_OFF_SPLL;
574 sv_indirect_set(sc, SV_REG_ANALOG_PWR, v);
575 v = sv_indirect_get(sc, SV_REG_DIGITAL_PWR) &~ SV_DIGITAL_OFF;
576 v |= SV_DIGITAL_OFF_SYN | SV_DIGITAL_OFF_MU | SV_DIGITAL_OFF_GP;
577 sv_indirect_set(sc, SV_REG_DIGITAL_PWR, v);
578 break;
579 default:
580 /* power off */
581 v = sv_indirect_get(sc, SV_REG_ANALOG_PWR) | SV_ANALOG_OFF;
582 sv_indirect_set(sc, SV_REG_ANALOG_PWR, v);
583 v = sv_indirect_get(sc, SV_REG_DIGITAL_PWR) | SV_DIGITAL_OFF;
584 sv_indirect_set(sc, SV_REG_DIGITAL_PWR, SV_DIGITAL_OFF);
585 break;
586 }
587 DEB(printf("Power state %d\n", state));
588}
589
590static int
591sv_init(struct sc_info *sc)
592{
593 u_int8_t v;
594
595 /* Effect reset */
596 v = sv_direct_get(sc, SV_CM_CONTROL) & ~SV_CM_CONTROL_ENHANCED;
597 v |= SV_CM_CONTROL_RESET;
598 sv_direct_set(sc, SV_CM_CONTROL, v);
599 DELAY(50);
600
601 v = sv_direct_get(sc, SV_CM_CONTROL) & ~SV_CM_CONTROL_RESET;
602 sv_direct_set(sc, SV_CM_CONTROL, v);
603 DELAY(50);
604
605 /* Set in enhanced mode */
606 v = sv_direct_get(sc, SV_CM_CONTROL);
607 v |= SV_CM_CONTROL_ENHANCED;
608 sv_direct_set(sc, SV_CM_CONTROL, v);
609
610 /* Enable interrupts (UDM and MIDM are superfluous) */
611 v = sv_direct_get(sc, SV_CM_IMR);
612 v &= ~(SV_CM_IMR_AMSK | SV_CM_IMR_CMSK | SV_CM_IMR_SMSK);
613 sv_direct_set(sc, SV_CM_IMR, v);
614
615 /* Select ADC PLL for ADC clock */
616 v = sv_indirect_get(sc, SV_REG_CLOCK_SOURCE) & ~SV_CLOCK_ALTERNATE;
617 sv_indirect_set(sc, SV_REG_CLOCK_SOURCE, v);
618
619 /* Disable loopback - binds ADC and DAC rates */
620 v = sv_indirect_get(sc, SV_REG_LOOPBACK) & ~SV_LOOPBACK_ENABLE;
621 sv_indirect_set(sc, SV_REG_LOOPBACK, v);
622
623 /* Disable SRS */
624 v = sv_indirect_get(sc, SV_REG_SRS_SPACE) | SV_SRS_DISABLED;
625 sv_indirect_set(sc, SV_REG_SRS_SPACE, v);
626
627 /* Get revision */
628 sc->rev = sv_indirect_get(sc, SV_REG_REVISION);
629
630 return 0;
631}
632
633static int
634sv_suspend(device_t dev)
635{
636 struct sc_info *sc = pcm_getdevinfo(dev);
637
638 sc->rch.dma_was_active = sc->rch.dma_active;
639 svrchan_trigger(NULL, &sc->rch, PCMTRIG_ABORT);
640
641 sc->pch.dma_was_active = sc->pch.dma_active;
642 svrchan_trigger(NULL, &sc->pch, PCMTRIG_ABORT);
643
644 sv_mix_mute_all(sc);
645 sv_power(sc, 3);
646
647 return 0;
648}
649
650static int
651sv_resume(device_t dev)
652{
653 struct sc_info *sc = pcm_getdevinfo(dev);
654
655 sv_mix_mute_all(sc);
656 sv_power(sc, 0);
657 if (sv_init(sc) == -1) {
658 device_printf(dev, "unable to reinitialize the card\n");
659 return ENXIO;
660 }
661
662 if (mixer_reinit(dev) == -1) {
663 device_printf(dev, "unable to reinitialize the mixer\n");
664 return ENXIO;
665 }
666
667 if (sc->rch.dma_was_active) {
668 svrchan_trigger(0, &sc->rch, PCMTRIG_START);
669 }
670
671 if (sc->pch.dma_was_active) {
672 svpchan_trigger(0, &sc->pch, PCMTRIG_START);
673 }
674
675 return 0;
676}
677
678/* ------------------------------------------------------------------------- */
679/* Resource related */
680
681static void
682sv_intr(void *data)
683{
684 struct sc_info *sc = data;
685 u_int8_t status;
686
687 status = sv_direct_get(sc, SV_CM_STATUS);
688 if (status & SV_CM_STATUS_AINT)
689 chn_intr(sc->pch.channel);
690
691 if (status & SV_CM_STATUS_CINT)
692 chn_intr(sc->rch.channel);
693
694 status &= ~(SV_CM_STATUS_AINT|SV_CM_STATUS_CINT);
695 DEB(if (status) printf("intr 0x%02x ?\n", status));
696
697 return;
698}
699
700static int
701sv_probe(device_t dev)
702{
703 switch(pci_get_devid(dev)) {
704 case SV_PCI_ID:
705 device_set_desc(dev, "S3 Sonicvibes");
706 return 0;
707 default:
708 return ENXIO;
709 }
710}
711
712static int
713sv_attach(device_t dev) {
714 struct snddev_info *d;
715 struct sc_info *sc;
716 u_int32_t data;
717 char status[SND_STATUSLEN];
718 u_long midi_start, games_start, count, sdmaa, sdmac, ml, mu;
719
720 d = device_get_softc(dev);
721
722 sc = malloc(sizeof(struct sc_info), M_DEVBUF, M_NOWAIT | M_ZERO);
723 if (sc == NULL) {
724 device_printf(dev, "cannot allocate softc");
725 return ENXIO;
726 }
727 sc->dev = dev;
728
729 data = pci_read_config(dev, PCIR_COMMAND, 2);
730 data |= (PCIM_CMD_PORTEN|PCIM_CMD_BUSMASTEREN);
731 pci_write_config(dev, PCIR_COMMAND, data, 2);
732 data = pci_read_config(dev, PCIR_COMMAND, 2);
733
734#if __FreeBSD_version > 500000
735 if (pci_get_powerstate(dev) != PCI_POWERSTATE_D0) {
736 device_printf(dev, "chip is in D%d power mode "
737 "-- setting to D0\n", pci_get_powerstate(dev));
738 pci_set_powerstate(dev, PCI_POWERSTATE_D0);
739 }
740#endif
741 sc->enh_rid = SV_PCI_ENHANCED;
742 sc->enh_type = SYS_RES_IOPORT;
743 sc->enh_reg = bus_alloc_resource(dev, sc->enh_type,
744 &sc->enh_rid, 0, ~0,
745 SV_PCI_ENHANCED_SIZE, RF_ACTIVE);
746 if (sc->enh_reg == NULL) {
747 device_printf(dev, "sv_attach: cannot allocate enh\n");
748 return ENXIO;
749 }
750 sc->enh_st = rman_get_bustag(sc->enh_reg);
751 sc->enh_sh = rman_get_bushandle(sc->enh_reg);
752
753 data = pci_read_config(dev, SV_PCI_DMAA, 4);
754 DEB(printf("sv_attach: initial dmaa 0x%08x\n", data));
755 data = pci_read_config(dev, SV_PCI_DMAC, 4);
756 DEB(printf("sv_attach: initial dmac 0x%08x\n", data));
757
758 /* Initialize DMA_A and DMA_C */
759 pci_write_config(dev, SV_PCI_DMAA, SV_PCI_DMA_EXTENDED, 4);
760 pci_write_config(dev, SV_PCI_DMAC, 0, 4);
761
762 /* Register IRQ handler */
763 sc->irqid = 0;
764 sc->irq = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->irqid,
765 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
766 if (!sc->irq ||
767 bus_setup_intr(dev, sc->irq, INTR_TYPE_AV, sv_intr, sc, &sc->ih)) {
768 device_printf(dev, "sv_attach: Unable to map interrupt\n");
769 goto fail;
770 }
771
772 sc->bufsz = pcm_getbuffersize(dev, 4096, SV_DEFAULT_BUFSZ, 65536);
773 if (bus_dma_tag_create(/*parent*/NULL, /*alignment*/2, /*boundary*/0,
774 /*lowaddr*/BUS_SPACE_MAXADDR_24BIT,
775 /*highaddr*/BUS_SPACE_MAXADDR,
776 /*filter*/NULL, /*filterarg*/NULL,
777 /*maxsize*/sc->bufsz, /*nsegments*/1,
778 /*maxsegz*/0x3ffff, /*flags*/0,
779 /*lockfunc*/busdma_lock_mutex,
780 /*lockarg*/&Giant, &sc->parent_dmat) != 0) {
781 device_printf(dev, "sv_attach: Unable to create dma tag\n");
782 goto fail;
783 }
784
785 /* Power up and initialize */
786 sv_mix_mute_all(sc);
787 sv_power(sc, 0);
788 sv_init(sc);
789
790 if (mixer_init(dev, &sv_mixer_class, sc) != 0) {
791 device_printf(dev, "sv_attach: Mixer failed to initialize\n");
792 goto fail;
793 }
794
795 /* XXX This is a hack, and it's ugly. Okay, the deal is this
796 * card has two more io regions that available for automatic
797 * configuration by the pci code. These need to be allocated
798 * to used as control registers for the DMA engines.
799 * Unfortunately FBSD has no bus_space_foo() functions so we
800 * have to grab port space in region of existing resources. Go
801 * for space between midi and game ports.
802 */
803 bus_get_resource(dev, SYS_RES_IOPORT, SV_PCI_MIDI, &midi_start, &count);
804 bus_get_resource(dev, SYS_RES_IOPORT, SV_PCI_GAMES, &games_start, &count);
805
806 if (games_start < midi_start) {
807 ml = games_start;
808 mu = midi_start;
809 } else {
810 ml = midi_start;
811 mu = games_start;
812 }
813 /* Check assumptions about space availability and
814 alignment. How driver loaded can determine whether
815 games_start > midi_start or vice versa */
816 if ((mu - ml >= 0x800) ||
817 ((mu - ml) % 0x200)) {
818 device_printf(dev, "sv_attach: resource assumptions not met "
819 "(midi 0x%08lx, games 0x%08lx)\n",
820 midi_start, games_start);
821 goto fail;
822 }
823
824 sdmaa = ml + 0x40;
825 sdmac = sdmaa + 0x40;
826
827 /* Add resources to list of pci resources for this device - from here on
828 * they look like normal pci resources. */
829 bus_set_resource(dev, SYS_RES_IOPORT, SV_PCI_DMAA, sdmaa, SV_PCI_DMAA_SIZE);
830 bus_set_resource(dev, SYS_RES_IOPORT, SV_PCI_DMAC, sdmac, SV_PCI_DMAC_SIZE);
831
832 /* Cache resource short-cuts for dma_a */
833 sc->dmaa_rid = SV_PCI_DMAA;
834 sc->dmaa_type = SYS_RES_IOPORT;
835 sc->dmaa_reg = bus_alloc_resource(dev, sc->dmaa_type,
836 &sc->dmaa_rid, 0, ~0,
837 SV_PCI_ENHANCED_SIZE, RF_ACTIVE);
838 if (sc->dmaa_reg == NULL) {
839 device_printf(dev, "sv_attach: cannot allocate dmaa\n");
840 goto fail;
841 }
842 sc->dmaa_st = rman_get_bustag(sc->dmaa_reg);
843 sc->dmaa_sh = rman_get_bushandle(sc->dmaa_reg);
844
845 /* Poke port into dma_a configuration, nb bit flags to enable dma */
846 data = pci_read_config(dev, SV_PCI_DMAA, 4) | SV_PCI_DMA_ENABLE | SV_PCI_DMA_EXTENDED;
847 data = ((u_int32_t)sdmaa & 0xfffffff0) | (data & 0x0f);
848 pci_write_config(dev, SV_PCI_DMAA, data, 4);
849 DEB(printf("dmaa: 0x%x 0x%x\n", data, pci_read_config(dev, SV_PCI_DMAA, 4)));
850
851 /* Cache resource short-cuts for dma_c */
852 sc->dmac_rid = SV_PCI_DMAC;
853 sc->dmac_type = SYS_RES_IOPORT;
854 sc->dmac_reg = bus_alloc_resource(dev, sc->dmac_type,
855 &sc->dmac_rid, 0, ~0,
856 SV_PCI_ENHANCED_SIZE, RF_ACTIVE);
857 if (sc->dmac_reg == NULL) {
858 device_printf(dev, "sv_attach: cannot allocate dmac\n");
859 goto fail;
860 }
861 sc->dmac_st = rman_get_bustag(sc->dmac_reg);
862 sc->dmac_sh = rman_get_bushandle(sc->dmac_reg);
863
864 /* Poke port into dma_c configuration, nb bit flags to enable dma */
865 data = pci_read_config(dev, SV_PCI_DMAC, 4) | SV_PCI_DMA_ENABLE | SV_PCI_DMA_EXTENDED;
866 data = ((u_int32_t)sdmac & 0xfffffff0) | (data & 0x0f);
867 pci_write_config(dev, SV_PCI_DMAC, data, 4);
868 DEB(printf("dmac: 0x%x 0x%x\n", data, pci_read_config(dev, SV_PCI_DMAC, 4)));
869
870 if (bootverbose)
871 printf("Sonicvibes: revision %d.\n", sc->rev);
872
873 if (pcm_register(dev, sc, 1, 1)) {
874 device_printf(dev, "sv_attach: pcm_register fail\n");
875 goto fail;
876 }
877
878 pcm_addchan(dev, PCMDIR_PLAY, &svpchan_class, sc);
879 pcm_addchan(dev, PCMDIR_REC, &svrchan_class, sc);
880
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