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es137x.c (55204) es137x.c (55209)
1/*
2 * Support the ENSONIQ AudioPCI board and Creative Labs SoundBlaster PCI
3 * boards based on the ES1370, ES1371 and ES1373 chips.
4 *
5 * Copyright (c) 1999 Russell Cattelan <cattelan@thebarn.com>
6 * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk>
7 * Copyright (c) 1998 by Joachim Kuebart. All rights reserved.
8 *

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33 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
34 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
37 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
39 * OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
1/*
2 * Support the ENSONIQ AudioPCI board and Creative Labs SoundBlaster PCI
3 * boards based on the ES1370, ES1371 and ES1373 chips.
4 *
5 * Copyright (c) 1999 Russell Cattelan <cattelan@thebarn.com>
6 * Copyright (c) 1999 Cameron Grant <gandalf@vilnya.demon.co.uk>
7 * Copyright (c) 1998 by Joachim Kuebart. All rights reserved.
8 *

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33 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
34 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
35 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
37 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
38 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
39 * OF THE POSSIBILITY OF SUCH DAMAGE.
40 *
41 * $FreeBSD: head/sys/dev/sound/pci/es137x.c 55204 1999-12-29 03:46:54Z cg $
41 * $FreeBSD: head/sys/dev/sound/pci/es137x.c 55209 1999-12-29 05:44:17Z cg $
42 */
43
44/*
45 * Part of this code was heavily inspired by the linux driver from
46 * Thomas Sailer (sailer@ife.ee.ethz.ch)
47 * Just about everything has been touched and reworked in some way but
48 * the all the underlying sequences/timing/register values are from
49 * Thomas' code.

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69
70/* PCI IDs of supported chips */
71#define ES1370_PCI_ID 0x50001274
72#define ES1371_PCI_ID 0x13711274
73
74/* device private data */
75struct es_info;
76
42 */
43
44/*
45 * Part of this code was heavily inspired by the linux driver from
46 * Thomas Sailer (sailer@ife.ee.ethz.ch)
47 * Just about everything has been touched and reworked in some way but
48 * the all the underlying sequences/timing/register values are from
49 * Thomas' code.

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69
70/* PCI IDs of supported chips */
71#define ES1370_PCI_ID 0x50001274
72#define ES1371_PCI_ID 0x13711274
73
74/* device private data */
75struct es_info;
76
77typedef struct es_chinfo {
77struct es_chinfo {
78 struct es_info *parent;
79 pcm_channel *channel;
80 snd_dbuf *buffer;
81 int dir, num;
82 u_int32_t fmt;
78 struct es_info *parent;
79 pcm_channel *channel;
80 snd_dbuf *buffer;
81 int dir, num;
82 u_int32_t fmt;
83} es_chinfo_t;
83};
84
84
85typedef struct es_info {
85struct es_info {
86 bus_space_tag_t st;
87 bus_space_handle_t sh;
88 bus_dma_tag_t parent_dmat;
89
90 int num;
91 /* Contents of board's registers */
92 u_long ctrl;
93 u_long sctrl;
94 struct es_chinfo pch, rch;
86 bus_space_tag_t st;
87 bus_space_handle_t sh;
88 bus_dma_tag_t parent_dmat;
89
90 int num;
91 /* Contents of board's registers */
92 u_long ctrl;
93 u_long sctrl;
94 struct es_chinfo pch, rch;
95} es_info_t;
95};
96
97/* -------------------------------------------------------------------- */
98
99/* prototypes */
100static void es_intr(void *);
101
102static void es1371_wrcodec(void *, int, u_int32_t);
103static u_int32_t es1371_rdcodec(void *, int);
96
97/* -------------------------------------------------------------------- */
98
99/* prototypes */
100static void es_intr(void *);
101
102static void es1371_wrcodec(void *, int, u_int32_t);
103static u_int32_t es1371_rdcodec(void *, int);
104static u_int es1371_wait_src_ready(es_info_t *);
105static void es1371_src_write(es_info_t *, u_short, unsigned short);
106static u_int es1371_adc_rate(es_info_t *, u_int, int);
107static u_int es1371_dac_rate(es_info_t *, u_int, int);
108static int es1371_init(es_info_t *es);
109static int eschan1371_setspeed(void *data, u_int32_t speed);
110
104static u_int es1371_wait_src_ready(struct es_info *);
105static void es1371_src_write(struct es_info *, u_short, unsigned short);
106static u_int es1371_adc_rate(struct es_info *, u_int, int);
107static u_int es1371_dac_rate(struct es_info *, u_int, int);
108static int es1371_init(struct es_info *es, int);
111static int es1370_init(struct es_info *);
112static int es1370_wrcodec(struct es_info *, u_char, u_char);
113
114/* channel interface */
115static void *eschan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir);
116static int eschan_setdir(void *data, int dir);
117static int eschan_setformat(void *data, u_int32_t format);
118static int eschan1370_setspeed(void *data, u_int32_t speed);
109static int es1370_init(struct es_info *);
110static int es1370_wrcodec(struct es_info *, u_char, u_char);
111
112/* channel interface */
113static void *eschan_init(void *devinfo, snd_dbuf *b, pcm_channel *c, int dir);
114static int eschan_setdir(void *data, int dir);
115static int eschan_setformat(void *data, u_int32_t format);
116static int eschan1370_setspeed(void *data, u_int32_t speed);
117static int eschan1371_setspeed(void *data, u_int32_t speed);
119static int eschan_setblocksize(void *data, u_int32_t blocksize);
120static int eschan_trigger(void *data, int go);
121static int eschan_getptr(void *data);
122static pcmchan_caps *eschan_getcaps(void *data);
123
124static pcmchan_caps es_playcaps = {
125 4000, 48000,
126 AFMT_STEREO | AFMT_U8 | AFMT_S16_LE,

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459 es1370_wrcodec(es, CODEC_ADSEL, 0);/* Recording source is mixer */
460 es1370_wrcodec(es, CODEC_MGAIN, 0);/* MIC amp is 0db */
461
462 return 0;
463}
464
465/* ES1371 specific */
466int
118static int eschan_setblocksize(void *data, u_int32_t blocksize);
119static int eschan_trigger(void *data, int go);
120static int eschan_getptr(void *data);
121static pcmchan_caps *eschan_getcaps(void *data);
122
123static pcmchan_caps es_playcaps = {
124 4000, 48000,
125 AFMT_STEREO | AFMT_U8 | AFMT_S16_LE,

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458 es1370_wrcodec(es, CODEC_ADSEL, 0);/* Recording source is mixer */
459 es1370_wrcodec(es, CODEC_MGAIN, 0);/* MIC amp is 0db */
460
461 return 0;
462}
463
464/* ES1371 specific */
465int
467es1371_init(struct es_info *es)
466es1371_init(struct es_info *es, int rev)
468{
469 int idx;
470
471 if (debug > 0) printf("es_init\n");
472
473 es->num = 0;
474 es->ctrl = 0;
475 es->sctrl = 0;
476 /* initialize the chips */
467{
468 int idx;
469
470 if (debug > 0) printf("es_init\n");
471
472 es->num = 0;
473 es->ctrl = 0;
474 es->sctrl = 0;
475 /* initialize the chips */
477 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl);
476 if (rev == 7 || rev >= 9) {
477#define ES1371_BINTSUMM_OFF 0x07
478 bus_space_write_4(es->st, es->sh, ES1371_BINTSUMM_OFF, 0x20);
479 if (debug > 0) printf("es_init rev == 7 || rev >= 9\n");
480 } else { /* pre ac97 2.1 card */
481 bus_space_write_4(es->st, es->sh, ES1370_REG_CONTROL, es->ctrl);
482 if (debug > 0) printf("es_init pre ac97 2.1\n");
483 }
478 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl);
479 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, 0);
480 /* AC'97 warm reset to start the bitclk */
481 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, es->ctrl | ES1371_SYNC_RES);
482 DELAY(2000);
483 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->ctrl);
484 /* Init the sample rate converter */
485 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, ES1371_DIS_SRC);

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587 for (t = 0; t < 0x1000; t++)
588 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC)) & CODEC_RDY)
589 break;
590 if (debug > 0) printf("loop 3 t 0x%x 0x%x ret 0x%x\n", t, x, ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT));
591 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT);
592}
593
594static u_int
484 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->sctrl);
485 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, 0);
486 /* AC'97 warm reset to start the bitclk */
487 bus_space_write_4(es->st, es->sh, ES1371_REG_LEGACY, es->ctrl | ES1371_SYNC_RES);
488 DELAY(2000);
489 bus_space_write_4(es->st, es->sh, ES1370_REG_SERIAL_CONTROL, es->ctrl);
490 /* Init the sample rate converter */
491 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, ES1371_DIS_SRC);

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593 for (t = 0; t < 0x1000; t++)
594 if ((x = bus_space_read_4(es->st, es->sh, ES1371_REG_CODEC)) & CODEC_RDY)
595 break;
596 if (debug > 0) printf("loop 3 t 0x%x 0x%x ret 0x%x\n", t, x, ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT));
597 return ((x & CODEC_PIDAT_MASK) >> CODEC_PIDAT_SHIFT);
598}
599
600static u_int
595es1371_src_read(es_info_t *es, u_short reg)
601es1371_src_read(struct es_info *es, u_short reg)
596{
597 unsigned int r;
598
599 r = es1371_wait_src_ready(es) &
600 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1);
601 r |= ES1371_SRC_RAM_ADDRO(reg);
602 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,r);
603 return ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es));
604}
605
606static void
602{
603 unsigned int r;
604
605 r = es1371_wait_src_ready(es) &
606 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1);
607 r |= ES1371_SRC_RAM_ADDRO(reg);
608 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE,r);
609 return ES1371_SRC_RAM_DATAI(es1371_wait_src_ready(es));
610}
611
612static void
607es1371_src_write(es_info_t *es, u_short reg, u_short data){
613es1371_src_write(struct es_info *es, u_short reg, u_short data){
608 u_int r;
609
610 r = es1371_wait_src_ready(es) &
611 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1);
612 r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data);
613 /* printf("es1371_src_write 0x%x 0x%x\n",ES1371_REG_SMPRATE,r | ES1371_SRC_RAM_WE); */
614 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE);
615}
616
617static u_int
614 u_int r;
615
616 r = es1371_wait_src_ready(es) &
617 (ES1371_DIS_SRC | ES1371_DIS_P1 | ES1371_DIS_P2 | ES1371_DIS_R1);
618 r |= ES1371_SRC_RAM_ADDRO(reg) | ES1371_SRC_RAM_DATAO(data);
619 /* printf("es1371_src_write 0x%x 0x%x\n",ES1371_REG_SMPRATE,r | ES1371_SRC_RAM_WE); */
620 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r | ES1371_SRC_RAM_WE);
621}
622
623static u_int
618es1371_adc_rate(es_info_t *es, u_int rate, int set)
624es1371_adc_rate(struct es_info *es, u_int rate, int set)
619{
620 u_int n, truncm, freq, result;
621
622 if (rate > 48000) rate = 48000;
623 if (rate < 4000) rate = 4000;
624 n = rate / 3000;
625 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9)))
626 n--;

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643 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff);
644 es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8);
645 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8);
646 }
647 return result;
648}
649
650static u_int
625{
626 u_int n, truncm, freq, result;
627
628 if (rate > 48000) rate = 48000;
629 if (rate < 4000) rate = 4000;
630 n = rate / 3000;
631 if ((1 << n) & ((1 << 15) | (1 << 13) | (1 << 11) | (1 << 9)))
632 n--;

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649 es1371_src_write(es, ES_SMPREG_ADC + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff);
650 es1371_src_write(es, ES_SMPREG_VOL_ADC, n << 8);
651 es1371_src_write(es, ES_SMPREG_VOL_ADC + 1, n << 8);
652 }
653 return result;
654}
655
656static u_int
651es1371_dac_rate(es_info_t *es, u_int rate, int set)
657es1371_dac_rate(struct es_info *es, u_int rate, int set)
652{
653 u_int freq, r, result, dac, dis;
654
655 if (rate > 48000) rate = 48000;
656 if (rate < 4000) rate = 4000;
657 freq = (rate << 15) / 3000;
658 result = (freq * 3000) >> 15;
659 if (set) {

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667 es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff);
668 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | dis | ES1371_DIS_R1));
669 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r);
670 }
671 return result;
672}
673
674static u_int
658{
659 u_int freq, r, result, dac, dis;
660
661 if (rate > 48000) rate = 48000;
662 if (rate < 4000) rate = 4000;
663 freq = (rate << 15) / 3000;
664 result = (freq * 3000) >> 15;
665 if (set) {

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673 es1371_src_write(es, dac + ES_SMPREG_VFREQ_FRAC, freq & 0x7fff);
674 r = (es1371_wait_src_ready(es) & (ES1371_DIS_SRC | dis | ES1371_DIS_R1));
675 bus_space_write_4(es->st, es->sh, ES1371_REG_SMPRATE, r);
676 }
677 return result;
678}
679
680static u_int
675es1371_wait_src_ready(es_info_t *es)
681es1371_wait_src_ready(struct es_info *es)
676{
677 u_int t, r;
678
679 for (t = 0; t < 500; t++) {
680 if (!((r = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE)) & ES1371_SRC_RAM_BUSY))
681 return r;
682 DELAY(1000);
683 }

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753 }
754 }
755 if (mapped == 0) {
756 device_printf(dev, "unable to map register space\n");
757 goto bad;
758 }
759
760 if (pci_get_devid(dev) == ES1371_PCI_ID) {
682{
683 u_int t, r;
684
685 for (t = 0; t < 500; t++) {
686 if (!((r = bus_space_read_4(es->st, es->sh, ES1371_REG_SMPRATE)) & ES1371_SRC_RAM_BUSY))
687 return r;
688 DELAY(1000);
689 }

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759 }
760 }
761 if (mapped == 0) {
762 device_printf(dev, "unable to map register space\n");
763 goto bad;
764 }
765
766 if (pci_get_devid(dev) == ES1371_PCI_ID) {
761 if(-1 == es1371_init(es)) {
767 if(-1 == es1371_init(es, pci_get_revid(dev))) {
762 device_printf(dev, "unable to initialize the card\n");
763 goto bad;
764 }
765 codec = ac97_create(es, es1371_rdcodec, es1371_wrcodec);
766 if (codec == NULL) goto bad;
767 /* our init routine does everything for us */
768 /* set to NULL; flag mixer_init not to run the ac97_init */
769 /* ac97_mixer.init = NULL; */

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768 device_printf(dev, "unable to initialize the card\n");
769 goto bad;
770 }
771 codec = ac97_create(es, es1371_rdcodec, es1371_wrcodec);
772 if (codec == NULL) goto bad;
773 /* our init routine does everything for us */
774 /* set to NULL; flag mixer_init not to run the ac97_init */
775 /* ac97_mixer.init = NULL; */

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